qdio_main.c 40 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/kernel_stat.h>
  18. #include <asm/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. *
  69. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  70. * Note: For IQDC unicast queues only the highest priority queue is processed.
  71. */
  72. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  73. unsigned int *bb, unsigned int fc)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  79. asm volatile(
  80. " siga 0\n"
  81. "0: ipm %0\n"
  82. " srl %0,28\n"
  83. "1:\n"
  84. EX_TABLE(0b, 1b)
  85. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  86. : : "cc", "memory");
  87. *bb = ((unsigned int) __fc) >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* not all buffers processed */
  96. if (ccq == 96 || ccq == 97)
  97. return 1;
  98. /* notify devices immediately */
  99. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  100. return -EIO;
  101. }
  102. /**
  103. * qdio_do_eqbs - extract buffer states for QEBSM
  104. * @q: queue to manipulate
  105. * @state: state of the extracted buffers
  106. * @start: buffer number to start at
  107. * @count: count of buffers to examine
  108. * @auto_ack: automatically acknowledge buffers
  109. *
  110. * Returns the number of successfully extracted equal buffer states.
  111. * Stops processing if a state is different from the last buffers state.
  112. */
  113. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  114. int start, int count, int auto_ack)
  115. {
  116. unsigned int ccq = 0;
  117. int tmp_count = count, tmp_start = start;
  118. int nr = q->nr;
  119. int rc;
  120. BUG_ON(!q->irq_ptr->sch_token);
  121. qperf_inc(q, eqbs);
  122. if (!q->is_input_q)
  123. nr += q->irq_ptr->nr_input_qs;
  124. again:
  125. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  126. auto_ack);
  127. rc = qdio_check_ccq(q, ccq);
  128. /* At least one buffer was processed, return and extract the remaining
  129. * buffers later.
  130. */
  131. if ((ccq == 96) && (count != tmp_count)) {
  132. qperf_inc(q, eqbs_partial);
  133. return (count - tmp_count);
  134. }
  135. if (rc == 1) {
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  137. goto again;
  138. }
  139. if (rc < 0) {
  140. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  141. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  142. q->handler(q->irq_ptr->cdev,
  143. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  144. 0, -1, -1, q->irq_ptr->int_parm);
  145. return 0;
  146. }
  147. return count - tmp_count;
  148. }
  149. /**
  150. * qdio_do_sqbs - set buffer states for QEBSM
  151. * @q: queue to manipulate
  152. * @state: new state of the buffers
  153. * @start: first buffer number to change
  154. * @count: how many buffers to change
  155. *
  156. * Returns the number of successfully changed buffers.
  157. * Does retrying until the specified count of buffer states is set or an
  158. * error occurs.
  159. */
  160. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  161. int count)
  162. {
  163. unsigned int ccq = 0;
  164. int tmp_count = count, tmp_start = start;
  165. int nr = q->nr;
  166. int rc;
  167. if (!count)
  168. return 0;
  169. BUG_ON(!q->irq_ptr->sch_token);
  170. qperf_inc(q, sqbs);
  171. if (!q->is_input_q)
  172. nr += q->irq_ptr->nr_input_qs;
  173. again:
  174. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  175. rc = qdio_check_ccq(q, ccq);
  176. if (rc == 1) {
  177. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  178. qperf_inc(q, sqbs_partial);
  179. goto again;
  180. }
  181. if (rc < 0) {
  182. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  183. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  184. q->handler(q->irq_ptr->cdev,
  185. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  186. 0, -1, -1, q->irq_ptr->int_parm);
  187. return 0;
  188. }
  189. WARN_ON(tmp_count);
  190. return count - tmp_count;
  191. }
  192. /* returns number of examined buffers and their common state in *state */
  193. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  194. unsigned char *state, unsigned int count,
  195. int auto_ack)
  196. {
  197. unsigned char __state = 0;
  198. int i;
  199. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  200. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  201. if (is_qebsm(q))
  202. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  203. for (i = 0; i < count; i++) {
  204. if (!__state)
  205. __state = q->slsb.val[bufnr];
  206. else if (q->slsb.val[bufnr] != __state)
  207. break;
  208. bufnr = next_buf(bufnr);
  209. }
  210. *state = __state;
  211. return i;
  212. }
  213. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  214. unsigned char *state, int auto_ack)
  215. {
  216. return get_buf_states(q, bufnr, state, 1, auto_ack);
  217. }
  218. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  219. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  220. unsigned char state, int count)
  221. {
  222. int i;
  223. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  224. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  225. if (is_qebsm(q))
  226. return qdio_do_sqbs(q, state, bufnr, count);
  227. for (i = 0; i < count; i++) {
  228. xchg(&q->slsb.val[bufnr], state);
  229. bufnr = next_buf(bufnr);
  230. }
  231. return count;
  232. }
  233. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  234. unsigned char state)
  235. {
  236. return set_buf_states(q, bufnr, state, 1);
  237. }
  238. /* set slsb states to initial state */
  239. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  240. {
  241. struct qdio_q *q;
  242. int i;
  243. for_each_input_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. for_each_output_queue(irq_ptr, q, i)
  247. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  248. QDIO_MAX_BUFFERS_PER_Q);
  249. }
  250. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  251. unsigned int input)
  252. {
  253. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  254. unsigned int fc = QDIO_SIGA_SYNC;
  255. int cc;
  256. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  257. qperf_inc(q, siga_sync);
  258. if (is_qebsm(q)) {
  259. schid = q->irq_ptr->sch_token;
  260. fc |= QDIO_SIGA_QEBSM_FLAG;
  261. }
  262. cc = do_siga_sync(schid, output, input, fc);
  263. if (unlikely(cc))
  264. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  265. return cc;
  266. }
  267. static inline int qdio_siga_sync_q(struct qdio_q *q)
  268. {
  269. if (q->is_input_q)
  270. return qdio_siga_sync(q, 0, q->mask);
  271. else
  272. return qdio_siga_sync(q, q->mask, 0);
  273. }
  274. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  275. {
  276. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  277. unsigned int fc = QDIO_SIGA_WRITE;
  278. u64 start_time = 0;
  279. int cc;
  280. if (is_qebsm(q)) {
  281. schid = q->irq_ptr->sch_token;
  282. fc |= QDIO_SIGA_QEBSM_FLAG;
  283. }
  284. again:
  285. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  286. /* hipersocket busy condition */
  287. if (unlikely(*busy_bit)) {
  288. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  289. if (!start_time) {
  290. start_time = get_clock();
  291. goto again;
  292. }
  293. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  294. goto again;
  295. }
  296. return cc;
  297. }
  298. static inline int qdio_siga_input(struct qdio_q *q)
  299. {
  300. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  301. unsigned int fc = QDIO_SIGA_READ;
  302. int cc;
  303. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  304. qperf_inc(q, siga_read);
  305. if (is_qebsm(q)) {
  306. schid = q->irq_ptr->sch_token;
  307. fc |= QDIO_SIGA_QEBSM_FLAG;
  308. }
  309. cc = do_siga_input(schid, q->mask, fc);
  310. if (unlikely(cc))
  311. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  312. return cc;
  313. }
  314. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  315. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  316. static inline void qdio_sync_queues(struct qdio_q *q)
  317. {
  318. /* PCI capable outbound queues will also be scanned so sync them too */
  319. if (pci_out_supported(q))
  320. qdio_siga_sync_all(q);
  321. else
  322. qdio_siga_sync_q(q);
  323. }
  324. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  325. unsigned char *state)
  326. {
  327. if (need_siga_sync(q))
  328. qdio_siga_sync_q(q);
  329. return get_buf_states(q, bufnr, state, 1, 0);
  330. }
  331. static inline void qdio_stop_polling(struct qdio_q *q)
  332. {
  333. if (!q->u.in.polling)
  334. return;
  335. q->u.in.polling = 0;
  336. qperf_inc(q, stop_polling);
  337. /* show the card that we are not polling anymore */
  338. if (is_qebsm(q)) {
  339. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  340. q->u.in.ack_count);
  341. q->u.in.ack_count = 0;
  342. } else
  343. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  344. }
  345. static inline void account_sbals(struct qdio_q *q, int count)
  346. {
  347. int pos = 0;
  348. q->q_stats.nr_sbal_total += count;
  349. if (count == QDIO_MAX_BUFFERS_MASK) {
  350. q->q_stats.nr_sbals[7]++;
  351. return;
  352. }
  353. while (count >>= 1)
  354. pos++;
  355. q->q_stats.nr_sbals[pos]++;
  356. }
  357. static void announce_buffer_error(struct qdio_q *q, int count)
  358. {
  359. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  360. /* special handling for no target buffer empty */
  361. if ((!q->is_input_q &&
  362. (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
  363. qperf_inc(q, target_full);
  364. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  365. q->first_to_check);
  366. return;
  367. }
  368. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  369. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  370. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  371. DBF_ERROR("F14:%2x F15:%2x",
  372. q->sbal[q->first_to_check]->element[14].flags & 0xff,
  373. q->sbal[q->first_to_check]->element[15].flags & 0xff);
  374. }
  375. static inline void inbound_primed(struct qdio_q *q, int count)
  376. {
  377. int new;
  378. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  379. /* for QEBSM the ACK was already set by EQBS */
  380. if (is_qebsm(q)) {
  381. if (!q->u.in.polling) {
  382. q->u.in.polling = 1;
  383. q->u.in.ack_count = count;
  384. q->u.in.ack_start = q->first_to_check;
  385. return;
  386. }
  387. /* delete the previous ACK's */
  388. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  389. q->u.in.ack_count);
  390. q->u.in.ack_count = count;
  391. q->u.in.ack_start = q->first_to_check;
  392. return;
  393. }
  394. /*
  395. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  396. * or by the next inbound run.
  397. */
  398. new = add_buf(q->first_to_check, count - 1);
  399. if (q->u.in.polling) {
  400. /* reset the previous ACK but first set the new one */
  401. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  402. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  403. } else {
  404. q->u.in.polling = 1;
  405. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  406. }
  407. q->u.in.ack_start = new;
  408. count--;
  409. if (!count)
  410. return;
  411. /* need to change ALL buffers to get more interrupts */
  412. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  413. }
  414. static int get_inbound_buffer_frontier(struct qdio_q *q)
  415. {
  416. int count, stop;
  417. unsigned char state = 0;
  418. /*
  419. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  420. * would return 0.
  421. */
  422. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  423. stop = add_buf(q->first_to_check, count);
  424. if (q->first_to_check == stop)
  425. goto out;
  426. /*
  427. * No siga sync here, as a PCI or we after a thin interrupt
  428. * already sync'ed the queues.
  429. */
  430. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  431. if (!count)
  432. goto out;
  433. switch (state) {
  434. case SLSB_P_INPUT_PRIMED:
  435. inbound_primed(q, count);
  436. q->first_to_check = add_buf(q->first_to_check, count);
  437. if (atomic_sub(count, &q->nr_buf_used) == 0)
  438. qperf_inc(q, inbound_queue_full);
  439. if (q->irq_ptr->perf_stat_enabled)
  440. account_sbals(q, count);
  441. break;
  442. case SLSB_P_INPUT_ERROR:
  443. announce_buffer_error(q, count);
  444. /* process the buffer, the upper layer will take care of it */
  445. q->first_to_check = add_buf(q->first_to_check, count);
  446. atomic_sub(count, &q->nr_buf_used);
  447. if (q->irq_ptr->perf_stat_enabled)
  448. account_sbals_error(q, count);
  449. break;
  450. case SLSB_CU_INPUT_EMPTY:
  451. case SLSB_P_INPUT_NOT_INIT:
  452. case SLSB_P_INPUT_ACK:
  453. if (q->irq_ptr->perf_stat_enabled)
  454. q->q_stats.nr_sbal_nop++;
  455. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  456. break;
  457. default:
  458. BUG();
  459. }
  460. out:
  461. return q->first_to_check;
  462. }
  463. static int qdio_inbound_q_moved(struct qdio_q *q)
  464. {
  465. int bufnr;
  466. bufnr = get_inbound_buffer_frontier(q);
  467. if ((bufnr != q->last_move) || q->qdio_error) {
  468. q->last_move = bufnr;
  469. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  470. q->u.in.timestamp = get_clock();
  471. return 1;
  472. } else
  473. return 0;
  474. }
  475. static inline int qdio_inbound_q_done(struct qdio_q *q)
  476. {
  477. unsigned char state = 0;
  478. if (!atomic_read(&q->nr_buf_used))
  479. return 1;
  480. if (need_siga_sync(q))
  481. qdio_siga_sync_q(q);
  482. get_buf_state(q, q->first_to_check, &state, 0);
  483. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  484. /* more work coming */
  485. return 0;
  486. if (is_thinint_irq(q->irq_ptr))
  487. return 1;
  488. /* don't poll under z/VM */
  489. if (MACHINE_IS_VM)
  490. return 1;
  491. /*
  492. * At this point we know, that inbound first_to_check
  493. * has (probably) not moved (see qdio_inbound_processing).
  494. */
  495. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  496. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  497. q->first_to_check);
  498. return 1;
  499. } else
  500. return 0;
  501. }
  502. static void qdio_kick_handler(struct qdio_q *q)
  503. {
  504. int start = q->first_to_kick;
  505. int end = q->first_to_check;
  506. int count;
  507. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  508. return;
  509. count = sub_buf(end, start);
  510. if (q->is_input_q) {
  511. qperf_inc(q, inbound_handler);
  512. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  513. } else {
  514. qperf_inc(q, outbound_handler);
  515. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  516. start, count);
  517. }
  518. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  519. q->irq_ptr->int_parm);
  520. /* for the next time */
  521. q->first_to_kick = end;
  522. q->qdio_error = 0;
  523. }
  524. static void __qdio_inbound_processing(struct qdio_q *q)
  525. {
  526. qperf_inc(q, tasklet_inbound);
  527. if (!qdio_inbound_q_moved(q))
  528. return;
  529. qdio_kick_handler(q);
  530. if (!qdio_inbound_q_done(q)) {
  531. /* means poll time is not yet over */
  532. qperf_inc(q, tasklet_inbound_resched);
  533. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  534. tasklet_schedule(&q->tasklet);
  535. return;
  536. }
  537. }
  538. qdio_stop_polling(q);
  539. /*
  540. * We need to check again to not lose initiative after
  541. * resetting the ACK state.
  542. */
  543. if (!qdio_inbound_q_done(q)) {
  544. qperf_inc(q, tasklet_inbound_resched2);
  545. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  546. tasklet_schedule(&q->tasklet);
  547. }
  548. }
  549. void qdio_inbound_processing(unsigned long data)
  550. {
  551. struct qdio_q *q = (struct qdio_q *)data;
  552. __qdio_inbound_processing(q);
  553. }
  554. static int get_outbound_buffer_frontier(struct qdio_q *q)
  555. {
  556. int count, stop;
  557. unsigned char state = 0;
  558. if (need_siga_sync(q))
  559. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  560. !pci_out_supported(q)) ||
  561. (queue_type(q) == QDIO_IQDIO_QFMT &&
  562. multicast_outbound(q)))
  563. qdio_siga_sync_q(q);
  564. /*
  565. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  566. * would return 0.
  567. */
  568. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  569. stop = add_buf(q->first_to_check, count);
  570. if (q->first_to_check == stop)
  571. return q->first_to_check;
  572. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  573. if (!count)
  574. return q->first_to_check;
  575. switch (state) {
  576. case SLSB_P_OUTPUT_EMPTY:
  577. /* the adapter got it */
  578. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
  579. atomic_sub(count, &q->nr_buf_used);
  580. q->first_to_check = add_buf(q->first_to_check, count);
  581. if (q->irq_ptr->perf_stat_enabled)
  582. account_sbals(q, count);
  583. break;
  584. case SLSB_P_OUTPUT_ERROR:
  585. announce_buffer_error(q, count);
  586. /* process the buffer, the upper layer will take care of it */
  587. q->first_to_check = add_buf(q->first_to_check, count);
  588. atomic_sub(count, &q->nr_buf_used);
  589. if (q->irq_ptr->perf_stat_enabled)
  590. account_sbals_error(q, count);
  591. break;
  592. case SLSB_CU_OUTPUT_PRIMED:
  593. /* the adapter has not fetched the output yet */
  594. if (q->irq_ptr->perf_stat_enabled)
  595. q->q_stats.nr_sbal_nop++;
  596. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  597. break;
  598. case SLSB_P_OUTPUT_NOT_INIT:
  599. case SLSB_P_OUTPUT_HALTED:
  600. break;
  601. default:
  602. BUG();
  603. }
  604. return q->first_to_check;
  605. }
  606. /* all buffers processed? */
  607. static inline int qdio_outbound_q_done(struct qdio_q *q)
  608. {
  609. return atomic_read(&q->nr_buf_used) == 0;
  610. }
  611. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  612. {
  613. int bufnr;
  614. bufnr = get_outbound_buffer_frontier(q);
  615. if ((bufnr != q->last_move) || q->qdio_error) {
  616. q->last_move = bufnr;
  617. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  618. return 1;
  619. } else
  620. return 0;
  621. }
  622. static int qdio_kick_outbound_q(struct qdio_q *q)
  623. {
  624. unsigned int busy_bit;
  625. int cc;
  626. if (!need_siga_out(q))
  627. return 0;
  628. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  629. qperf_inc(q, siga_write);
  630. cc = qdio_siga_output(q, &busy_bit);
  631. switch (cc) {
  632. case 0:
  633. break;
  634. case 2:
  635. if (busy_bit) {
  636. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  637. cc |= QDIO_ERROR_SIGA_BUSY;
  638. } else
  639. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  640. break;
  641. case 1:
  642. case 3:
  643. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  644. break;
  645. }
  646. return cc;
  647. }
  648. static void __qdio_outbound_processing(struct qdio_q *q)
  649. {
  650. qperf_inc(q, tasklet_outbound);
  651. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  652. if (qdio_outbound_q_moved(q))
  653. qdio_kick_handler(q);
  654. if (queue_type(q) == QDIO_ZFCP_QFMT)
  655. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  656. goto sched;
  657. /* bail out for HiperSockets unicast queues */
  658. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  659. return;
  660. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  661. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  662. goto sched;
  663. if (q->u.out.pci_out_enabled)
  664. return;
  665. /*
  666. * Now we know that queue type is either qeth without pci enabled
  667. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  668. * EMPTY is noticed and outbound_handler is called after some time.
  669. */
  670. if (qdio_outbound_q_done(q))
  671. del_timer(&q->u.out.timer);
  672. else
  673. if (!timer_pending(&q->u.out.timer))
  674. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  675. return;
  676. sched:
  677. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  678. return;
  679. tasklet_schedule(&q->tasklet);
  680. }
  681. /* outbound tasklet */
  682. void qdio_outbound_processing(unsigned long data)
  683. {
  684. struct qdio_q *q = (struct qdio_q *)data;
  685. __qdio_outbound_processing(q);
  686. }
  687. void qdio_outbound_timer(unsigned long data)
  688. {
  689. struct qdio_q *q = (struct qdio_q *)data;
  690. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  691. return;
  692. tasklet_schedule(&q->tasklet);
  693. }
  694. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  695. {
  696. struct qdio_q *out;
  697. int i;
  698. if (!pci_out_supported(q))
  699. return;
  700. for_each_output_queue(q->irq_ptr, out, i)
  701. if (!qdio_outbound_q_done(out))
  702. tasklet_schedule(&out->tasklet);
  703. }
  704. static void __tiqdio_inbound_processing(struct qdio_q *q)
  705. {
  706. qperf_inc(q, tasklet_inbound);
  707. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  708. qdio_sync_queues(q);
  709. /*
  710. * The interrupt could be caused by a PCI request. Check the
  711. * PCI capable outbound queues.
  712. */
  713. qdio_check_outbound_after_thinint(q);
  714. if (!qdio_inbound_q_moved(q))
  715. return;
  716. qdio_kick_handler(q);
  717. if (!qdio_inbound_q_done(q)) {
  718. qperf_inc(q, tasklet_inbound_resched);
  719. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  720. tasklet_schedule(&q->tasklet);
  721. return;
  722. }
  723. }
  724. qdio_stop_polling(q);
  725. /*
  726. * We need to check again to not lose initiative after
  727. * resetting the ACK state.
  728. */
  729. if (!qdio_inbound_q_done(q)) {
  730. qperf_inc(q, tasklet_inbound_resched2);
  731. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  732. tasklet_schedule(&q->tasklet);
  733. }
  734. }
  735. void tiqdio_inbound_processing(unsigned long data)
  736. {
  737. struct qdio_q *q = (struct qdio_q *)data;
  738. __tiqdio_inbound_processing(q);
  739. }
  740. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  741. enum qdio_irq_states state)
  742. {
  743. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  744. irq_ptr->state = state;
  745. mb();
  746. }
  747. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  748. {
  749. if (irb->esw.esw0.erw.cons) {
  750. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  751. DBF_ERROR_HEX(irb, 64);
  752. DBF_ERROR_HEX(irb->ecw, 64);
  753. }
  754. }
  755. /* PCI interrupt handler */
  756. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  757. {
  758. int i;
  759. struct qdio_q *q;
  760. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  761. return;
  762. for_each_input_queue(irq_ptr, q, i) {
  763. if (q->u.in.queue_start_poll) {
  764. /* skip if polling is enabled or already in work */
  765. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  766. &q->u.in.queue_irq_state)) {
  767. qperf_inc(q, int_discarded);
  768. continue;
  769. }
  770. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  771. q->irq_ptr->int_parm);
  772. } else
  773. tasklet_schedule(&q->tasklet);
  774. }
  775. if (!pci_out_supported(q))
  776. return;
  777. for_each_output_queue(irq_ptr, q, i) {
  778. if (qdio_outbound_q_done(q))
  779. continue;
  780. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  781. qdio_siga_sync_q(q);
  782. tasklet_schedule(&q->tasklet);
  783. }
  784. }
  785. static void qdio_handle_activate_check(struct ccw_device *cdev,
  786. unsigned long intparm, int cstat, int dstat)
  787. {
  788. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  789. struct qdio_q *q;
  790. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  791. DBF_ERROR("intp :%lx", intparm);
  792. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  793. if (irq_ptr->nr_input_qs) {
  794. q = irq_ptr->input_qs[0];
  795. } else if (irq_ptr->nr_output_qs) {
  796. q = irq_ptr->output_qs[0];
  797. } else {
  798. dump_stack();
  799. goto no_handler;
  800. }
  801. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  802. 0, -1, -1, irq_ptr->int_parm);
  803. no_handler:
  804. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  805. }
  806. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  807. int dstat)
  808. {
  809. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  810. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  811. if (cstat)
  812. goto error;
  813. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  814. goto error;
  815. if (!(dstat & DEV_STAT_DEV_END))
  816. goto error;
  817. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  818. return;
  819. error:
  820. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  821. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  822. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  823. }
  824. /* qdio interrupt handler */
  825. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  826. struct irb *irb)
  827. {
  828. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  829. int cstat, dstat;
  830. if (!intparm || !irq_ptr) {
  831. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  832. return;
  833. }
  834. kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++;
  835. if (irq_ptr->perf_stat_enabled)
  836. irq_ptr->perf_stat.qdio_int++;
  837. if (IS_ERR(irb)) {
  838. switch (PTR_ERR(irb)) {
  839. case -EIO:
  840. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  841. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  842. wake_up(&cdev->private->wait_q);
  843. return;
  844. default:
  845. WARN_ON(1);
  846. return;
  847. }
  848. }
  849. qdio_irq_check_sense(irq_ptr, irb);
  850. cstat = irb->scsw.cmd.cstat;
  851. dstat = irb->scsw.cmd.dstat;
  852. switch (irq_ptr->state) {
  853. case QDIO_IRQ_STATE_INACTIVE:
  854. qdio_establish_handle_irq(cdev, cstat, dstat);
  855. break;
  856. case QDIO_IRQ_STATE_CLEANUP:
  857. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  858. break;
  859. case QDIO_IRQ_STATE_ESTABLISHED:
  860. case QDIO_IRQ_STATE_ACTIVE:
  861. if (cstat & SCHN_STAT_PCI) {
  862. qdio_int_handler_pci(irq_ptr);
  863. return;
  864. }
  865. if (cstat || dstat)
  866. qdio_handle_activate_check(cdev, intparm, cstat,
  867. dstat);
  868. break;
  869. case QDIO_IRQ_STATE_STOPPED:
  870. break;
  871. default:
  872. WARN_ON(1);
  873. }
  874. wake_up(&cdev->private->wait_q);
  875. }
  876. /**
  877. * qdio_get_ssqd_desc - get qdio subchannel description
  878. * @cdev: ccw device to get description for
  879. * @data: where to store the ssqd
  880. *
  881. * Returns 0 or an error code. The results of the chsc are stored in the
  882. * specified structure.
  883. */
  884. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  885. struct qdio_ssqd_desc *data)
  886. {
  887. if (!cdev || !cdev->private)
  888. return -EINVAL;
  889. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  890. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  891. }
  892. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  893. static void qdio_shutdown_queues(struct ccw_device *cdev)
  894. {
  895. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  896. struct qdio_q *q;
  897. int i;
  898. for_each_input_queue(irq_ptr, q, i)
  899. tasklet_kill(&q->tasklet);
  900. for_each_output_queue(irq_ptr, q, i) {
  901. del_timer(&q->u.out.timer);
  902. tasklet_kill(&q->tasklet);
  903. }
  904. }
  905. /**
  906. * qdio_shutdown - shut down a qdio subchannel
  907. * @cdev: associated ccw device
  908. * @how: use halt or clear to shutdown
  909. */
  910. int qdio_shutdown(struct ccw_device *cdev, int how)
  911. {
  912. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  913. int rc;
  914. unsigned long flags;
  915. if (!irq_ptr)
  916. return -ENODEV;
  917. BUG_ON(irqs_disabled());
  918. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  919. mutex_lock(&irq_ptr->setup_mutex);
  920. /*
  921. * Subchannel was already shot down. We cannot prevent being called
  922. * twice since cio may trigger a shutdown asynchronously.
  923. */
  924. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  925. mutex_unlock(&irq_ptr->setup_mutex);
  926. return 0;
  927. }
  928. /*
  929. * Indicate that the device is going down. Scheduling the queue
  930. * tasklets is forbidden from here on.
  931. */
  932. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  933. tiqdio_remove_input_queues(irq_ptr);
  934. qdio_shutdown_queues(cdev);
  935. qdio_shutdown_debug_entries(irq_ptr, cdev);
  936. /* cleanup subchannel */
  937. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  938. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  939. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  940. else
  941. /* default behaviour is halt */
  942. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  943. if (rc) {
  944. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  945. DBF_ERROR("rc:%4d", rc);
  946. goto no_cleanup;
  947. }
  948. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  949. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  950. wait_event_interruptible_timeout(cdev->private->wait_q,
  951. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  952. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  953. 10 * HZ);
  954. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  955. no_cleanup:
  956. qdio_shutdown_thinint(irq_ptr);
  957. /* restore interrupt handler */
  958. if ((void *)cdev->handler == (void *)qdio_int_handler)
  959. cdev->handler = irq_ptr->orig_handler;
  960. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  961. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  962. mutex_unlock(&irq_ptr->setup_mutex);
  963. if (rc)
  964. return rc;
  965. return 0;
  966. }
  967. EXPORT_SYMBOL_GPL(qdio_shutdown);
  968. /**
  969. * qdio_free - free data structures for a qdio subchannel
  970. * @cdev: associated ccw device
  971. */
  972. int qdio_free(struct ccw_device *cdev)
  973. {
  974. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  975. if (!irq_ptr)
  976. return -ENODEV;
  977. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  978. mutex_lock(&irq_ptr->setup_mutex);
  979. if (irq_ptr->debug_area != NULL) {
  980. debug_unregister(irq_ptr->debug_area);
  981. irq_ptr->debug_area = NULL;
  982. }
  983. cdev->private->qdio_data = NULL;
  984. mutex_unlock(&irq_ptr->setup_mutex);
  985. qdio_release_memory(irq_ptr);
  986. return 0;
  987. }
  988. EXPORT_SYMBOL_GPL(qdio_free);
  989. /**
  990. * qdio_allocate - allocate qdio queues and associated data
  991. * @init_data: initialization data
  992. */
  993. int qdio_allocate(struct qdio_initialize *init_data)
  994. {
  995. struct qdio_irq *irq_ptr;
  996. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  997. if ((init_data->no_input_qs && !init_data->input_handler) ||
  998. (init_data->no_output_qs && !init_data->output_handler))
  999. return -EINVAL;
  1000. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1001. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1002. return -EINVAL;
  1003. if ((!init_data->input_sbal_addr_array) ||
  1004. (!init_data->output_sbal_addr_array))
  1005. return -EINVAL;
  1006. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1007. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1008. if (!irq_ptr)
  1009. goto out_err;
  1010. mutex_init(&irq_ptr->setup_mutex);
  1011. qdio_allocate_dbf(init_data, irq_ptr);
  1012. /*
  1013. * Allocate a page for the chsc calls in qdio_establish.
  1014. * Must be pre-allocated since a zfcp recovery will call
  1015. * qdio_establish. In case of low memory and swap on a zfcp disk
  1016. * we may not be able to allocate memory otherwise.
  1017. */
  1018. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1019. if (!irq_ptr->chsc_page)
  1020. goto out_rel;
  1021. /* qdr is used in ccw1.cda which is u32 */
  1022. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1023. if (!irq_ptr->qdr)
  1024. goto out_rel;
  1025. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1026. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1027. init_data->no_output_qs))
  1028. goto out_rel;
  1029. init_data->cdev->private->qdio_data = irq_ptr;
  1030. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1031. return 0;
  1032. out_rel:
  1033. qdio_release_memory(irq_ptr);
  1034. out_err:
  1035. return -ENOMEM;
  1036. }
  1037. EXPORT_SYMBOL_GPL(qdio_allocate);
  1038. /**
  1039. * qdio_establish - establish queues on a qdio subchannel
  1040. * @init_data: initialization data
  1041. */
  1042. int qdio_establish(struct qdio_initialize *init_data)
  1043. {
  1044. struct qdio_irq *irq_ptr;
  1045. struct ccw_device *cdev = init_data->cdev;
  1046. unsigned long saveflags;
  1047. int rc;
  1048. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1049. irq_ptr = cdev->private->qdio_data;
  1050. if (!irq_ptr)
  1051. return -ENODEV;
  1052. if (cdev->private->state != DEV_STATE_ONLINE)
  1053. return -EINVAL;
  1054. mutex_lock(&irq_ptr->setup_mutex);
  1055. qdio_setup_irq(init_data);
  1056. rc = qdio_establish_thinint(irq_ptr);
  1057. if (rc) {
  1058. mutex_unlock(&irq_ptr->setup_mutex);
  1059. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1060. return rc;
  1061. }
  1062. /* establish q */
  1063. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1064. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1065. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1066. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1067. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1068. ccw_device_set_options_mask(cdev, 0);
  1069. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1070. if (rc) {
  1071. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1072. DBF_ERROR("rc:%4x", rc);
  1073. }
  1074. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1075. if (rc) {
  1076. mutex_unlock(&irq_ptr->setup_mutex);
  1077. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1078. return rc;
  1079. }
  1080. wait_event_interruptible_timeout(cdev->private->wait_q,
  1081. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1082. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1083. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1084. mutex_unlock(&irq_ptr->setup_mutex);
  1085. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1086. return -EIO;
  1087. }
  1088. qdio_setup_ssqd_info(irq_ptr);
  1089. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1090. /* qebsm is now setup if available, initialize buffer states */
  1091. qdio_init_buf_states(irq_ptr);
  1092. mutex_unlock(&irq_ptr->setup_mutex);
  1093. qdio_print_subchannel_info(irq_ptr, cdev);
  1094. qdio_setup_debug_entries(irq_ptr, cdev);
  1095. return 0;
  1096. }
  1097. EXPORT_SYMBOL_GPL(qdio_establish);
  1098. /**
  1099. * qdio_activate - activate queues on a qdio subchannel
  1100. * @cdev: associated cdev
  1101. */
  1102. int qdio_activate(struct ccw_device *cdev)
  1103. {
  1104. struct qdio_irq *irq_ptr;
  1105. int rc;
  1106. unsigned long saveflags;
  1107. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1108. irq_ptr = cdev->private->qdio_data;
  1109. if (!irq_ptr)
  1110. return -ENODEV;
  1111. if (cdev->private->state != DEV_STATE_ONLINE)
  1112. return -EINVAL;
  1113. mutex_lock(&irq_ptr->setup_mutex);
  1114. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1115. rc = -EBUSY;
  1116. goto out;
  1117. }
  1118. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1119. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1120. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1121. irq_ptr->ccw.cda = 0;
  1122. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1123. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1124. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1125. 0, DOIO_DENY_PREFETCH);
  1126. if (rc) {
  1127. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1128. DBF_ERROR("rc:%4x", rc);
  1129. }
  1130. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1131. if (rc)
  1132. goto out;
  1133. if (is_thinint_irq(irq_ptr))
  1134. tiqdio_add_input_queues(irq_ptr);
  1135. /* wait for subchannel to become active */
  1136. msleep(5);
  1137. switch (irq_ptr->state) {
  1138. case QDIO_IRQ_STATE_STOPPED:
  1139. case QDIO_IRQ_STATE_ERR:
  1140. rc = -EIO;
  1141. break;
  1142. default:
  1143. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1144. rc = 0;
  1145. }
  1146. out:
  1147. mutex_unlock(&irq_ptr->setup_mutex);
  1148. return rc;
  1149. }
  1150. EXPORT_SYMBOL_GPL(qdio_activate);
  1151. static inline int buf_in_between(int bufnr, int start, int count)
  1152. {
  1153. int end = add_buf(start, count);
  1154. if (end > start) {
  1155. if (bufnr >= start && bufnr < end)
  1156. return 1;
  1157. else
  1158. return 0;
  1159. }
  1160. /* wrap-around case */
  1161. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1162. (bufnr < end))
  1163. return 1;
  1164. else
  1165. return 0;
  1166. }
  1167. /**
  1168. * handle_inbound - reset processed input buffers
  1169. * @q: queue containing the buffers
  1170. * @callflags: flags
  1171. * @bufnr: first buffer to process
  1172. * @count: how many buffers are emptied
  1173. */
  1174. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1175. int bufnr, int count)
  1176. {
  1177. int used, diff;
  1178. qperf_inc(q, inbound_call);
  1179. if (!q->u.in.polling)
  1180. goto set;
  1181. /* protect against stop polling setting an ACK for an emptied slsb */
  1182. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1183. /* overwriting everything, just delete polling status */
  1184. q->u.in.polling = 0;
  1185. q->u.in.ack_count = 0;
  1186. goto set;
  1187. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1188. if (is_qebsm(q)) {
  1189. /* partial overwrite, just update ack_start */
  1190. diff = add_buf(bufnr, count);
  1191. diff = sub_buf(diff, q->u.in.ack_start);
  1192. q->u.in.ack_count -= diff;
  1193. if (q->u.in.ack_count <= 0) {
  1194. q->u.in.polling = 0;
  1195. q->u.in.ack_count = 0;
  1196. goto set;
  1197. }
  1198. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1199. }
  1200. else
  1201. /* the only ACK will be deleted, so stop polling */
  1202. q->u.in.polling = 0;
  1203. }
  1204. set:
  1205. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1206. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1207. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1208. /* no need to signal as long as the adapter had free buffers */
  1209. if (used)
  1210. return 0;
  1211. if (need_siga_in(q))
  1212. return qdio_siga_input(q);
  1213. return 0;
  1214. }
  1215. /**
  1216. * handle_outbound - process filled outbound buffers
  1217. * @q: queue containing the buffers
  1218. * @callflags: flags
  1219. * @bufnr: first buffer to process
  1220. * @count: how many buffers are filled
  1221. */
  1222. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1223. int bufnr, int count)
  1224. {
  1225. unsigned char state;
  1226. int used, rc = 0;
  1227. qperf_inc(q, outbound_call);
  1228. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1229. used = atomic_add_return(count, &q->nr_buf_used);
  1230. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1231. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1232. qperf_inc(q, outbound_queue_full);
  1233. if (callflags & QDIO_FLAG_PCI_OUT) {
  1234. q->u.out.pci_out_enabled = 1;
  1235. qperf_inc(q, pci_request_int);
  1236. } else
  1237. q->u.out.pci_out_enabled = 0;
  1238. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1239. /* One SIGA-W per buffer required for unicast HiperSockets. */
  1240. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1241. rc = qdio_kick_outbound_q(q);
  1242. } else if (need_siga_sync(q)) {
  1243. rc = qdio_siga_sync_q(q);
  1244. } else {
  1245. /* try to fast requeue buffers */
  1246. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1247. if (state != SLSB_CU_OUTPUT_PRIMED)
  1248. rc = qdio_kick_outbound_q(q);
  1249. else
  1250. qperf_inc(q, fast_requeue);
  1251. }
  1252. /* in case of SIGA errors we must process the error immediately */
  1253. if (used >= q->u.out.scan_threshold || rc)
  1254. tasklet_schedule(&q->tasklet);
  1255. else
  1256. /* free the SBALs in case of no further traffic */
  1257. if (!timer_pending(&q->u.out.timer))
  1258. mod_timer(&q->u.out.timer, jiffies + HZ);
  1259. return rc;
  1260. }
  1261. /**
  1262. * do_QDIO - process input or output buffers
  1263. * @cdev: associated ccw_device for the qdio subchannel
  1264. * @callflags: input or output and special flags from the program
  1265. * @q_nr: queue number
  1266. * @bufnr: buffer number
  1267. * @count: how many buffers to process
  1268. */
  1269. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1270. int q_nr, unsigned int bufnr, unsigned int count)
  1271. {
  1272. struct qdio_irq *irq_ptr;
  1273. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1274. return -EINVAL;
  1275. irq_ptr = cdev->private->qdio_data;
  1276. if (!irq_ptr)
  1277. return -ENODEV;
  1278. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1279. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1280. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1281. return -EBUSY;
  1282. if (!count)
  1283. return 0;
  1284. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1285. return handle_inbound(irq_ptr->input_qs[q_nr],
  1286. callflags, bufnr, count);
  1287. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1288. return handle_outbound(irq_ptr->output_qs[q_nr],
  1289. callflags, bufnr, count);
  1290. return -EINVAL;
  1291. }
  1292. EXPORT_SYMBOL_GPL(do_QDIO);
  1293. /**
  1294. * qdio_start_irq - process input buffers
  1295. * @cdev: associated ccw_device for the qdio subchannel
  1296. * @nr: input queue number
  1297. *
  1298. * Return codes
  1299. * 0 - success
  1300. * 1 - irqs not started since new data is available
  1301. */
  1302. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1303. {
  1304. struct qdio_q *q;
  1305. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1306. if (!irq_ptr)
  1307. return -ENODEV;
  1308. q = irq_ptr->input_qs[nr];
  1309. WARN_ON(queue_irqs_enabled(q));
  1310. if (!shared_ind(q->irq_ptr->dsci))
  1311. xchg(q->irq_ptr->dsci, 0);
  1312. qdio_stop_polling(q);
  1313. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1314. /*
  1315. * We need to check again to not lose initiative after
  1316. * resetting the ACK state.
  1317. */
  1318. if (!shared_ind(q->irq_ptr->dsci) && *q->irq_ptr->dsci)
  1319. goto rescan;
  1320. if (!qdio_inbound_q_done(q))
  1321. goto rescan;
  1322. return 0;
  1323. rescan:
  1324. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1325. &q->u.in.queue_irq_state))
  1326. return 0;
  1327. else
  1328. return 1;
  1329. }
  1330. EXPORT_SYMBOL(qdio_start_irq);
  1331. /**
  1332. * qdio_get_next_buffers - process input buffers
  1333. * @cdev: associated ccw_device for the qdio subchannel
  1334. * @nr: input queue number
  1335. * @bufnr: first filled buffer number
  1336. * @error: buffers are in error state
  1337. *
  1338. * Return codes
  1339. * < 0 - error
  1340. * = 0 - no new buffers found
  1341. * > 0 - number of processed buffers
  1342. */
  1343. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1344. int *error)
  1345. {
  1346. struct qdio_q *q;
  1347. int start, end;
  1348. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1349. if (!irq_ptr)
  1350. return -ENODEV;
  1351. q = irq_ptr->input_qs[nr];
  1352. WARN_ON(queue_irqs_enabled(q));
  1353. /*
  1354. * Cannot rely on automatic sync after interrupt since queues may
  1355. * also be examined without interrupt.
  1356. */
  1357. if (need_siga_sync(q))
  1358. qdio_sync_queues(q);
  1359. /* check the PCI capable outbound queues. */
  1360. qdio_check_outbound_after_thinint(q);
  1361. if (!qdio_inbound_q_moved(q))
  1362. return 0;
  1363. /* Note: upper-layer MUST stop processing immediately here ... */
  1364. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1365. return -EIO;
  1366. start = q->first_to_kick;
  1367. end = q->first_to_check;
  1368. *bufnr = start;
  1369. *error = q->qdio_error;
  1370. /* for the next time */
  1371. q->first_to_kick = end;
  1372. q->qdio_error = 0;
  1373. return sub_buf(end, start);
  1374. }
  1375. EXPORT_SYMBOL(qdio_get_next_buffers);
  1376. /**
  1377. * qdio_stop_irq - disable interrupt processing for the device
  1378. * @cdev: associated ccw_device for the qdio subchannel
  1379. * @nr: input queue number
  1380. *
  1381. * Return codes
  1382. * 0 - interrupts were already disabled
  1383. * 1 - interrupts successfully disabled
  1384. */
  1385. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1386. {
  1387. struct qdio_q *q;
  1388. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1389. if (!irq_ptr)
  1390. return -ENODEV;
  1391. q = irq_ptr->input_qs[nr];
  1392. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1393. &q->u.in.queue_irq_state))
  1394. return 0;
  1395. else
  1396. return 1;
  1397. }
  1398. EXPORT_SYMBOL(qdio_stop_irq);
  1399. static int __init init_QDIO(void)
  1400. {
  1401. int rc;
  1402. rc = qdio_setup_init();
  1403. if (rc)
  1404. return rc;
  1405. rc = tiqdio_allocate_memory();
  1406. if (rc)
  1407. goto out_cache;
  1408. rc = qdio_debug_init();
  1409. if (rc)
  1410. goto out_ti;
  1411. rc = tiqdio_register_thinints();
  1412. if (rc)
  1413. goto out_debug;
  1414. return 0;
  1415. out_debug:
  1416. qdio_debug_exit();
  1417. out_ti:
  1418. tiqdio_free_memory();
  1419. out_cache:
  1420. qdio_setup_exit();
  1421. return rc;
  1422. }
  1423. static void __exit exit_QDIO(void)
  1424. {
  1425. tiqdio_unregister_thinints();
  1426. tiqdio_free_memory();
  1427. qdio_debug_exit();
  1428. qdio_setup_exit();
  1429. }
  1430. module_init(init_QDIO);
  1431. module_exit(exit_QDIO);