mac.c 33 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #include <linux/module.h>
  30. #include "../wifi.h"
  31. #include "../pci.h"
  32. #include "../usb.h"
  33. #include "../ps.h"
  34. #include "../cam.h"
  35. #include "reg.h"
  36. #include "def.h"
  37. #include "phy.h"
  38. #include "rf.h"
  39. #include "dm.h"
  40. #include "mac.h"
  41. #include "trx.h"
  42. /* macro to shorten lines */
  43. #define LINK_Q ui_link_quality
  44. #define RX_EVM rx_evm_percentage
  45. #define RX_SIGQ rx_mimo_signalquality
  46. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  47. {
  48. struct rtl_priv *rtlpriv = rtl_priv(hw);
  49. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  50. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  51. enum version_8192c chip_version = VERSION_UNKNOWN;
  52. u32 value32;
  53. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  54. if (value32 & TRP_VAUX_EN) {
  55. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  56. VERSION_TEST_CHIP_88C;
  57. } else {
  58. /* Normal mass production chip. */
  59. chip_version = NORMAL_CHIP;
  60. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  61. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  62. /* RTL8723 with BT function. */
  63. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  64. if (IS_VENDOR_UMC(chip_version))
  65. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  66. CHIP_VENDOR_UMC_B_CUT : 0);
  67. if (IS_92C_SERIAL(chip_version)) {
  68. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  69. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  70. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  71. } else if (IS_8723_SERIES(chip_version)) {
  72. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  73. chip_version |= ((value32 & RF_RL_ID) ?
  74. CHIP_8723_DRV_REV : 0);
  75. }
  76. }
  77. rtlhal->version = (enum version_8192c)chip_version;
  78. switch (rtlhal->version) {
  79. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  80. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  81. ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
  82. break;
  83. case VERSION_NORMAL_TSMC_CHIP_92C:
  84. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  85. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
  86. break;
  87. case VERSION_NORMAL_TSMC_CHIP_88C:
  88. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  89. ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
  90. break;
  91. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  92. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  93. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
  94. "92C_1T2R_A_CUT.\n"));
  95. break;
  96. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  97. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  98. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
  99. "92C_A_CUT.\n"));
  100. break;
  101. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  102. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  103. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  104. "_88C_A_CUT.\n"));
  105. break;
  106. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  107. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  108. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  109. "_92C_1T2R_B_CUT.\n"));
  110. break;
  111. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  112. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  113. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  114. "_92C_B_CUT.\n"));
  115. break;
  116. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  117. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  118. ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
  119. "_88C_B_CUT.\n"));
  120. break;
  121. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  122. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  123. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  124. "_8723_1T1R_A_CUT.\n"));
  125. break;
  126. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  127. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  128. ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
  129. "_8723_1T1R_B_CUT.\n"));
  130. break;
  131. case VERSION_TEST_CHIP_92C:
  132. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  133. ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
  134. break;
  135. case VERSION_TEST_CHIP_88C:
  136. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  137. ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
  138. break;
  139. default:
  140. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  141. ("Chip Version ID: ???????????????.\n"));
  142. break;
  143. }
  144. if (IS_92C_SERIAL(rtlhal->version))
  145. rtlphy->rf_type =
  146. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  147. else
  148. rtlphy->rf_type = RF_1T1R;
  149. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  150. ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
  151. "RF_2T2R" : "RF_1T1R"));
  152. if (get_rf_type(rtlphy) == RF_1T1R)
  153. rtlpriv->dm.rfpath_rxenable[0] = true;
  154. else
  155. rtlpriv->dm.rfpath_rxenable[0] =
  156. rtlpriv->dm.rfpath_rxenable[1] = true;
  157. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
  158. rtlhal->version));
  159. }
  160. /**
  161. * writeLLT - LLT table write access
  162. * @io: io callback
  163. * @address: LLT logical address.
  164. * @data: LLT data content
  165. *
  166. * Realtek hardware access function.
  167. *
  168. */
  169. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  170. {
  171. struct rtl_priv *rtlpriv = rtl_priv(hw);
  172. bool status = true;
  173. long count = 0;
  174. u32 value = _LLT_INIT_ADDR(address) |
  175. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  176. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  177. do {
  178. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  179. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  180. break;
  181. if (count > POLLING_LLT_THRESHOLD) {
  182. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  183. ("Failed to polling write LLT done at"
  184. " address %d! _LLT_OP_VALUE(%x)\n",
  185. address, _LLT_OP_VALUE(value)));
  186. status = false;
  187. break;
  188. }
  189. } while (++count);
  190. return status;
  191. }
  192. /**
  193. * rtl92c_init_LLT_table - Init LLT table
  194. * @io: io callback
  195. * @boundary:
  196. *
  197. * Realtek hardware access function.
  198. *
  199. */
  200. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  201. {
  202. bool rst = true;
  203. u32 i;
  204. for (i = 0; i < (boundary - 1); i++) {
  205. rst = rtl92c_llt_write(hw, i , i + 1);
  206. if (true != rst) {
  207. printk(KERN_ERR "===> %s #1 fail\n", __func__);
  208. return rst;
  209. }
  210. }
  211. /* end of list */
  212. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  213. if (true != rst) {
  214. printk(KERN_ERR "===> %s #2 fail\n", __func__);
  215. return rst;
  216. }
  217. /* Make the other pages as ring buffer
  218. * This ring buffer is used as beacon buffer if we config this MAC
  219. * as two MAC transfer.
  220. * Otherwise used as local loopback buffer.
  221. */
  222. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  223. rst = rtl92c_llt_write(hw, i, (i + 1));
  224. if (true != rst) {
  225. printk(KERN_ERR "===> %s #3 fail\n", __func__);
  226. return rst;
  227. }
  228. }
  229. /* Let last entry point to the start entry of ring buffer */
  230. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  231. if (true != rst) {
  232. printk(KERN_ERR "===> %s #4 fail\n", __func__);
  233. return rst;
  234. }
  235. return rst;
  236. }
  237. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  238. u8 *p_macaddr, bool is_group, u8 enc_algo,
  239. bool is_wepkey, bool clear_all)
  240. {
  241. struct rtl_priv *rtlpriv = rtl_priv(hw);
  242. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  243. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  244. u8 *macaddr = p_macaddr;
  245. u32 entry_id = 0;
  246. bool is_pairwise = false;
  247. static u8 cam_const_addr[4][6] = {
  248. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  249. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  250. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  251. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  252. };
  253. static u8 cam_const_broad[] = {
  254. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  255. };
  256. if (clear_all) {
  257. u8 idx = 0;
  258. u8 cam_offset = 0;
  259. u8 clear_number = 5;
  260. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
  261. for (idx = 0; idx < clear_number; idx++) {
  262. rtl_cam_mark_invalid(hw, cam_offset + idx);
  263. rtl_cam_empty_entry(hw, cam_offset + idx);
  264. if (idx < 5) {
  265. memset(rtlpriv->sec.key_buf[idx], 0,
  266. MAX_KEY_LEN);
  267. rtlpriv->sec.key_len[idx] = 0;
  268. }
  269. }
  270. } else {
  271. switch (enc_algo) {
  272. case WEP40_ENCRYPTION:
  273. enc_algo = CAM_WEP40;
  274. break;
  275. case WEP104_ENCRYPTION:
  276. enc_algo = CAM_WEP104;
  277. break;
  278. case TKIP_ENCRYPTION:
  279. enc_algo = CAM_TKIP;
  280. break;
  281. case AESCCMP_ENCRYPTION:
  282. enc_algo = CAM_AES;
  283. break;
  284. default:
  285. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  286. ("iillegal switch case\n"));
  287. enc_algo = CAM_TKIP;
  288. break;
  289. }
  290. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  291. macaddr = cam_const_addr[key_index];
  292. entry_id = key_index;
  293. } else {
  294. if (is_group) {
  295. macaddr = cam_const_broad;
  296. entry_id = key_index;
  297. } else {
  298. key_index = PAIRWISE_KEYIDX;
  299. entry_id = CAM_PAIRWISE_KEY_POSITION;
  300. is_pairwise = true;
  301. }
  302. }
  303. if (rtlpriv->sec.key_len[key_index] == 0) {
  304. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  305. ("delete one entry\n"));
  306. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  307. } else {
  308. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  309. ("The insert KEY length is %d\n",
  310. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
  311. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  312. ("The insert KEY is %x %x\n",
  313. rtlpriv->sec.key_buf[0][0],
  314. rtlpriv->sec.key_buf[0][1]));
  315. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  316. ("add one entry\n"));
  317. if (is_pairwise) {
  318. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  319. "Pairwiase Key content :",
  320. rtlpriv->sec.pairwise_key,
  321. rtlpriv->sec.
  322. key_len[PAIRWISE_KEYIDX]);
  323. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  324. ("set Pairwiase key\n"));
  325. rtl_cam_add_one_entry(hw, macaddr, key_index,
  326. entry_id, enc_algo,
  327. CAM_CONFIG_NO_USEDK,
  328. rtlpriv->sec.
  329. key_buf[key_index]);
  330. } else {
  331. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  332. ("set group key\n"));
  333. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  334. rtl_cam_add_one_entry(hw,
  335. rtlefuse->dev_addr,
  336. PAIRWISE_KEYIDX,
  337. CAM_PAIRWISE_KEY_POSITION,
  338. enc_algo,
  339. CAM_CONFIG_NO_USEDK,
  340. rtlpriv->sec.key_buf
  341. [entry_id]);
  342. }
  343. rtl_cam_add_one_entry(hw, macaddr, key_index,
  344. entry_id, enc_algo,
  345. CAM_CONFIG_NO_USEDK,
  346. rtlpriv->sec.key_buf[entry_id]);
  347. }
  348. }
  349. }
  350. }
  351. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  352. {
  353. struct rtl_priv *rtlpriv = rtl_priv(hw);
  354. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  355. }
  356. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  357. {
  358. struct rtl_priv *rtlpriv = rtl_priv(hw);
  359. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  360. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  361. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  362. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  363. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  364. 0xFFFFFFFF);
  365. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  366. 0xFFFFFFFF);
  367. rtlpci->irq_enabled = true;
  368. } else {
  369. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  370. 0xFFFFFFFF);
  371. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  372. 0xFFFFFFFF);
  373. rtlusb->irq_enabled = true;
  374. }
  375. }
  376. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  377. {
  378. rtl92c_enable_interrupt(hw);
  379. }
  380. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  381. {
  382. struct rtl_priv *rtlpriv = rtl_priv(hw);
  383. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  384. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  385. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  386. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  387. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  388. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  389. rtlpci->irq_enabled = false;
  390. else if (IS_HARDWARE_TYPE_8192CU(rtlhal))
  391. rtlusb->irq_enabled = false;
  392. }
  393. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  394. {
  395. struct rtl_priv *rtlpriv = rtl_priv(hw);
  396. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  397. u32 u4b_ac_param;
  398. rtl92c_dm_init_edca_turbo(hw);
  399. u4b_ac_param = (u32) mac->ac[aci].aifs;
  400. u4b_ac_param |=
  401. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  402. AC_PARAM_ECW_MIN_OFFSET;
  403. u4b_ac_param |=
  404. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  405. AC_PARAM_ECW_MAX_OFFSET;
  406. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  407. AC_PARAM_TXOP_OFFSET;
  408. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
  409. ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
  410. switch (aci) {
  411. case AC1_BK:
  412. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  413. break;
  414. case AC0_BE:
  415. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  416. break;
  417. case AC2_VI:
  418. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  419. break;
  420. case AC3_VO:
  421. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  422. break;
  423. default:
  424. RT_ASSERT(false, ("invalid aci: %d !\n", aci));
  425. break;
  426. }
  427. }
  428. /*-------------------------------------------------------------------------
  429. * HW MAC Address
  430. *-------------------------------------------------------------------------*/
  431. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  432. {
  433. u32 i;
  434. struct rtl_priv *rtlpriv = rtl_priv(hw);
  435. for (i = 0 ; i < ETH_ALEN ; i++)
  436. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  437. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
  438. "%02X-%02X-%02X\n",
  439. rtl_read_byte(rtlpriv, REG_MACID),
  440. rtl_read_byte(rtlpriv, REG_MACID+1),
  441. rtl_read_byte(rtlpriv, REG_MACID+2),
  442. rtl_read_byte(rtlpriv, REG_MACID+3),
  443. rtl_read_byte(rtlpriv, REG_MACID+4),
  444. rtl_read_byte(rtlpriv, REG_MACID+5)));
  445. }
  446. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  447. {
  448. struct rtl_priv *rtlpriv = rtl_priv(hw);
  449. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  450. }
  451. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  452. {
  453. u8 value;
  454. struct rtl_priv *rtlpriv = rtl_priv(hw);
  455. switch (type) {
  456. case NL80211_IFTYPE_UNSPECIFIED:
  457. value = NT_NO_LINK;
  458. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  459. ("Set Network type to NO LINK!\n"));
  460. break;
  461. case NL80211_IFTYPE_ADHOC:
  462. value = NT_LINK_AD_HOC;
  463. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  464. ("Set Network type to Ad Hoc!\n"));
  465. break;
  466. case NL80211_IFTYPE_STATION:
  467. value = NT_LINK_AP;
  468. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  469. ("Set Network type to STA!\n"));
  470. break;
  471. case NL80211_IFTYPE_AP:
  472. value = NT_AS_AP;
  473. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  474. ("Set Network type to AP!\n"));
  475. break;
  476. default:
  477. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  478. ("Network type %d not support!\n", type));
  479. return -EOPNOTSUPP;
  480. }
  481. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  482. return 0;
  483. }
  484. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  485. {
  486. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  487. }
  488. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  489. {
  490. u16 value16;
  491. u32 value32;
  492. struct rtl_priv *rtlpriv = rtl_priv(hw);
  493. /* Response Rate Set */
  494. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  495. value32 &= ~RATE_BITMAP_ALL;
  496. value32 |= RATE_RRSR_CCK_ONLY_1M;
  497. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  498. /* SIFS (used in NAV) */
  499. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  500. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  501. /* Retry Limit */
  502. value16 = _LRL(0x30) | _SRL(0x30);
  503. rtl_write_dword(rtlpriv, REG_RL, value16);
  504. }
  505. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  506. {
  507. struct rtl_priv *rtlpriv = rtl_priv(hw);
  508. /* Set Data Auto Rate Fallback Retry Count register. */
  509. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  510. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  511. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  512. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  513. }
  514. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  515. u8 ctx_sifs)
  516. {
  517. struct rtl_priv *rtlpriv = rtl_priv(hw);
  518. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  519. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  520. }
  521. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  522. u8 ctx_sifs)
  523. {
  524. struct rtl_priv *rtlpriv = rtl_priv(hw);
  525. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  526. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  527. }
  528. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  529. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  530. {
  531. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  532. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  533. */
  534. u32 value;
  535. struct rtl_priv *rtlpriv = rtl_priv(hw);
  536. value = (u32)aifs;
  537. value |= ((u32)cw_min & 0xF) << 8;
  538. value |= ((u32)cw_max & 0xF) << 12;
  539. value |= (u32)txop << 16;
  540. /* 92C hardware register sequence is the same as queue number. */
  541. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  542. }
  543. void rtl92c_init_edca(struct ieee80211_hw *hw)
  544. {
  545. u16 value16;
  546. struct rtl_priv *rtlpriv = rtl_priv(hw);
  547. /* disable EDCCA count down, to reduce collison and retry */
  548. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  549. value16 |= DIS_EDCA_CNT_DWN;
  550. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  551. /* Update SIFS timing. ??????????
  552. * pHalData->SifsTime = 0x0e0e0a0a; */
  553. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  554. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  555. /* Set CCK/OFDM SIFS to be 10us. */
  556. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  557. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  558. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  559. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  560. /* TXOP */
  561. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  562. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  563. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  564. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  565. /* PIFS */
  566. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  567. /* AGGR BREAK TIME Register */
  568. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  569. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  570. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  571. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  572. }
  573. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  574. {
  575. struct rtl_priv *rtlpriv = rtl_priv(hw);
  576. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  577. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  578. /* init AMPDU aggregation number, tuning for Tx's TP, */
  579. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  580. }
  581. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  582. {
  583. struct rtl_priv *rtlpriv = rtl_priv(hw);
  584. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  585. }
  586. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  587. {
  588. struct rtl_priv *rtlpriv = rtl_priv(hw);
  589. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  590. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  591. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  592. }
  593. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  594. {
  595. u8 value8;
  596. struct rtl_priv *rtlpriv = rtl_priv(hw);
  597. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  598. value8 |= EN_AMPDU_RTY_NEW;
  599. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  600. /* Set ACK timeout */
  601. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  602. }
  603. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  604. enum version_8192c version)
  605. {
  606. struct rtl_priv *rtlpriv = rtl_priv(hw);
  607. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  608. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  609. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  610. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  611. if (IS_NORMAL_CHIP(rtlhal->version))
  612. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  613. else
  614. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  615. }
  616. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  617. {
  618. struct rtl_priv *rtlpriv = rtl_priv(hw);
  619. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  620. }
  621. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  622. {
  623. struct rtl_priv *rtlpriv = rtl_priv(hw);
  624. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  625. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  626. }
  627. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  628. {
  629. struct rtl_priv *rtlpriv = rtl_priv(hw);
  630. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  631. }
  632. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  633. {
  634. struct rtl_priv *rtlpriv = rtl_priv(hw);
  635. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  636. }
  637. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  638. {
  639. struct rtl_priv *rtlpriv = rtl_priv(hw);
  640. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  641. }
  642. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  643. {
  644. struct rtl_priv *rtlpriv = rtl_priv(hw);
  645. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  646. }
  647. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  648. {
  649. struct rtl_priv *rtlpriv = rtl_priv(hw);
  650. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  651. }
  652. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  653. {
  654. struct rtl_priv *rtlpriv = rtl_priv(hw);
  655. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  656. }
  657. /*==============================================================*/
  658. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  659. {
  660. if ((antpower <= -100) || (antpower >= 20))
  661. return 0;
  662. else if (antpower >= 0)
  663. return 100;
  664. else
  665. return 100 + antpower;
  666. }
  667. static u8 _rtl92c_evm_db_to_percentage(char value)
  668. {
  669. char ret_val;
  670. ret_val = value;
  671. if (ret_val >= 0)
  672. ret_val = 0;
  673. if (ret_val <= -33)
  674. ret_val = -33;
  675. ret_val = 0 - ret_val;
  676. ret_val *= 3;
  677. if (ret_val == 99)
  678. ret_val = 100;
  679. return ret_val;
  680. }
  681. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  682. u8 signal_strength_index)
  683. {
  684. long signal_power;
  685. signal_power = (long)((signal_strength_index + 1) >> 1);
  686. signal_power -= 95;
  687. return signal_power;
  688. }
  689. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  690. long currsig)
  691. {
  692. long retsig;
  693. if (currsig >= 61 && currsig <= 100)
  694. retsig = 90 + ((currsig - 60) / 4);
  695. else if (currsig >= 41 && currsig <= 60)
  696. retsig = 78 + ((currsig - 40) / 2);
  697. else if (currsig >= 31 && currsig <= 40)
  698. retsig = 66 + (currsig - 30);
  699. else if (currsig >= 21 && currsig <= 30)
  700. retsig = 54 + (currsig - 20);
  701. else if (currsig >= 5 && currsig <= 20)
  702. retsig = 42 + (((currsig - 5) * 2) / 3);
  703. else if (currsig == 4)
  704. retsig = 36;
  705. else if (currsig == 3)
  706. retsig = 27;
  707. else if (currsig == 2)
  708. retsig = 18;
  709. else if (currsig == 1)
  710. retsig = 9;
  711. else
  712. retsig = currsig;
  713. return retsig;
  714. }
  715. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  716. struct rtl_stats *pstats,
  717. struct rx_desc_92c *pdesc,
  718. struct rx_fwinfo_92c *p_drvinfo,
  719. bool packet_match_bssid,
  720. bool packet_toself,
  721. bool packet_beacon)
  722. {
  723. struct rtl_priv *rtlpriv = rtl_priv(hw);
  724. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  725. struct phy_sts_cck_8192s_t *cck_buf;
  726. s8 rx_pwr_all = 0, rx_pwr[4];
  727. u8 rf_rx_num = 0, evm, pwdb_all;
  728. u8 i, max_spatial_stream;
  729. u32 rssi, total_rssi = 0;
  730. bool in_powersavemode = false;
  731. bool is_cck_rate;
  732. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  733. pstats->packet_matchbssid = packet_match_bssid;
  734. pstats->packet_toself = packet_toself;
  735. pstats->is_cck = is_cck_rate;
  736. pstats->packet_beacon = packet_beacon;
  737. pstats->is_cck = is_cck_rate;
  738. pstats->RX_SIGQ[0] = -1;
  739. pstats->RX_SIGQ[1] = -1;
  740. if (is_cck_rate) {
  741. u8 report, cck_highpwr;
  742. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  743. if (!in_powersavemode)
  744. cck_highpwr = rtlphy->cck_high_power;
  745. else
  746. cck_highpwr = false;
  747. if (!cck_highpwr) {
  748. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  749. report = cck_buf->cck_agc_rpt & 0xc0;
  750. report = report >> 6;
  751. switch (report) {
  752. case 0x3:
  753. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  754. break;
  755. case 0x2:
  756. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  757. break;
  758. case 0x1:
  759. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  760. break;
  761. case 0x0:
  762. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  763. break;
  764. }
  765. } else {
  766. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  767. report = p_drvinfo->cfosho[0] & 0x60;
  768. report = report >> 5;
  769. switch (report) {
  770. case 0x3:
  771. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  772. break;
  773. case 0x2:
  774. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  775. break;
  776. case 0x1:
  777. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  778. break;
  779. case 0x0:
  780. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  781. break;
  782. }
  783. }
  784. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  785. pstats->rx_pwdb_all = pwdb_all;
  786. pstats->recvsignalpower = rx_pwr_all;
  787. if (packet_match_bssid) {
  788. u8 sq;
  789. if (pstats->rx_pwdb_all > 40)
  790. sq = 100;
  791. else {
  792. sq = cck_buf->sq_rpt;
  793. if (sq > 64)
  794. sq = 0;
  795. else if (sq < 20)
  796. sq = 100;
  797. else
  798. sq = ((64 - sq) * 100) / 44;
  799. }
  800. pstats->signalquality = sq;
  801. pstats->RX_SIGQ[0] = sq;
  802. pstats->RX_SIGQ[1] = -1;
  803. }
  804. } else {
  805. rtlpriv->dm.rfpath_rxenable[0] =
  806. rtlpriv->dm.rfpath_rxenable[1] = true;
  807. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  808. if (rtlpriv->dm.rfpath_rxenable[i])
  809. rf_rx_num++;
  810. rx_pwr[i] =
  811. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  812. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  813. total_rssi += rssi;
  814. rtlpriv->stats.rx_snr_db[i] =
  815. (long)(p_drvinfo->rxsnr[i] / 2);
  816. if (packet_match_bssid)
  817. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  818. }
  819. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  820. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  821. pstats->rx_pwdb_all = pwdb_all;
  822. pstats->rxpower = rx_pwr_all;
  823. pstats->recvsignalpower = rx_pwr_all;
  824. if (GET_RX_DESC_RX_MCS(pdesc) &&
  825. GET_RX_DESC_RX_MCS(pdesc) >= DESC92C_RATEMCS8 &&
  826. GET_RX_DESC_RX_MCS(pdesc) <= DESC92C_RATEMCS15)
  827. max_spatial_stream = 2;
  828. else
  829. max_spatial_stream = 1;
  830. for (i = 0; i < max_spatial_stream; i++) {
  831. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  832. if (packet_match_bssid) {
  833. if (i == 0)
  834. pstats->signalquality =
  835. (u8) (evm & 0xff);
  836. pstats->RX_SIGQ[i] =
  837. (u8) (evm & 0xff);
  838. }
  839. }
  840. }
  841. if (is_cck_rate)
  842. pstats->signalstrength =
  843. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  844. else if (rf_rx_num != 0)
  845. pstats->signalstrength =
  846. (u8) (_rtl92c_signal_scale_mapping
  847. (hw, total_rssi /= rf_rx_num));
  848. }
  849. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  850. struct rtl_stats *pstats)
  851. {
  852. struct rtl_priv *rtlpriv = rtl_priv(hw);
  853. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  854. u8 rfpath;
  855. u32 last_rssi, tmpval;
  856. if (pstats->packet_toself || pstats->packet_beacon) {
  857. rtlpriv->stats.rssi_calculate_cnt++;
  858. if (rtlpriv->stats.ui_rssi.total_num++ >=
  859. PHY_RSSI_SLID_WIN_MAX) {
  860. rtlpriv->stats.ui_rssi.total_num =
  861. PHY_RSSI_SLID_WIN_MAX;
  862. last_rssi =
  863. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  864. stats.ui_rssi.index];
  865. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  866. }
  867. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  868. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  869. index++] = pstats->signalstrength;
  870. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  871. rtlpriv->stats.ui_rssi.index = 0;
  872. tmpval = rtlpriv->stats.ui_rssi.total_val /
  873. rtlpriv->stats.ui_rssi.total_num;
  874. rtlpriv->stats.signal_strength =
  875. _rtl92c_translate_todbm(hw, (u8) tmpval);
  876. pstats->rssi = rtlpriv->stats.signal_strength;
  877. }
  878. if (!pstats->is_cck && pstats->packet_toself) {
  879. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  880. rfpath++) {
  881. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  882. continue;
  883. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  884. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  885. pstats->rx_mimo_signalstrength[rfpath];
  886. }
  887. if (pstats->rx_mimo_signalstrength[rfpath] >
  888. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  889. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  890. ((rtlpriv->stats.
  891. rx_rssi_percentage[rfpath] *
  892. (RX_SMOOTH_FACTOR - 1)) +
  893. (pstats->rx_mimo_signalstrength[rfpath])) /
  894. (RX_SMOOTH_FACTOR);
  895. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  896. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  897. 1;
  898. } else {
  899. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  900. ((rtlpriv->stats.
  901. rx_rssi_percentage[rfpath] *
  902. (RX_SMOOTH_FACTOR - 1)) +
  903. (pstats->rx_mimo_signalstrength[rfpath])) /
  904. (RX_SMOOTH_FACTOR);
  905. }
  906. }
  907. }
  908. }
  909. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  910. struct rtl_stats *pstats)
  911. {
  912. struct rtl_priv *rtlpriv = rtl_priv(hw);
  913. int weighting = 0;
  914. if (rtlpriv->stats.recv_signal_power == 0)
  915. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  916. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  917. weighting = 5;
  918. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  919. weighting = (-5);
  920. rtlpriv->stats.recv_signal_power =
  921. (rtlpriv->stats.recv_signal_power * 5 +
  922. pstats->recvsignalpower + weighting) / 6;
  923. }
  924. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  925. struct rtl_stats *pstats)
  926. {
  927. struct rtl_priv *rtlpriv = rtl_priv(hw);
  928. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  929. long undecorated_smoothed_pwdb = 0;
  930. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  931. return;
  932. } else {
  933. undecorated_smoothed_pwdb =
  934. rtlpriv->dm.undecorated_smoothed_pwdb;
  935. }
  936. if (pstats->packet_toself || pstats->packet_beacon) {
  937. if (undecorated_smoothed_pwdb < 0)
  938. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  939. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  940. undecorated_smoothed_pwdb =
  941. (((undecorated_smoothed_pwdb) *
  942. (RX_SMOOTH_FACTOR - 1)) +
  943. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  944. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  945. + 1;
  946. } else {
  947. undecorated_smoothed_pwdb =
  948. (((undecorated_smoothed_pwdb) *
  949. (RX_SMOOTH_FACTOR - 1)) +
  950. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  951. }
  952. rtlpriv->dm.undecorated_smoothed_pwdb =
  953. undecorated_smoothed_pwdb;
  954. _rtl92c_update_rxsignalstatistics(hw, pstats);
  955. }
  956. }
  957. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  958. struct rtl_stats *pstats)
  959. {
  960. struct rtl_priv *rtlpriv = rtl_priv(hw);
  961. u32 last_evm = 0, n_stream, tmpval;
  962. if (pstats->signalquality != 0) {
  963. if (pstats->packet_toself || pstats->packet_beacon) {
  964. if (rtlpriv->stats.LINK_Q.total_num++ >=
  965. PHY_LINKQUALITY_SLID_WIN_MAX) {
  966. rtlpriv->stats.LINK_Q.total_num =
  967. PHY_LINKQUALITY_SLID_WIN_MAX;
  968. last_evm =
  969. rtlpriv->stats.LINK_Q.elements
  970. [rtlpriv->stats.LINK_Q.index];
  971. rtlpriv->stats.LINK_Q.total_val -=
  972. last_evm;
  973. }
  974. rtlpriv->stats.LINK_Q.total_val +=
  975. pstats->signalquality;
  976. rtlpriv->stats.LINK_Q.elements
  977. [rtlpriv->stats.LINK_Q.index++] =
  978. pstats->signalquality;
  979. if (rtlpriv->stats.LINK_Q.index >=
  980. PHY_LINKQUALITY_SLID_WIN_MAX)
  981. rtlpriv->stats.LINK_Q.index = 0;
  982. tmpval = rtlpriv->stats.LINK_Q.total_val /
  983. rtlpriv->stats.LINK_Q.total_num;
  984. rtlpriv->stats.signal_quality = tmpval;
  985. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  986. for (n_stream = 0; n_stream < 2;
  987. n_stream++) {
  988. if (pstats->RX_SIGQ[n_stream] != -1) {
  989. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  990. rtlpriv->stats.RX_EVM[n_stream]
  991. = pstats->RX_SIGQ[n_stream];
  992. }
  993. rtlpriv->stats.RX_EVM[n_stream] =
  994. ((rtlpriv->stats.RX_EVM
  995. [n_stream] *
  996. (RX_SMOOTH_FACTOR - 1)) +
  997. (pstats->RX_SIGQ
  998. [n_stream] * 1)) /
  999. (RX_SMOOTH_FACTOR);
  1000. }
  1001. }
  1002. }
  1003. } else {
  1004. ;
  1005. }
  1006. }
  1007. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  1008. u8 *buffer,
  1009. struct rtl_stats *pcurrent_stats)
  1010. {
  1011. if (!pcurrent_stats->packet_matchbssid &&
  1012. !pcurrent_stats->packet_beacon)
  1013. return;
  1014. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  1015. _rtl92c_process_pwdb(hw, pcurrent_stats);
  1016. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  1017. }
  1018. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1019. struct sk_buff *skb,
  1020. struct rtl_stats *pstats,
  1021. struct rx_desc_92c *pdesc,
  1022. struct rx_fwinfo_92c *p_drvinfo)
  1023. {
  1024. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1025. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1026. struct ieee80211_hdr *hdr;
  1027. u8 *tmp_buf;
  1028. u8 *praddr;
  1029. u8 *psaddr;
  1030. __le16 fc;
  1031. u16 type, cpu_fc;
  1032. bool packet_matchbssid, packet_toself, packet_beacon;
  1033. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1034. hdr = (struct ieee80211_hdr *)tmp_buf;
  1035. fc = hdr->frame_control;
  1036. cpu_fc = le16_to_cpu(fc);
  1037. type = WLAN_FC_GET_TYPE(fc);
  1038. praddr = hdr->addr1;
  1039. psaddr = hdr->addr2;
  1040. packet_matchbssid =
  1041. ((IEEE80211_FTYPE_CTL != type) &&
  1042. (!compare_ether_addr(mac->bssid,
  1043. (cpu_fc & IEEE80211_FCTL_TODS) ?
  1044. hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
  1045. hdr->addr2 : hdr->addr3)) &&
  1046. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1047. packet_toself = packet_matchbssid &&
  1048. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  1049. if (ieee80211_is_beacon(fc))
  1050. packet_beacon = true;
  1051. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1052. packet_matchbssid, packet_toself,
  1053. packet_beacon);
  1054. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1055. }