rt2x00queue.h 22 KB

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  1. /*
  2. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 queue datastructures and routines
  20. */
  21. #ifndef RT2X00QUEUE_H
  22. #define RT2X00QUEUE_H
  23. #include <linux/prefetch.h>
  24. /**
  25. * DOC: Entry frame size
  26. *
  27. * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  28. * for USB devices this restriction does not apply, but the value of
  29. * 2432 makes sense since it is big enough to contain the maximum fragment
  30. * size according to the ieee802.11 specs.
  31. * The aggregation size depends on support from the driver, but should
  32. * be something around 3840 bytes.
  33. */
  34. #define DATA_FRAME_SIZE 2432
  35. #define MGMT_FRAME_SIZE 256
  36. #define AGGREGATION_SIZE 3840
  37. /**
  38. * enum data_queue_qid: Queue identification
  39. *
  40. * @QID_AC_VO: AC VO queue
  41. * @QID_AC_VI: AC VI queue
  42. * @QID_AC_BE: AC BE queue
  43. * @QID_AC_BK: AC BK queue
  44. * @QID_HCCA: HCCA queue
  45. * @QID_MGMT: MGMT queue (prio queue)
  46. * @QID_RX: RX queue
  47. * @QID_OTHER: None of the above (don't use, only present for completeness)
  48. * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  49. * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  50. */
  51. enum data_queue_qid {
  52. QID_AC_VO = 0,
  53. QID_AC_VI = 1,
  54. QID_AC_BE = 2,
  55. QID_AC_BK = 3,
  56. QID_HCCA = 4,
  57. QID_MGMT = 13,
  58. QID_RX = 14,
  59. QID_OTHER = 15,
  60. QID_BEACON,
  61. QID_ATIM,
  62. };
  63. /**
  64. * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  65. *
  66. * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  67. * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  68. * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  69. * mac80211 but was stripped for processing by the driver.
  70. * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211,
  71. * don't try to pass it back.
  72. * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the
  73. * skb, instead of in the desc field.
  74. */
  75. enum skb_frame_desc_flags {
  76. SKBDESC_DMA_MAPPED_RX = 1 << 0,
  77. SKBDESC_DMA_MAPPED_TX = 1 << 1,
  78. SKBDESC_IV_STRIPPED = 1 << 2,
  79. SKBDESC_NOT_MAC80211 = 1 << 3,
  80. SKBDESC_DESC_IN_SKB = 1 << 4,
  81. };
  82. /**
  83. * struct skb_frame_desc: Descriptor information for the skb buffer
  84. *
  85. * This structure is placed over the driver_data array, this means that
  86. * this structure should not exceed the size of that array (40 bytes).
  87. *
  88. * @flags: Frame flags, see &enum skb_frame_desc_flags.
  89. * @desc_len: Length of the frame descriptor.
  90. * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  91. * @tx_rate_flags: the TX rate flags, used for TX status reporting
  92. * @desc: Pointer to descriptor part of the frame.
  93. * Note that this pointer could point to something outside
  94. * of the scope of the skb->data pointer.
  95. * @iv: IV/EIV data used during encryption/decryption.
  96. * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
  97. * @entry: The entry to which this sk buffer belongs.
  98. */
  99. struct skb_frame_desc {
  100. u8 flags;
  101. u8 desc_len;
  102. u8 tx_rate_idx;
  103. u8 tx_rate_flags;
  104. void *desc;
  105. __le32 iv[2];
  106. dma_addr_t skb_dma;
  107. struct queue_entry *entry;
  108. };
  109. /**
  110. * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
  111. * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
  112. */
  113. static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
  114. {
  115. BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
  116. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  117. return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
  118. }
  119. /**
  120. * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
  121. *
  122. * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
  123. * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
  124. * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value.
  125. * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
  126. * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
  127. * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
  128. * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary.
  129. */
  130. enum rxdone_entry_desc_flags {
  131. RXDONE_SIGNAL_PLCP = BIT(0),
  132. RXDONE_SIGNAL_BITRATE = BIT(1),
  133. RXDONE_SIGNAL_MCS = BIT(2),
  134. RXDONE_MY_BSS = BIT(3),
  135. RXDONE_CRYPTO_IV = BIT(4),
  136. RXDONE_CRYPTO_ICV = BIT(5),
  137. RXDONE_L2PAD = BIT(6),
  138. };
  139. /**
  140. * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags
  141. * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags
  142. * from &rxdone_entry_desc to a signal value type.
  143. */
  144. #define RXDONE_SIGNAL_MASK \
  145. ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS )
  146. /**
  147. * struct rxdone_entry_desc: RX Entry descriptor
  148. *
  149. * Summary of information that has been read from the RX frame descriptor.
  150. *
  151. * @timestamp: RX Timestamp
  152. * @signal: Signal of the received frame.
  153. * @rssi: RSSI of the received frame.
  154. * @size: Data size of the received frame.
  155. * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
  156. * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
  157. * @rate_mode: Rate mode (See @enum rate_modulation).
  158. * @cipher: Cipher type used during decryption.
  159. * @cipher_status: Decryption status.
  160. * @iv: IV/EIV data used during decryption.
  161. * @icv: ICV data used during decryption.
  162. */
  163. struct rxdone_entry_desc {
  164. u64 timestamp;
  165. int signal;
  166. int rssi;
  167. int size;
  168. int flags;
  169. int dev_flags;
  170. u16 rate_mode;
  171. u8 cipher;
  172. u8 cipher_status;
  173. __le32 iv[2];
  174. __le32 icv;
  175. };
  176. /**
  177. * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
  178. *
  179. * Every txdone report has to contain the basic result of the
  180. * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or
  181. * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in
  182. * conjunction with all of these flags but should only be set
  183. * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used
  184. * in conjunction with &TXDONE_FAILURE.
  185. *
  186. * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
  187. * @TXDONE_SUCCESS: Frame was successfully send
  188. * @TXDONE_FALLBACK: Hardware used fallback rates for retries
  189. * @TXDONE_FAILURE: Frame was not successfully send
  190. * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
  191. * frame transmission failed due to excessive retries.
  192. */
  193. enum txdone_entry_desc_flags {
  194. TXDONE_UNKNOWN,
  195. TXDONE_SUCCESS,
  196. TXDONE_FALLBACK,
  197. TXDONE_FAILURE,
  198. TXDONE_EXCESSIVE_RETRY,
  199. TXDONE_AMPDU,
  200. };
  201. /**
  202. * struct txdone_entry_desc: TX done entry descriptor
  203. *
  204. * Summary of information that has been read from the TX frame descriptor
  205. * after the device is done with transmission.
  206. *
  207. * @flags: TX done flags (See &enum txdone_entry_desc_flags).
  208. * @retry: Retry count.
  209. */
  210. struct txdone_entry_desc {
  211. unsigned long flags;
  212. int retry;
  213. };
  214. /**
  215. * enum txentry_desc_flags: Status flags for TX entry descriptor
  216. *
  217. * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
  218. * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
  219. * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
  220. * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
  221. * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
  222. * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
  223. * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
  224. * @ENTRY_TXD_ACK: An ACK is required for this frame.
  225. * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
  226. * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
  227. * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
  228. * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
  229. * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
  230. * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU.
  231. * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth.
  232. * @ENTRY_TXD_HT_SHORT_GI: Use short GI.
  233. * @ENTRY_TXD_HT_MIMO_PS: The receiving STA is in dynamic SM PS mode.
  234. */
  235. enum txentry_desc_flags {
  236. ENTRY_TXD_RTS_FRAME,
  237. ENTRY_TXD_CTS_FRAME,
  238. ENTRY_TXD_GENERATE_SEQ,
  239. ENTRY_TXD_FIRST_FRAGMENT,
  240. ENTRY_TXD_MORE_FRAG,
  241. ENTRY_TXD_REQ_TIMESTAMP,
  242. ENTRY_TXD_BURST,
  243. ENTRY_TXD_ACK,
  244. ENTRY_TXD_RETRY_MODE,
  245. ENTRY_TXD_ENCRYPT,
  246. ENTRY_TXD_ENCRYPT_PAIRWISE,
  247. ENTRY_TXD_ENCRYPT_IV,
  248. ENTRY_TXD_ENCRYPT_MMIC,
  249. ENTRY_TXD_HT_AMPDU,
  250. ENTRY_TXD_HT_BW_40,
  251. ENTRY_TXD_HT_SHORT_GI,
  252. ENTRY_TXD_HT_MIMO_PS,
  253. };
  254. /**
  255. * struct txentry_desc: TX Entry descriptor
  256. *
  257. * Summary of information for the frame descriptor before sending a TX frame.
  258. *
  259. * @flags: Descriptor flags (See &enum queue_entry_flags).
  260. * @length: Length of the entire frame.
  261. * @header_length: Length of 802.11 header.
  262. * @length_high: PLCP length high word.
  263. * @length_low: PLCP length low word.
  264. * @signal: PLCP signal.
  265. * @service: PLCP service.
  266. * @msc: MCS.
  267. * @stbc: STBC.
  268. * @ba_size: BA size.
  269. * @rate_mode: Rate mode (See @enum rate_modulation).
  270. * @mpdu_density: MDPU density.
  271. * @retry_limit: Max number of retries.
  272. * @ifs: IFS value.
  273. * @txop: IFS value for 11n capable chips.
  274. * @cipher: Cipher type used for encryption.
  275. * @key_idx: Key index used for encryption.
  276. * @iv_offset: Position where IV should be inserted by hardware.
  277. * @iv_len: Length of IV data.
  278. */
  279. struct txentry_desc {
  280. unsigned long flags;
  281. u16 length;
  282. u16 header_length;
  283. union {
  284. struct {
  285. u16 length_high;
  286. u16 length_low;
  287. u16 signal;
  288. u16 service;
  289. enum ifs ifs;
  290. } plcp;
  291. struct {
  292. u16 mcs;
  293. u8 stbc;
  294. u8 ba_size;
  295. u8 mpdu_density;
  296. enum txop txop;
  297. } ht;
  298. } u;
  299. enum rate_modulation rate_mode;
  300. short retry_limit;
  301. enum cipher cipher;
  302. u16 key_idx;
  303. u16 iv_offset;
  304. u16 iv_len;
  305. };
  306. /**
  307. * enum queue_entry_flags: Status flags for queue entry
  308. *
  309. * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
  310. * As long as this bit is set, this entry may only be touched
  311. * through the interface structure.
  312. * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
  313. * transfer (either TX or RX depending on the queue). The entry should
  314. * only be touched after the device has signaled it is done with it.
  315. * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
  316. * for the signal to start sending.
  317. * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occured
  318. * while transfering the data to the hardware. No TX status report will
  319. * be expected from the hardware.
  320. * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and
  321. * returned. It is now waiting for the status reporting before the
  322. * entry can be reused again.
  323. */
  324. enum queue_entry_flags {
  325. ENTRY_BCN_ASSIGNED,
  326. ENTRY_OWNER_DEVICE_DATA,
  327. ENTRY_DATA_PENDING,
  328. ENTRY_DATA_IO_FAILED,
  329. ENTRY_DATA_STATUS_PENDING,
  330. };
  331. /**
  332. * struct queue_entry: Entry inside the &struct data_queue
  333. *
  334. * @flags: Entry flags, see &enum queue_entry_flags.
  335. * @last_action: Timestamp of last change.
  336. * @queue: The data queue (&struct data_queue) to which this entry belongs.
  337. * @skb: The buffer which is currently being transmitted (for TX queue),
  338. * or used to directly recieve data in (for RX queue).
  339. * @entry_idx: The entry index number.
  340. * @priv_data: Private data belonging to this queue entry. The pointer
  341. * points to data specific to a particular driver and queue type.
  342. */
  343. struct queue_entry {
  344. unsigned long flags;
  345. unsigned long last_action;
  346. struct data_queue *queue;
  347. struct sk_buff *skb;
  348. unsigned int entry_idx;
  349. void *priv_data;
  350. };
  351. /**
  352. * enum queue_index: Queue index type
  353. *
  354. * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
  355. * owned by the hardware then the queue is considered to be full.
  356. * @Q_INDEX_DMA_DONE: Index pointer for the next entry which will have been
  357. * transfered to the hardware.
  358. * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
  359. * the hardware and for which we need to run the txdone handler. If this
  360. * entry is not owned by the hardware the queue is considered to be empty.
  361. * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
  362. * of the index array.
  363. */
  364. enum queue_index {
  365. Q_INDEX,
  366. Q_INDEX_DMA_DONE,
  367. Q_INDEX_DONE,
  368. Q_INDEX_MAX,
  369. };
  370. /**
  371. * enum data_queue_flags: Status flags for data queues
  372. *
  373. * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the
  374. * device might be DMA'ing skbuffers. TX queues will accept skbuffers to
  375. * be transmitted and beacon queues will start beaconing the configured
  376. * beacons.
  377. * @QUEUE_PAUSED: The queue has been started but is currently paused.
  378. * When this bit is set, the queue has been stopped in mac80211,
  379. * preventing new frames to be enqueued. However, a few frames
  380. * might still appear shortly after the pausing...
  381. */
  382. enum data_queue_flags {
  383. QUEUE_STARTED,
  384. QUEUE_PAUSED,
  385. };
  386. /**
  387. * struct data_queue: Data queue
  388. *
  389. * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  390. * @entries: Base address of the &struct queue_entry which are
  391. * part of this queue.
  392. * @qid: The queue identification, see &enum data_queue_qid.
  393. * @flags: Entry flags, see &enum queue_entry_flags.
  394. * @status_lock: The mutex for protecting the start/stop/flush
  395. * handling on this queue.
  396. * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or
  397. * @index_crypt needs to be changed this lock should be grabbed to prevent
  398. * index corruption due to concurrency.
  399. * @count: Number of frames handled in the queue.
  400. * @limit: Maximum number of entries in the queue.
  401. * @threshold: Minimum number of free entries before queue is kicked by force.
  402. * @length: Number of frames in queue.
  403. * @index: Index pointers to entry positions in the queue,
  404. * use &enum queue_index to get a specific index field.
  405. * @txop: maximum burst time.
  406. * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
  407. * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
  408. * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
  409. * @data_size: Maximum data size for the frames in this queue.
  410. * @desc_size: Hardware descriptor size for the data in this queue.
  411. * @usb_endpoint: Device endpoint used for communication (USB only)
  412. * @usb_maxpacket: Max packet size for given endpoint (USB only)
  413. */
  414. struct data_queue {
  415. struct rt2x00_dev *rt2x00dev;
  416. struct queue_entry *entries;
  417. enum data_queue_qid qid;
  418. unsigned long flags;
  419. struct mutex status_lock;
  420. spinlock_t index_lock;
  421. unsigned int count;
  422. unsigned short limit;
  423. unsigned short threshold;
  424. unsigned short length;
  425. unsigned short index[Q_INDEX_MAX];
  426. unsigned short txop;
  427. unsigned short aifs;
  428. unsigned short cw_min;
  429. unsigned short cw_max;
  430. unsigned short data_size;
  431. unsigned short desc_size;
  432. unsigned short usb_endpoint;
  433. unsigned short usb_maxpacket;
  434. };
  435. /**
  436. * struct data_queue_desc: Data queue description
  437. *
  438. * The information in this structure is used by drivers
  439. * to inform rt2x00lib about the creation of the data queue.
  440. *
  441. * @entry_num: Maximum number of entries for a queue.
  442. * @data_size: Maximum data size for the frames in this queue.
  443. * @desc_size: Hardware descriptor size for the data in this queue.
  444. * @priv_size: Size of per-queue_entry private data.
  445. */
  446. struct data_queue_desc {
  447. unsigned short entry_num;
  448. unsigned short data_size;
  449. unsigned short desc_size;
  450. unsigned short priv_size;
  451. };
  452. /**
  453. * queue_end - Return pointer to the last queue (HELPER MACRO).
  454. * @__dev: Pointer to &struct rt2x00_dev
  455. *
  456. * Using the base rx pointer and the maximum number of available queues,
  457. * this macro will return the address of 1 position beyond the end of the
  458. * queues array.
  459. */
  460. #define queue_end(__dev) \
  461. &(__dev)->rx[(__dev)->data_queues]
  462. /**
  463. * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
  464. * @__dev: Pointer to &struct rt2x00_dev
  465. *
  466. * Using the base tx pointer and the maximum number of available TX
  467. * queues, this macro will return the address of 1 position beyond
  468. * the end of the TX queue array.
  469. */
  470. #define tx_queue_end(__dev) \
  471. &(__dev)->tx[(__dev)->ops->tx_queues]
  472. /**
  473. * queue_next - Return pointer to next queue in list (HELPER MACRO).
  474. * @__queue: Current queue for which we need the next queue
  475. *
  476. * Using the current queue address we take the address directly
  477. * after the queue to take the next queue. Note that this macro
  478. * should be used carefully since it does not protect against
  479. * moving past the end of the list. (See macros &queue_end and
  480. * &tx_queue_end for determining the end of the queue).
  481. */
  482. #define queue_next(__queue) \
  483. &(__queue)[1]
  484. /**
  485. * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
  486. * @__entry: Pointer where the current queue entry will be stored in.
  487. * @__start: Start queue pointer.
  488. * @__end: End queue pointer.
  489. *
  490. * This macro will loop through all queues between &__start and &__end.
  491. */
  492. #define queue_loop(__entry, __start, __end) \
  493. for ((__entry) = (__start); \
  494. prefetch(queue_next(__entry)), (__entry) != (__end);\
  495. (__entry) = queue_next(__entry))
  496. /**
  497. * queue_for_each - Loop through all queues
  498. * @__dev: Pointer to &struct rt2x00_dev
  499. * @__entry: Pointer where the current queue entry will be stored in.
  500. *
  501. * This macro will loop through all available queues.
  502. */
  503. #define queue_for_each(__dev, __entry) \
  504. queue_loop(__entry, (__dev)->rx, queue_end(__dev))
  505. /**
  506. * tx_queue_for_each - Loop through the TX queues
  507. * @__dev: Pointer to &struct rt2x00_dev
  508. * @__entry: Pointer where the current queue entry will be stored in.
  509. *
  510. * This macro will loop through all TX related queues excluding
  511. * the Beacon and Atim queues.
  512. */
  513. #define tx_queue_for_each(__dev, __entry) \
  514. queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
  515. /**
  516. * txall_queue_for_each - Loop through all TX related queues
  517. * @__dev: Pointer to &struct rt2x00_dev
  518. * @__entry: Pointer where the current queue entry will be stored in.
  519. *
  520. * This macro will loop through all TX related queues including
  521. * the Beacon and Atim queues.
  522. */
  523. #define txall_queue_for_each(__dev, __entry) \
  524. queue_loop(__entry, (__dev)->tx, queue_end(__dev))
  525. /**
  526. * rt2x00queue_for_each_entry - Loop through all entries in the queue
  527. * @queue: Pointer to @data_queue
  528. * @start: &enum queue_index Pointer to start index
  529. * @end: &enum queue_index Pointer to end index
  530. * @data: Data to pass to the callback function
  531. * @fn: The function to call for each &struct queue_entry
  532. *
  533. * This will walk through all entries in the queue, in chronological
  534. * order. This means it will start at the current @start pointer
  535. * and will walk through the queue until it reaches the @end pointer.
  536. *
  537. * If fn returns true for an entry rt2x00queue_for_each_entry will stop
  538. * processing and return true as well.
  539. */
  540. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  541. enum queue_index start,
  542. enum queue_index end,
  543. void *data,
  544. bool (*fn)(struct queue_entry *entry,
  545. void *data));
  546. /**
  547. * rt2x00queue_empty - Check if the queue is empty.
  548. * @queue: Queue to check if empty.
  549. */
  550. static inline int rt2x00queue_empty(struct data_queue *queue)
  551. {
  552. return queue->length == 0;
  553. }
  554. /**
  555. * rt2x00queue_full - Check if the queue is full.
  556. * @queue: Queue to check if full.
  557. */
  558. static inline int rt2x00queue_full(struct data_queue *queue)
  559. {
  560. return queue->length == queue->limit;
  561. }
  562. /**
  563. * rt2x00queue_free - Check the number of available entries in queue.
  564. * @queue: Queue to check.
  565. */
  566. static inline int rt2x00queue_available(struct data_queue *queue)
  567. {
  568. return queue->limit - queue->length;
  569. }
  570. /**
  571. * rt2x00queue_threshold - Check if the queue is below threshold
  572. * @queue: Queue to check.
  573. */
  574. static inline int rt2x00queue_threshold(struct data_queue *queue)
  575. {
  576. return rt2x00queue_available(queue) < queue->threshold;
  577. }
  578. /**
  579. * rt2x00queue_status_timeout - Check if a timeout occured for STATUS reports
  580. * @entry: Queue entry to check.
  581. */
  582. static inline int rt2x00queue_status_timeout(struct queue_entry *entry)
  583. {
  584. if (!test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
  585. return false;
  586. return time_after(jiffies, entry->last_action + msecs_to_jiffies(100));
  587. }
  588. /**
  589. * rt2x00queuedma__timeout - Check if a timeout occured for DMA transfers
  590. * @entry: Queue entry to check.
  591. */
  592. static inline int rt2x00queue_dma_timeout(struct queue_entry *entry)
  593. {
  594. if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
  595. return false;
  596. return time_after(jiffies, entry->last_action + msecs_to_jiffies(100));
  597. }
  598. /**
  599. * _rt2x00_desc_read - Read a word from the hardware descriptor.
  600. * @desc: Base descriptor address
  601. * @word: Word index from where the descriptor should be read.
  602. * @value: Address where the descriptor value should be written into.
  603. */
  604. static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  605. {
  606. *value = desc[word];
  607. }
  608. /**
  609. * rt2x00_desc_read - Read a word from the hardware descriptor, this
  610. * function will take care of the byte ordering.
  611. * @desc: Base descriptor address
  612. * @word: Word index from where the descriptor should be read.
  613. * @value: Address where the descriptor value should be written into.
  614. */
  615. static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
  616. {
  617. __le32 tmp;
  618. _rt2x00_desc_read(desc, word, &tmp);
  619. *value = le32_to_cpu(tmp);
  620. }
  621. /**
  622. * rt2x00_desc_write - write a word to the hardware descriptor, this
  623. * function will take care of the byte ordering.
  624. * @desc: Base descriptor address
  625. * @word: Word index from where the descriptor should be written.
  626. * @value: Value that should be written into the descriptor.
  627. */
  628. static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
  629. {
  630. desc[word] = value;
  631. }
  632. /**
  633. * rt2x00_desc_write - write a word to the hardware descriptor.
  634. * @desc: Base descriptor address
  635. * @word: Word index from where the descriptor should be written.
  636. * @value: Value that should be written into the descriptor.
  637. */
  638. static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
  639. {
  640. _rt2x00_desc_write(desc, word, cpu_to_le32(value));
  641. }
  642. #endif /* RT2X00QUEUE_H */