iwl-core.c 54 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. /*
  43. * set bt_coex_active to true, uCode will do kill/defer
  44. * every time the priority line is asserted (BT is sending signals on the
  45. * priority line in the PCIx).
  46. * set bt_coex_active to false, uCode will ignore the BT activity and
  47. * perform the normal operation
  48. *
  49. * User might experience transmit issue on some platform due to WiFi/BT
  50. * co-exist problem. The possible behaviors are:
  51. * Able to scan and finding all the available AP
  52. * Not able to associate with any AP
  53. * On those platforms, WiFi communication can be restored by set
  54. * "bt_coex_active" module parameter to "false"
  55. *
  56. * default: bt_coex_active = true (BT_COEX_ENABLE)
  57. */
  58. bool bt_coex_active = true;
  59. module_param(bt_coex_active, bool, S_IRUGO);
  60. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  61. u32 iwl_debug_level;
  62. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  63. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  64. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  65. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  66. struct ieee80211_sta_ht_cap *ht_info,
  67. enum ieee80211_band band)
  68. {
  69. u16 max_bit_rate = 0;
  70. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  71. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  72. ht_info->cap = 0;
  73. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  74. ht_info->ht_supported = true;
  75. if (priv->cfg->ht_params &&
  76. priv->cfg->ht_params->ht_greenfield_support)
  77. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  78. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  79. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  80. if (priv->hw_params.ht40_channel & BIT(band)) {
  81. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  82. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  83. ht_info->mcs.rx_mask[4] = 0x01;
  84. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  85. }
  86. if (priv->cfg->mod_params->amsdu_size_8K)
  87. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  88. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  89. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
  90. ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
  91. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  92. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
  93. ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
  94. ht_info->mcs.rx_mask[0] = 0xFF;
  95. if (rx_chains_num >= 2)
  96. ht_info->mcs.rx_mask[1] = 0xFF;
  97. if (rx_chains_num >= 3)
  98. ht_info->mcs.rx_mask[2] = 0xFF;
  99. /* Highest supported Rx data rate */
  100. max_bit_rate *= rx_chains_num;
  101. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  102. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  103. /* Tx MCS capabilities */
  104. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  105. if (tx_chains_num != rx_chains_num) {
  106. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  107. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  108. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  109. }
  110. }
  111. /**
  112. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  113. */
  114. int iwlcore_init_geos(struct iwl_priv *priv)
  115. {
  116. struct iwl_channel_info *ch;
  117. struct ieee80211_supported_band *sband;
  118. struct ieee80211_channel *channels;
  119. struct ieee80211_channel *geo_ch;
  120. struct ieee80211_rate *rates;
  121. int i = 0;
  122. s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
  123. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  124. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  125. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  126. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  127. return 0;
  128. }
  129. channels = kzalloc(sizeof(struct ieee80211_channel) *
  130. priv->channel_count, GFP_KERNEL);
  131. if (!channels)
  132. return -ENOMEM;
  133. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  134. GFP_KERNEL);
  135. if (!rates) {
  136. kfree(channels);
  137. return -ENOMEM;
  138. }
  139. /* 5.2GHz channels start after the 2.4GHz channels */
  140. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  141. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  142. /* just OFDM */
  143. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  144. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  145. if (priv->cfg->sku & IWL_SKU_N)
  146. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  147. IEEE80211_BAND_5GHZ);
  148. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  149. sband->channels = channels;
  150. /* OFDM & CCK */
  151. sband->bitrates = rates;
  152. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  153. if (priv->cfg->sku & IWL_SKU_N)
  154. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  155. IEEE80211_BAND_2GHZ);
  156. priv->ieee_channels = channels;
  157. priv->ieee_rates = rates;
  158. for (i = 0; i < priv->channel_count; i++) {
  159. ch = &priv->channel_info[i];
  160. /* FIXME: might be removed if scan is OK */
  161. if (!is_channel_valid(ch))
  162. continue;
  163. sband = &priv->bands[ch->band];
  164. geo_ch = &sband->channels[sband->n_channels++];
  165. geo_ch->center_freq =
  166. ieee80211_channel_to_frequency(ch->channel, ch->band);
  167. geo_ch->max_power = ch->max_power_avg;
  168. geo_ch->max_antenna_gain = 0xff;
  169. geo_ch->hw_value = ch->channel;
  170. if (is_channel_valid(ch)) {
  171. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  172. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  173. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  174. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  175. if (ch->flags & EEPROM_CHANNEL_RADAR)
  176. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  177. geo_ch->flags |= ch->ht40_extension_channel;
  178. if (ch->max_power_avg > max_tx_power)
  179. max_tx_power = ch->max_power_avg;
  180. } else {
  181. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  182. }
  183. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  184. ch->channel, geo_ch->center_freq,
  185. is_channel_a_band(ch) ? "5.2" : "2.4",
  186. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  187. "restricted" : "valid",
  188. geo_ch->flags);
  189. }
  190. priv->tx_power_device_lmt = max_tx_power;
  191. priv->tx_power_user_lmt = max_tx_power;
  192. priv->tx_power_next = max_tx_power;
  193. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  194. priv->cfg->sku & IWL_SKU_A) {
  195. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  196. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  197. priv->pci_dev->device,
  198. priv->pci_dev->subsystem_device);
  199. priv->cfg->sku &= ~IWL_SKU_A;
  200. }
  201. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  202. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  203. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  204. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  205. return 0;
  206. }
  207. /*
  208. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  209. */
  210. void iwlcore_free_geos(struct iwl_priv *priv)
  211. {
  212. kfree(priv->ieee_channels);
  213. kfree(priv->ieee_rates);
  214. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  215. }
  216. static bool iwl_is_channel_extension(struct iwl_priv *priv,
  217. enum ieee80211_band band,
  218. u16 channel, u8 extension_chan_offset)
  219. {
  220. const struct iwl_channel_info *ch_info;
  221. ch_info = iwl_get_channel_info(priv, band, channel);
  222. if (!is_channel_valid(ch_info))
  223. return false;
  224. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  225. return !(ch_info->ht40_extension_channel &
  226. IEEE80211_CHAN_NO_HT40PLUS);
  227. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  228. return !(ch_info->ht40_extension_channel &
  229. IEEE80211_CHAN_NO_HT40MINUS);
  230. return false;
  231. }
  232. bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  233. struct iwl_rxon_context *ctx,
  234. struct ieee80211_sta_ht_cap *ht_cap)
  235. {
  236. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  237. return false;
  238. /*
  239. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  240. * the bit will not set if it is pure 40MHz case
  241. */
  242. if (ht_cap && !ht_cap->ht_supported)
  243. return false;
  244. #ifdef CONFIG_IWLWIFI_DEBUGFS
  245. if (priv->disable_ht40)
  246. return false;
  247. #endif
  248. return iwl_is_channel_extension(priv, priv->band,
  249. le16_to_cpu(ctx->staging.channel),
  250. ctx->ht.extension_chan_offset);
  251. }
  252. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  253. {
  254. u16 new_val;
  255. u16 beacon_factor;
  256. /*
  257. * If mac80211 hasn't given us a beacon interval, program
  258. * the default into the device (not checking this here
  259. * would cause the adjustment below to return the maximum
  260. * value, which may break PAN.)
  261. */
  262. if (!beacon_val)
  263. return DEFAULT_BEACON_INTERVAL;
  264. /*
  265. * If the beacon interval we obtained from the peer
  266. * is too large, we'll have to wake up more often
  267. * (and in IBSS case, we'll beacon too much)
  268. *
  269. * For example, if max_beacon_val is 4096, and the
  270. * requested beacon interval is 7000, we'll have to
  271. * use 3500 to be able to wake up on the beacons.
  272. *
  273. * This could badly influence beacon detection stats.
  274. */
  275. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  276. new_val = beacon_val / beacon_factor;
  277. if (!new_val)
  278. new_val = max_beacon_val;
  279. return new_val;
  280. }
  281. int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  282. {
  283. u64 tsf;
  284. s32 interval_tm, rem;
  285. struct ieee80211_conf *conf = NULL;
  286. u16 beacon_int;
  287. struct ieee80211_vif *vif = ctx->vif;
  288. conf = ieee80211_get_hw_conf(priv->hw);
  289. lockdep_assert_held(&priv->mutex);
  290. memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
  291. ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
  292. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  293. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  294. /*
  295. * TODO: For IBSS we need to get atim_window from mac80211,
  296. * for now just always use 0
  297. */
  298. ctx->timing.atim_window = 0;
  299. if (ctx->ctxid == IWL_RXON_CTX_PAN &&
  300. (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
  301. iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
  302. priv->contexts[IWL_RXON_CTX_BSS].vif &&
  303. priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
  304. ctx->timing.beacon_interval =
  305. priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
  306. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  307. } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
  308. iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
  309. priv->contexts[IWL_RXON_CTX_PAN].vif &&
  310. priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
  311. (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
  312. !ctx->vif->bss_conf.beacon_int)) {
  313. ctx->timing.beacon_interval =
  314. priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
  315. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  316. } else {
  317. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  318. priv->hw_params.max_beacon_itrvl * TIME_UNIT);
  319. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  320. }
  321. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  322. interval_tm = beacon_int * TIME_UNIT;
  323. rem = do_div(tsf, interval_tm);
  324. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  325. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  326. IWL_DEBUG_ASSOC(priv,
  327. "beacon interval %d beacon timer %d beacon tim %d\n",
  328. le16_to_cpu(ctx->timing.beacon_interval),
  329. le32_to_cpu(ctx->timing.beacon_init_val),
  330. le16_to_cpu(ctx->timing.atim_window));
  331. return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
  332. sizeof(ctx->timing), &ctx->timing);
  333. }
  334. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
  335. int hw_decrypt)
  336. {
  337. struct iwl_rxon_cmd *rxon = &ctx->staging;
  338. if (hw_decrypt)
  339. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  340. else
  341. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  342. }
  343. /* validate RXON structure is valid */
  344. int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  345. {
  346. struct iwl_rxon_cmd *rxon = &ctx->staging;
  347. bool error = false;
  348. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  349. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  350. IWL_WARN(priv, "check 2.4G: wrong narrow\n");
  351. error = true;
  352. }
  353. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  354. IWL_WARN(priv, "check 2.4G: wrong radar\n");
  355. error = true;
  356. }
  357. } else {
  358. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  359. IWL_WARN(priv, "check 5.2G: not short slot!\n");
  360. error = true;
  361. }
  362. if (rxon->flags & RXON_FLG_CCK_MSK) {
  363. IWL_WARN(priv, "check 5.2G: CCK!\n");
  364. error = true;
  365. }
  366. }
  367. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  368. IWL_WARN(priv, "mac/bssid mcast!\n");
  369. error = true;
  370. }
  371. /* make sure basic rates 6Mbps and 1Mbps are supported */
  372. if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
  373. (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
  374. IWL_WARN(priv, "neither 1 nor 6 are basic\n");
  375. error = true;
  376. }
  377. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  378. IWL_WARN(priv, "aid > 2007\n");
  379. error = true;
  380. }
  381. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  382. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  383. IWL_WARN(priv, "CCK and short slot\n");
  384. error = true;
  385. }
  386. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  387. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  388. IWL_WARN(priv, "CCK and auto detect");
  389. error = true;
  390. }
  391. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  392. RXON_FLG_TGG_PROTECT_MSK)) ==
  393. RXON_FLG_TGG_PROTECT_MSK) {
  394. IWL_WARN(priv, "TGg but no auto-detect\n");
  395. error = true;
  396. }
  397. if (error)
  398. IWL_WARN(priv, "Tuning to channel %d\n",
  399. le16_to_cpu(rxon->channel));
  400. if (error) {
  401. IWL_ERR(priv, "Invalid RXON\n");
  402. return -EINVAL;
  403. }
  404. return 0;
  405. }
  406. /**
  407. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  408. * @priv: staging_rxon is compared to active_rxon
  409. *
  410. * If the RXON structure is changing enough to require a new tune,
  411. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  412. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  413. */
  414. int iwl_full_rxon_required(struct iwl_priv *priv,
  415. struct iwl_rxon_context *ctx)
  416. {
  417. const struct iwl_rxon_cmd *staging = &ctx->staging;
  418. const struct iwl_rxon_cmd *active = &ctx->active;
  419. #define CHK(cond) \
  420. if ((cond)) { \
  421. IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
  422. return 1; \
  423. }
  424. #define CHK_NEQ(c1, c2) \
  425. if ((c1) != (c2)) { \
  426. IWL_DEBUG_INFO(priv, "need full RXON - " \
  427. #c1 " != " #c2 " - %d != %d\n", \
  428. (c1), (c2)); \
  429. return 1; \
  430. }
  431. /* These items are only settable from the full RXON command */
  432. CHK(!iwl_is_associated_ctx(ctx));
  433. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  434. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  435. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  436. active->wlap_bssid_addr));
  437. CHK_NEQ(staging->dev_type, active->dev_type);
  438. CHK_NEQ(staging->channel, active->channel);
  439. CHK_NEQ(staging->air_propagation, active->air_propagation);
  440. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  441. active->ofdm_ht_single_stream_basic_rates);
  442. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  443. active->ofdm_ht_dual_stream_basic_rates);
  444. CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
  445. active->ofdm_ht_triple_stream_basic_rates);
  446. CHK_NEQ(staging->assoc_id, active->assoc_id);
  447. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  448. * be updated with the RXON_ASSOC command -- however only some
  449. * flag transitions are allowed using RXON_ASSOC */
  450. /* Check if we are not switching bands */
  451. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  452. active->flags & RXON_FLG_BAND_24G_MSK);
  453. /* Check if we are switching association toggle */
  454. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  455. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  456. #undef CHK
  457. #undef CHK_NEQ
  458. return 0;
  459. }
  460. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
  461. struct iwl_rxon_context *ctx)
  462. {
  463. /*
  464. * Assign the lowest rate -- should really get this from
  465. * the beacon skb from mac80211.
  466. */
  467. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  468. return IWL_RATE_1M_PLCP;
  469. else
  470. return IWL_RATE_6M_PLCP;
  471. }
  472. static void _iwl_set_rxon_ht(struct iwl_priv *priv,
  473. struct iwl_ht_config *ht_conf,
  474. struct iwl_rxon_context *ctx)
  475. {
  476. struct iwl_rxon_cmd *rxon = &ctx->staging;
  477. if (!ctx->ht.enabled) {
  478. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  479. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  480. RXON_FLG_HT40_PROT_MSK |
  481. RXON_FLG_HT_PROT_MSK);
  482. return;
  483. }
  484. /* FIXME: if the definition of ht.protection changed, the "translation"
  485. * will be needed for rxon->flags
  486. */
  487. rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  488. /* Set up channel bandwidth:
  489. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  490. /* clear the HT channel mode before set the mode */
  491. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  492. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  493. if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
  494. /* pure ht40 */
  495. if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  496. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  497. /* Note: control channel is opposite of extension channel */
  498. switch (ctx->ht.extension_chan_offset) {
  499. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  500. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  501. break;
  502. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  503. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  504. break;
  505. }
  506. } else {
  507. /* Note: control channel is opposite of extension channel */
  508. switch (ctx->ht.extension_chan_offset) {
  509. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  510. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  511. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  512. break;
  513. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  514. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  515. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  516. break;
  517. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  518. default:
  519. /* channel location only valid if in Mixed mode */
  520. IWL_ERR(priv, "invalid extension channel offset\n");
  521. break;
  522. }
  523. }
  524. } else {
  525. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  526. }
  527. if (priv->cfg->ops->hcmd->set_rxon_chain)
  528. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  529. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  530. "extension channel offset 0x%x\n",
  531. le32_to_cpu(rxon->flags), ctx->ht.protection,
  532. ctx->ht.extension_chan_offset);
  533. }
  534. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  535. {
  536. struct iwl_rxon_context *ctx;
  537. for_each_context(priv, ctx)
  538. _iwl_set_rxon_ht(priv, ht_conf, ctx);
  539. }
  540. /* Return valid, unused, channel for a passive scan to reset the RF */
  541. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  542. enum ieee80211_band band)
  543. {
  544. const struct iwl_channel_info *ch_info;
  545. int i;
  546. u8 channel = 0;
  547. u8 min, max;
  548. struct iwl_rxon_context *ctx;
  549. if (band == IEEE80211_BAND_5GHZ) {
  550. min = 14;
  551. max = priv->channel_count;
  552. } else {
  553. min = 0;
  554. max = 14;
  555. }
  556. for (i = min; i < max; i++) {
  557. bool busy = false;
  558. for_each_context(priv, ctx) {
  559. busy = priv->channel_info[i].channel ==
  560. le16_to_cpu(ctx->staging.channel);
  561. if (busy)
  562. break;
  563. }
  564. if (busy)
  565. continue;
  566. channel = priv->channel_info[i].channel;
  567. ch_info = iwl_get_channel_info(priv, band, channel);
  568. if (is_channel_valid(ch_info))
  569. break;
  570. }
  571. return channel;
  572. }
  573. /**
  574. * iwl_set_rxon_channel - Set the band and channel values in staging RXON
  575. * @ch: requested channel as a pointer to struct ieee80211_channel
  576. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  577. * in the staging RXON flag structure based on the ch->band
  578. */
  579. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
  580. struct iwl_rxon_context *ctx)
  581. {
  582. enum ieee80211_band band = ch->band;
  583. u16 channel = ch->hw_value;
  584. if ((le16_to_cpu(ctx->staging.channel) == channel) &&
  585. (priv->band == band))
  586. return 0;
  587. ctx->staging.channel = cpu_to_le16(channel);
  588. if (band == IEEE80211_BAND_5GHZ)
  589. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  590. else
  591. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  592. priv->band = band;
  593. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  594. return 0;
  595. }
  596. void iwl_set_flags_for_band(struct iwl_priv *priv,
  597. struct iwl_rxon_context *ctx,
  598. enum ieee80211_band band,
  599. struct ieee80211_vif *vif)
  600. {
  601. if (band == IEEE80211_BAND_5GHZ) {
  602. ctx->staging.flags &=
  603. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  604. | RXON_FLG_CCK_MSK);
  605. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  606. } else {
  607. /* Copied from iwl_post_associate() */
  608. if (vif && vif->bss_conf.use_short_slot)
  609. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  610. else
  611. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  612. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  613. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  614. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  615. }
  616. }
  617. /*
  618. * initialize rxon structure with default values from eeprom
  619. */
  620. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  621. struct iwl_rxon_context *ctx)
  622. {
  623. const struct iwl_channel_info *ch_info;
  624. memset(&ctx->staging, 0, sizeof(ctx->staging));
  625. if (!ctx->vif) {
  626. ctx->staging.dev_type = ctx->unused_devtype;
  627. } else switch (ctx->vif->type) {
  628. case NL80211_IFTYPE_AP:
  629. ctx->staging.dev_type = ctx->ap_devtype;
  630. break;
  631. case NL80211_IFTYPE_STATION:
  632. ctx->staging.dev_type = ctx->station_devtype;
  633. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  634. break;
  635. case NL80211_IFTYPE_ADHOC:
  636. ctx->staging.dev_type = ctx->ibss_devtype;
  637. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  638. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  639. RXON_FILTER_ACCEPT_GRP_MSK;
  640. break;
  641. default:
  642. IWL_ERR(priv, "Unsupported interface type %d\n",
  643. ctx->vif->type);
  644. break;
  645. }
  646. #if 0
  647. /* TODO: Figure out when short_preamble would be set and cache from
  648. * that */
  649. if (!hw_to_local(priv->hw)->short_preamble)
  650. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  651. else
  652. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  653. #endif
  654. ch_info = iwl_get_channel_info(priv, priv->band,
  655. le16_to_cpu(ctx->active.channel));
  656. if (!ch_info)
  657. ch_info = &priv->channel_info[0];
  658. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  659. priv->band = ch_info->band;
  660. iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
  661. ctx->staging.ofdm_basic_rates =
  662. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  663. ctx->staging.cck_basic_rates =
  664. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  665. /* clear both MIX and PURE40 mode flag */
  666. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  667. RXON_FLG_CHANNEL_MODE_PURE_40);
  668. if (ctx->vif)
  669. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  670. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  671. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  672. ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
  673. }
  674. void iwl_set_rate(struct iwl_priv *priv)
  675. {
  676. const struct ieee80211_supported_band *hw = NULL;
  677. struct ieee80211_rate *rate;
  678. struct iwl_rxon_context *ctx;
  679. int i;
  680. hw = iwl_get_hw_mode(priv, priv->band);
  681. if (!hw) {
  682. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  683. return;
  684. }
  685. priv->active_rate = 0;
  686. for (i = 0; i < hw->n_bitrates; i++) {
  687. rate = &(hw->bitrates[i]);
  688. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  689. priv->active_rate |= (1 << rate->hw_value);
  690. }
  691. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  692. for_each_context(priv, ctx) {
  693. ctx->staging.cck_basic_rates =
  694. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  695. ctx->staging.ofdm_basic_rates =
  696. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  697. }
  698. }
  699. void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
  700. {
  701. /*
  702. * MULTI-FIXME
  703. * See iwl_mac_channel_switch.
  704. */
  705. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  706. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  707. return;
  708. if (priv->switch_rxon.switch_in_progress) {
  709. ieee80211_chswitch_done(ctx->vif, is_success);
  710. mutex_lock(&priv->mutex);
  711. priv->switch_rxon.switch_in_progress = false;
  712. mutex_unlock(&priv->mutex);
  713. }
  714. }
  715. #ifdef CONFIG_IWLWIFI_DEBUG
  716. void iwl_print_rx_config_cmd(struct iwl_priv *priv,
  717. struct iwl_rxon_context *ctx)
  718. {
  719. struct iwl_rxon_cmd *rxon = &ctx->staging;
  720. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  721. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  722. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  723. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  724. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  725. le32_to_cpu(rxon->filter_flags));
  726. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  727. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  728. rxon->ofdm_basic_rates);
  729. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  730. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  731. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  732. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  733. }
  734. #endif
  735. static void iwlagn_abort_notification_waits(struct iwl_priv *priv)
  736. {
  737. unsigned long flags;
  738. struct iwl_notification_wait *wait_entry;
  739. spin_lock_irqsave(&priv->_agn.notif_wait_lock, flags);
  740. list_for_each_entry(wait_entry, &priv->_agn.notif_waits, list)
  741. wait_entry->aborted = true;
  742. spin_unlock_irqrestore(&priv->_agn.notif_wait_lock, flags);
  743. wake_up_all(&priv->_agn.notif_waitq);
  744. }
  745. void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
  746. {
  747. unsigned int reload_msec;
  748. unsigned long reload_jiffies;
  749. /* Set the FW error flag -- cleared on iwl_down */
  750. set_bit(STATUS_FW_ERROR, &priv->status);
  751. /* Cancel currently queued command. */
  752. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  753. iwlagn_abort_notification_waits(priv);
  754. /* Keep the restart process from trying to send host
  755. * commands by clearing the ready bit */
  756. clear_bit(STATUS_READY, &priv->status);
  757. wake_up_interruptible(&priv->wait_command_queue);
  758. if (!ondemand) {
  759. /*
  760. * If firmware keep reloading, then it indicate something
  761. * serious wrong and firmware having problem to recover
  762. * from it. Instead of keep trying which will fill the syslog
  763. * and hang the system, let's just stop it
  764. */
  765. reload_jiffies = jiffies;
  766. reload_msec = jiffies_to_msecs((long) reload_jiffies -
  767. (long) priv->reload_jiffies);
  768. priv->reload_jiffies = reload_jiffies;
  769. if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
  770. priv->reload_count++;
  771. if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
  772. IWL_ERR(priv, "BUG_ON, Stop restarting\n");
  773. return;
  774. }
  775. } else
  776. priv->reload_count = 0;
  777. }
  778. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  779. if (priv->cfg->mod_params->restart_fw) {
  780. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  781. "Restarting adapter due to uCode error.\n");
  782. queue_work(priv->workqueue, &priv->restart);
  783. } else
  784. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  785. "Detected FW error, but not restarting\n");
  786. }
  787. }
  788. /**
  789. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  790. */
  791. void iwl_irq_handle_error(struct iwl_priv *priv)
  792. {
  793. /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
  794. if (priv->cfg->internal_wimax_coex &&
  795. (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
  796. APMS_CLK_VAL_MRB_FUNC_MODE) ||
  797. (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
  798. APMG_PS_CTRL_VAL_RESET_REQ))) {
  799. /*
  800. * Keep the restart process from trying to send host
  801. * commands by clearing the ready bit.
  802. */
  803. clear_bit(STATUS_READY, &priv->status);
  804. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  805. wake_up_interruptible(&priv->wait_command_queue);
  806. IWL_ERR(priv, "RF is used by WiMAX\n");
  807. return;
  808. }
  809. IWL_ERR(priv, "Loaded firmware version: %s\n",
  810. priv->hw->wiphy->fw_version);
  811. iwl_dump_nic_error_log(priv);
  812. iwl_dump_csr(priv);
  813. iwl_dump_fh(priv, NULL, false);
  814. iwl_dump_nic_event_log(priv, false, NULL, false);
  815. #ifdef CONFIG_IWLWIFI_DEBUG
  816. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  817. iwl_print_rx_config_cmd(priv,
  818. &priv->contexts[IWL_RXON_CTX_BSS]);
  819. #endif
  820. iwlagn_fw_error(priv, false);
  821. }
  822. static int iwl_apm_stop_master(struct iwl_priv *priv)
  823. {
  824. int ret = 0;
  825. /* stop device's busmaster DMA activity */
  826. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  827. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  828. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  829. if (ret)
  830. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  831. IWL_DEBUG_INFO(priv, "stop master\n");
  832. return ret;
  833. }
  834. void iwl_apm_stop(struct iwl_priv *priv)
  835. {
  836. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  837. /* Stop device's DMA activity */
  838. iwl_apm_stop_master(priv);
  839. /* Reset the entire device */
  840. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  841. udelay(10);
  842. /*
  843. * Clear "initialization complete" bit to move adapter from
  844. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  845. */
  846. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  847. }
  848. /*
  849. * Start up NIC's basic functionality after it has been reset
  850. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  851. * NOTE: This does not load uCode nor start the embedded processor
  852. */
  853. int iwl_apm_init(struct iwl_priv *priv)
  854. {
  855. int ret = 0;
  856. u16 lctl;
  857. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  858. /*
  859. * Use "set_bit" below rather than "write", to preserve any hardware
  860. * bits already set by default after reset.
  861. */
  862. /* Disable L0S exit timer (platform NMI Work/Around) */
  863. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  864. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  865. /*
  866. * Disable L0s without affecting L1;
  867. * don't wait for ICH L0s (ICH bug W/A)
  868. */
  869. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  870. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  871. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  872. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  873. /*
  874. * Enable HAP INTA (interrupt from management bus) to
  875. * wake device's PCI Express link L1a -> L0s
  876. */
  877. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  878. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  879. /*
  880. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  881. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  882. * If so (likely), disable L0S, so device moves directly L0->L1;
  883. * costs negligible amount of power savings.
  884. * If not (unlikely), enable L0S, so there is at least some
  885. * power savings, even without L1.
  886. */
  887. lctl = iwl_pcie_link_ctl(priv);
  888. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  889. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  890. /* L1-ASPM enabled; disable(!) L0S */
  891. iwl_set_bit(priv, CSR_GIO_REG,
  892. CSR_GIO_REG_VAL_L0S_ENABLED);
  893. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  894. } else {
  895. /* L1-ASPM disabled; enable(!) L0S */
  896. iwl_clear_bit(priv, CSR_GIO_REG,
  897. CSR_GIO_REG_VAL_L0S_ENABLED);
  898. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  899. }
  900. /* Configure analog phase-lock-loop before activating to D0A */
  901. if (priv->cfg->base_params->pll_cfg_val)
  902. iwl_set_bit(priv, CSR_ANA_PLL_CFG,
  903. priv->cfg->base_params->pll_cfg_val);
  904. /*
  905. * Set "initialization complete" bit to move adapter from
  906. * D0U* --> D0A* (powered-up active) state.
  907. */
  908. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  909. /*
  910. * Wait for clock stabilization; once stabilized, access to
  911. * device-internal resources is supported, e.g. iwl_write_prph()
  912. * and accesses to uCode SRAM.
  913. */
  914. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  915. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  916. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  917. if (ret < 0) {
  918. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  919. goto out;
  920. }
  921. /*
  922. * Enable DMA clock and wait for it to stabilize.
  923. *
  924. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  925. * do not disable clocks. This preserves any hardware bits already
  926. * set by default in "CLK_CTRL_REG" after reset.
  927. */
  928. iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  929. udelay(20);
  930. /* Disable L1-Active */
  931. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  932. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  933. out:
  934. return ret;
  935. }
  936. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  937. {
  938. int ret;
  939. s8 prev_tx_power;
  940. bool defer;
  941. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  942. lockdep_assert_held(&priv->mutex);
  943. if (priv->tx_power_user_lmt == tx_power && !force)
  944. return 0;
  945. if (!priv->cfg->ops->lib->send_tx_power)
  946. return -EOPNOTSUPP;
  947. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  948. IWL_WARN(priv,
  949. "Requested user TXPOWER %d below lower limit %d.\n",
  950. tx_power,
  951. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  952. return -EINVAL;
  953. }
  954. if (tx_power > priv->tx_power_device_lmt) {
  955. IWL_WARN(priv,
  956. "Requested user TXPOWER %d above upper limit %d.\n",
  957. tx_power, priv->tx_power_device_lmt);
  958. return -EINVAL;
  959. }
  960. if (!iwl_is_ready_rf(priv))
  961. return -EIO;
  962. /* scan complete and commit_rxon use tx_power_next value,
  963. * it always need to be updated for newest request */
  964. priv->tx_power_next = tx_power;
  965. /* do not set tx power when scanning or channel changing */
  966. defer = test_bit(STATUS_SCANNING, &priv->status) ||
  967. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  968. if (defer && !force) {
  969. IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
  970. return 0;
  971. }
  972. prev_tx_power = priv->tx_power_user_lmt;
  973. priv->tx_power_user_lmt = tx_power;
  974. ret = priv->cfg->ops->lib->send_tx_power(priv);
  975. /* if fail to set tx_power, restore the orig. tx power */
  976. if (ret) {
  977. priv->tx_power_user_lmt = prev_tx_power;
  978. priv->tx_power_next = prev_tx_power;
  979. }
  980. return ret;
  981. }
  982. void iwl_send_bt_config(struct iwl_priv *priv)
  983. {
  984. struct iwl_bt_cmd bt_cmd = {
  985. .lead_time = BT_LEAD_TIME_DEF,
  986. .max_kill = BT_MAX_KILL_DEF,
  987. .kill_ack_mask = 0,
  988. .kill_cts_mask = 0,
  989. };
  990. if (!bt_coex_active)
  991. bt_cmd.flags = BT_COEX_DISABLE;
  992. else
  993. bt_cmd.flags = BT_COEX_ENABLE;
  994. priv->bt_enable_flag = bt_cmd.flags;
  995. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  996. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  997. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  998. sizeof(struct iwl_bt_cmd), &bt_cmd))
  999. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1000. }
  1001. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1002. {
  1003. struct iwl_statistics_cmd statistics_cmd = {
  1004. .configuration_flags =
  1005. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1006. };
  1007. if (flags & CMD_ASYNC)
  1008. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1009. sizeof(struct iwl_statistics_cmd),
  1010. &statistics_cmd, NULL);
  1011. else
  1012. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1013. sizeof(struct iwl_statistics_cmd),
  1014. &statistics_cmd);
  1015. }
  1016. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1017. {
  1018. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1019. }
  1020. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1021. const struct ieee80211_tx_queue_params *params)
  1022. {
  1023. struct iwl_priv *priv = hw->priv;
  1024. struct iwl_rxon_context *ctx;
  1025. unsigned long flags;
  1026. int q;
  1027. IWL_DEBUG_MAC80211(priv, "enter\n");
  1028. if (!iwl_is_ready_rf(priv)) {
  1029. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1030. return -EIO;
  1031. }
  1032. if (queue >= AC_NUM) {
  1033. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1034. return 0;
  1035. }
  1036. q = AC_NUM - 1 - queue;
  1037. spin_lock_irqsave(&priv->lock, flags);
  1038. /*
  1039. * MULTI-FIXME
  1040. * This may need to be done per interface in nl80211/cfg80211/mac80211.
  1041. */
  1042. for_each_context(priv, ctx) {
  1043. ctx->qos_data.def_qos_parm.ac[q].cw_min =
  1044. cpu_to_le16(params->cw_min);
  1045. ctx->qos_data.def_qos_parm.ac[q].cw_max =
  1046. cpu_to_le16(params->cw_max);
  1047. ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1048. ctx->qos_data.def_qos_parm.ac[q].edca_txop =
  1049. cpu_to_le16((params->txop * 32));
  1050. ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1051. }
  1052. spin_unlock_irqrestore(&priv->lock, flags);
  1053. IWL_DEBUG_MAC80211(priv, "leave\n");
  1054. return 0;
  1055. }
  1056. int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
  1057. {
  1058. struct iwl_priv *priv = hw->priv;
  1059. return priv->ibss_manager == IWL_IBSS_MANAGER;
  1060. }
  1061. static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  1062. {
  1063. iwl_connection_init_rx_config(priv, ctx);
  1064. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1065. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1066. return iwlcore_commit_rxon(priv, ctx);
  1067. }
  1068. static int iwl_setup_interface(struct iwl_priv *priv,
  1069. struct iwl_rxon_context *ctx)
  1070. {
  1071. struct ieee80211_vif *vif = ctx->vif;
  1072. int err;
  1073. lockdep_assert_held(&priv->mutex);
  1074. /*
  1075. * This variable will be correct only when there's just
  1076. * a single context, but all code using it is for hardware
  1077. * that supports only one context.
  1078. */
  1079. priv->iw_mode = vif->type;
  1080. ctx->is_active = true;
  1081. err = iwl_set_mode(priv, ctx);
  1082. if (err) {
  1083. if (!ctx->always_active)
  1084. ctx->is_active = false;
  1085. return err;
  1086. }
  1087. if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
  1088. vif->type == NL80211_IFTYPE_ADHOC) {
  1089. /*
  1090. * pretend to have high BT traffic as long as we
  1091. * are operating in IBSS mode, as this will cause
  1092. * the rate scaling etc. to behave as intended.
  1093. */
  1094. priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
  1095. }
  1096. return 0;
  1097. }
  1098. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1099. {
  1100. struct iwl_priv *priv = hw->priv;
  1101. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  1102. struct iwl_rxon_context *tmp, *ctx = NULL;
  1103. int err;
  1104. enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
  1105. IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
  1106. viftype, vif->addr);
  1107. mutex_lock(&priv->mutex);
  1108. if (!iwl_is_ready_rf(priv)) {
  1109. IWL_WARN(priv, "Try to add interface when device not ready\n");
  1110. err = -EINVAL;
  1111. goto out;
  1112. }
  1113. for_each_context(priv, tmp) {
  1114. u32 possible_modes =
  1115. tmp->interface_modes | tmp->exclusive_interface_modes;
  1116. if (tmp->vif) {
  1117. /* check if this busy context is exclusive */
  1118. if (tmp->exclusive_interface_modes &
  1119. BIT(tmp->vif->type)) {
  1120. err = -EINVAL;
  1121. goto out;
  1122. }
  1123. continue;
  1124. }
  1125. if (!(possible_modes & BIT(viftype)))
  1126. continue;
  1127. /* have maybe usable context w/o interface */
  1128. ctx = tmp;
  1129. break;
  1130. }
  1131. if (!ctx) {
  1132. err = -EOPNOTSUPP;
  1133. goto out;
  1134. }
  1135. vif_priv->ctx = ctx;
  1136. ctx->vif = vif;
  1137. err = iwl_setup_interface(priv, ctx);
  1138. if (!err)
  1139. goto out;
  1140. ctx->vif = NULL;
  1141. priv->iw_mode = NL80211_IFTYPE_STATION;
  1142. out:
  1143. mutex_unlock(&priv->mutex);
  1144. IWL_DEBUG_MAC80211(priv, "leave\n");
  1145. return err;
  1146. }
  1147. static void iwl_teardown_interface(struct iwl_priv *priv,
  1148. struct ieee80211_vif *vif,
  1149. bool mode_change)
  1150. {
  1151. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1152. lockdep_assert_held(&priv->mutex);
  1153. if (priv->scan_vif == vif) {
  1154. iwl_scan_cancel_timeout(priv, 200);
  1155. iwl_force_scan_end(priv);
  1156. }
  1157. if (!mode_change) {
  1158. iwl_set_mode(priv, ctx);
  1159. if (!ctx->always_active)
  1160. ctx->is_active = false;
  1161. }
  1162. /*
  1163. * When removing the IBSS interface, overwrite the
  1164. * BT traffic load with the stored one from the last
  1165. * notification, if any. If this is a device that
  1166. * doesn't implement this, this has no effect since
  1167. * both values are the same and zero.
  1168. */
  1169. if (vif->type == NL80211_IFTYPE_ADHOC)
  1170. priv->bt_traffic_load = priv->last_bt_traffic_load;
  1171. }
  1172. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1173. struct ieee80211_vif *vif)
  1174. {
  1175. struct iwl_priv *priv = hw->priv;
  1176. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1177. IWL_DEBUG_MAC80211(priv, "enter\n");
  1178. mutex_lock(&priv->mutex);
  1179. WARN_ON(ctx->vif != vif);
  1180. ctx->vif = NULL;
  1181. iwl_teardown_interface(priv, vif, false);
  1182. mutex_unlock(&priv->mutex);
  1183. IWL_DEBUG_MAC80211(priv, "leave\n");
  1184. }
  1185. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1186. {
  1187. if (!priv->txq)
  1188. priv->txq = kzalloc(
  1189. sizeof(struct iwl_tx_queue) *
  1190. priv->cfg->base_params->num_of_queues,
  1191. GFP_KERNEL);
  1192. if (!priv->txq) {
  1193. IWL_ERR(priv, "Not enough memory for txq\n");
  1194. return -ENOMEM;
  1195. }
  1196. return 0;
  1197. }
  1198. void iwl_free_txq_mem(struct iwl_priv *priv)
  1199. {
  1200. kfree(priv->txq);
  1201. priv->txq = NULL;
  1202. }
  1203. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1204. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1205. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1206. {
  1207. priv->tx_traffic_idx = 0;
  1208. priv->rx_traffic_idx = 0;
  1209. if (priv->tx_traffic)
  1210. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1211. if (priv->rx_traffic)
  1212. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1213. }
  1214. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1215. {
  1216. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1217. if (iwl_debug_level & IWL_DL_TX) {
  1218. if (!priv->tx_traffic) {
  1219. priv->tx_traffic =
  1220. kzalloc(traffic_size, GFP_KERNEL);
  1221. if (!priv->tx_traffic)
  1222. return -ENOMEM;
  1223. }
  1224. }
  1225. if (iwl_debug_level & IWL_DL_RX) {
  1226. if (!priv->rx_traffic) {
  1227. priv->rx_traffic =
  1228. kzalloc(traffic_size, GFP_KERNEL);
  1229. if (!priv->rx_traffic)
  1230. return -ENOMEM;
  1231. }
  1232. }
  1233. iwl_reset_traffic_log(priv);
  1234. return 0;
  1235. }
  1236. void iwl_free_traffic_mem(struct iwl_priv *priv)
  1237. {
  1238. kfree(priv->tx_traffic);
  1239. priv->tx_traffic = NULL;
  1240. kfree(priv->rx_traffic);
  1241. priv->rx_traffic = NULL;
  1242. }
  1243. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  1244. u16 length, struct ieee80211_hdr *header)
  1245. {
  1246. __le16 fc;
  1247. u16 len;
  1248. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  1249. return;
  1250. if (!priv->tx_traffic)
  1251. return;
  1252. fc = header->frame_control;
  1253. if (ieee80211_is_data(fc)) {
  1254. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1255. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1256. memcpy((priv->tx_traffic +
  1257. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1258. header, len);
  1259. priv->tx_traffic_idx =
  1260. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1261. }
  1262. }
  1263. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  1264. u16 length, struct ieee80211_hdr *header)
  1265. {
  1266. __le16 fc;
  1267. u16 len;
  1268. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  1269. return;
  1270. if (!priv->rx_traffic)
  1271. return;
  1272. fc = header->frame_control;
  1273. if (ieee80211_is_data(fc)) {
  1274. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1275. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1276. memcpy((priv->rx_traffic +
  1277. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1278. header, len);
  1279. priv->rx_traffic_idx =
  1280. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1281. }
  1282. }
  1283. const char *get_mgmt_string(int cmd)
  1284. {
  1285. switch (cmd) {
  1286. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  1287. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  1288. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  1289. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  1290. IWL_CMD(MANAGEMENT_PROBE_REQ);
  1291. IWL_CMD(MANAGEMENT_PROBE_RESP);
  1292. IWL_CMD(MANAGEMENT_BEACON);
  1293. IWL_CMD(MANAGEMENT_ATIM);
  1294. IWL_CMD(MANAGEMENT_DISASSOC);
  1295. IWL_CMD(MANAGEMENT_AUTH);
  1296. IWL_CMD(MANAGEMENT_DEAUTH);
  1297. IWL_CMD(MANAGEMENT_ACTION);
  1298. default:
  1299. return "UNKNOWN";
  1300. }
  1301. }
  1302. const char *get_ctrl_string(int cmd)
  1303. {
  1304. switch (cmd) {
  1305. IWL_CMD(CONTROL_BACK_REQ);
  1306. IWL_CMD(CONTROL_BACK);
  1307. IWL_CMD(CONTROL_PSPOLL);
  1308. IWL_CMD(CONTROL_RTS);
  1309. IWL_CMD(CONTROL_CTS);
  1310. IWL_CMD(CONTROL_ACK);
  1311. IWL_CMD(CONTROL_CFEND);
  1312. IWL_CMD(CONTROL_CFENDACK);
  1313. default:
  1314. return "UNKNOWN";
  1315. }
  1316. }
  1317. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  1318. {
  1319. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  1320. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  1321. }
  1322. /*
  1323. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  1324. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  1325. * Use debugFs to display the rx/rx_statistics
  1326. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  1327. * information will be recorded, but DATA pkt still will be recorded
  1328. * for the reason of iwl_led.c need to control the led blinking based on
  1329. * number of tx and rx data.
  1330. *
  1331. */
  1332. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  1333. {
  1334. struct traffic_stats *stats;
  1335. if (is_tx)
  1336. stats = &priv->tx_stats;
  1337. else
  1338. stats = &priv->rx_stats;
  1339. if (ieee80211_is_mgmt(fc)) {
  1340. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1341. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1342. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1343. break;
  1344. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1345. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1346. break;
  1347. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1348. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1349. break;
  1350. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1351. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1352. break;
  1353. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1354. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1355. break;
  1356. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1357. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1358. break;
  1359. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1360. stats->mgmt[MANAGEMENT_BEACON]++;
  1361. break;
  1362. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1363. stats->mgmt[MANAGEMENT_ATIM]++;
  1364. break;
  1365. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1366. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1367. break;
  1368. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1369. stats->mgmt[MANAGEMENT_AUTH]++;
  1370. break;
  1371. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1372. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1373. break;
  1374. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1375. stats->mgmt[MANAGEMENT_ACTION]++;
  1376. break;
  1377. }
  1378. } else if (ieee80211_is_ctl(fc)) {
  1379. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1380. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1381. stats->ctrl[CONTROL_BACK_REQ]++;
  1382. break;
  1383. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1384. stats->ctrl[CONTROL_BACK]++;
  1385. break;
  1386. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1387. stats->ctrl[CONTROL_PSPOLL]++;
  1388. break;
  1389. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1390. stats->ctrl[CONTROL_RTS]++;
  1391. break;
  1392. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1393. stats->ctrl[CONTROL_CTS]++;
  1394. break;
  1395. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1396. stats->ctrl[CONTROL_ACK]++;
  1397. break;
  1398. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1399. stats->ctrl[CONTROL_CFEND]++;
  1400. break;
  1401. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1402. stats->ctrl[CONTROL_CFENDACK]++;
  1403. break;
  1404. }
  1405. } else {
  1406. /* data */
  1407. stats->data_cnt++;
  1408. stats->data_bytes += len;
  1409. }
  1410. }
  1411. #endif
  1412. static void iwl_force_rf_reset(struct iwl_priv *priv)
  1413. {
  1414. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1415. return;
  1416. if (!iwl_is_any_associated(priv)) {
  1417. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  1418. return;
  1419. }
  1420. /*
  1421. * There is no easy and better way to force reset the radio,
  1422. * the only known method is switching channel which will force to
  1423. * reset and tune the radio.
  1424. * Use internal short scan (single channel) operation to should
  1425. * achieve this objective.
  1426. * Driver should reset the radio when number of consecutive missed
  1427. * beacon, or any other uCode error condition detected.
  1428. */
  1429. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  1430. iwl_internal_short_hw_scan(priv);
  1431. }
  1432. int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
  1433. {
  1434. struct iwl_force_reset *force_reset;
  1435. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1436. return -EINVAL;
  1437. if (mode >= IWL_MAX_FORCE_RESET) {
  1438. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  1439. return -EINVAL;
  1440. }
  1441. force_reset = &priv->force_reset[mode];
  1442. force_reset->reset_request_count++;
  1443. if (!external) {
  1444. if (force_reset->last_force_reset_jiffies &&
  1445. time_after(force_reset->last_force_reset_jiffies +
  1446. force_reset->reset_duration, jiffies)) {
  1447. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  1448. force_reset->reset_reject_count++;
  1449. return -EAGAIN;
  1450. }
  1451. }
  1452. force_reset->reset_success_count++;
  1453. force_reset->last_force_reset_jiffies = jiffies;
  1454. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  1455. switch (mode) {
  1456. case IWL_RF_RESET:
  1457. iwl_force_rf_reset(priv);
  1458. break;
  1459. case IWL_FW_RESET:
  1460. /*
  1461. * if the request is from external(ex: debugfs),
  1462. * then always perform the request in regardless the module
  1463. * parameter setting
  1464. * if the request is from internal (uCode error or driver
  1465. * detect failure), then fw_restart module parameter
  1466. * need to be check before performing firmware reload
  1467. */
  1468. if (!external && !priv->cfg->mod_params->restart_fw) {
  1469. IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
  1470. "module parameter setting\n");
  1471. break;
  1472. }
  1473. IWL_ERR(priv, "On demand firmware reload\n");
  1474. iwlagn_fw_error(priv, true);
  1475. break;
  1476. }
  1477. return 0;
  1478. }
  1479. int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1480. enum nl80211_iftype newtype, bool newp2p)
  1481. {
  1482. struct iwl_priv *priv = hw->priv;
  1483. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1484. struct iwl_rxon_context *tmp;
  1485. u32 interface_modes;
  1486. int err;
  1487. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  1488. mutex_lock(&priv->mutex);
  1489. if (!ctx->vif || !iwl_is_ready_rf(priv)) {
  1490. /*
  1491. * Huh? But wait ... this can maybe happen when
  1492. * we're in the middle of a firmware restart!
  1493. */
  1494. err = -EBUSY;
  1495. goto out;
  1496. }
  1497. interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  1498. if (!(interface_modes & BIT(newtype))) {
  1499. err = -EBUSY;
  1500. goto out;
  1501. }
  1502. if (ctx->exclusive_interface_modes & BIT(newtype)) {
  1503. for_each_context(priv, tmp) {
  1504. if (ctx == tmp)
  1505. continue;
  1506. if (!tmp->vif)
  1507. continue;
  1508. /*
  1509. * The current mode switch would be exclusive, but
  1510. * another context is active ... refuse the switch.
  1511. */
  1512. err = -EBUSY;
  1513. goto out;
  1514. }
  1515. }
  1516. /* success */
  1517. iwl_teardown_interface(priv, vif, true);
  1518. vif->type = newtype;
  1519. vif->p2p = newp2p;
  1520. err = iwl_setup_interface(priv, ctx);
  1521. WARN_ON(err);
  1522. /*
  1523. * We've switched internally, but submitting to the
  1524. * device may have failed for some reason. Mask this
  1525. * error, because otherwise mac80211 will not switch
  1526. * (and set the interface type back) and we'll be
  1527. * out of sync with it.
  1528. */
  1529. err = 0;
  1530. out:
  1531. mutex_unlock(&priv->mutex);
  1532. return err;
  1533. }
  1534. /*
  1535. * On every watchdog tick we check (latest) time stamp. If it does not
  1536. * change during timeout period and queue is not empty we reset firmware.
  1537. */
  1538. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  1539. {
  1540. struct iwl_tx_queue *txq = &priv->txq[cnt];
  1541. struct iwl_queue *q = &txq->q;
  1542. unsigned long timeout;
  1543. int ret;
  1544. if (q->read_ptr == q->write_ptr) {
  1545. txq->time_stamp = jiffies;
  1546. return 0;
  1547. }
  1548. timeout = txq->time_stamp +
  1549. msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
  1550. if (time_after(jiffies, timeout)) {
  1551. IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
  1552. q->id, priv->cfg->base_params->wd_timeout);
  1553. ret = iwl_force_reset(priv, IWL_FW_RESET, false);
  1554. return (ret == -EAGAIN) ? 0 : 1;
  1555. }
  1556. return 0;
  1557. }
  1558. /*
  1559. * Making watchdog tick be a quarter of timeout assure we will
  1560. * discover the queue hung between timeout and 1.25*timeout
  1561. */
  1562. #define IWL_WD_TICK(timeout) ((timeout) / 4)
  1563. /*
  1564. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1565. * we reset the firmware. If everything is fine just rearm the timer.
  1566. */
  1567. void iwl_bg_watchdog(unsigned long data)
  1568. {
  1569. struct iwl_priv *priv = (struct iwl_priv *)data;
  1570. int cnt;
  1571. unsigned long timeout;
  1572. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1573. return;
  1574. timeout = priv->cfg->base_params->wd_timeout;
  1575. if (timeout == 0)
  1576. return;
  1577. /* monitor and check for stuck cmd queue */
  1578. if (iwl_check_stuck_queue(priv, priv->cmd_queue))
  1579. return;
  1580. /* monitor and check for other stuck queues */
  1581. if (iwl_is_any_associated(priv)) {
  1582. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  1583. /* skip as we already checked the command queue */
  1584. if (cnt == priv->cmd_queue)
  1585. continue;
  1586. if (iwl_check_stuck_queue(priv, cnt))
  1587. return;
  1588. }
  1589. }
  1590. mod_timer(&priv->watchdog, jiffies +
  1591. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1592. }
  1593. void iwl_setup_watchdog(struct iwl_priv *priv)
  1594. {
  1595. unsigned int timeout = priv->cfg->base_params->wd_timeout;
  1596. if (timeout)
  1597. mod_timer(&priv->watchdog,
  1598. jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1599. else
  1600. del_timer(&priv->watchdog);
  1601. }
  1602. /*
  1603. * extended beacon time format
  1604. * time in usec will be changed into a 32-bit value in extended:internal format
  1605. * the extended part is the beacon counts
  1606. * the internal part is the time in usec within one beacon interval
  1607. */
  1608. u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
  1609. {
  1610. u32 quot;
  1611. u32 rem;
  1612. u32 interval = beacon_interval * TIME_UNIT;
  1613. if (!interval || !usec)
  1614. return 0;
  1615. quot = (usec / interval) &
  1616. (iwl_beacon_time_mask_high(priv,
  1617. priv->hw_params.beacon_time_tsf_bits) >>
  1618. priv->hw_params.beacon_time_tsf_bits);
  1619. rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
  1620. priv->hw_params.beacon_time_tsf_bits);
  1621. return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
  1622. }
  1623. /* base is usually what we get from ucode with each received frame,
  1624. * the same as HW timer counter counting down
  1625. */
  1626. __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
  1627. u32 addon, u32 beacon_interval)
  1628. {
  1629. u32 base_low = base & iwl_beacon_time_mask_low(priv,
  1630. priv->hw_params.beacon_time_tsf_bits);
  1631. u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
  1632. priv->hw_params.beacon_time_tsf_bits);
  1633. u32 interval = beacon_interval * TIME_UNIT;
  1634. u32 res = (base & iwl_beacon_time_mask_high(priv,
  1635. priv->hw_params.beacon_time_tsf_bits)) +
  1636. (addon & iwl_beacon_time_mask_high(priv,
  1637. priv->hw_params.beacon_time_tsf_bits));
  1638. if (base_low > addon_low)
  1639. res += base_low - addon_low;
  1640. else if (base_low < addon_low) {
  1641. res += interval + base_low - addon_low;
  1642. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1643. } else
  1644. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1645. return cpu_to_le32(res);
  1646. }
  1647. #ifdef CONFIG_PM
  1648. int iwl_pci_suspend(struct device *device)
  1649. {
  1650. struct pci_dev *pdev = to_pci_dev(device);
  1651. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1652. /*
  1653. * This function is called when system goes into suspend state
  1654. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  1655. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  1656. * it will not call apm_ops.stop() to stop the DMA operation.
  1657. * Calling apm_ops.stop here to make sure we stop the DMA.
  1658. */
  1659. iwl_apm_stop(priv);
  1660. return 0;
  1661. }
  1662. int iwl_pci_resume(struct device *device)
  1663. {
  1664. struct pci_dev *pdev = to_pci_dev(device);
  1665. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1666. bool hw_rfkill = false;
  1667. /*
  1668. * We disable the RETRY_TIMEOUT register (0x41) to keep
  1669. * PCI Tx retries from interfering with C3 CPU state.
  1670. */
  1671. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  1672. iwl_enable_interrupts(priv);
  1673. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  1674. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1675. hw_rfkill = true;
  1676. if (hw_rfkill)
  1677. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1678. else
  1679. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1680. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
  1681. return 0;
  1682. }
  1683. const struct dev_pm_ops iwl_pm_ops = {
  1684. .suspend = iwl_pci_suspend,
  1685. .resume = iwl_pci_resume,
  1686. .freeze = iwl_pci_suspend,
  1687. .thaw = iwl_pci_resume,
  1688. .poweroff = iwl_pci_suspend,
  1689. .restore = iwl_pci_resume,
  1690. };
  1691. #endif /* CONFIG_PM */