sst25l.c 11 KB

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  1. /*
  2. * sst25l.c
  3. *
  4. * Driver for SST25L SPI Flash chips
  5. *
  6. * Copyright © 2009 Bluewater Systems Ltd
  7. * Author: Andre Renaud <andre@bluewatersys.com>
  8. * Author: Ryan Mallon <ryan@bluewatersys.com>
  9. *
  10. * Based on m25p80.c
  11. *
  12. * This code is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. */
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/device.h>
  20. #include <linux/mutex.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/slab.h>
  23. #include <linux/sched.h>
  24. #include <linux/mtd/mtd.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/spi/flash.h>
  28. /* Erases can take up to 3 seconds! */
  29. #define MAX_READY_WAIT_JIFFIES msecs_to_jiffies(3000)
  30. #define SST25L_CMD_WRSR 0x01 /* Write status register */
  31. #define SST25L_CMD_WRDI 0x04 /* Write disable */
  32. #define SST25L_CMD_RDSR 0x05 /* Read status register */
  33. #define SST25L_CMD_WREN 0x06 /* Write enable */
  34. #define SST25L_CMD_READ 0x03 /* High speed read */
  35. #define SST25L_CMD_EWSR 0x50 /* Enable write status register */
  36. #define SST25L_CMD_SECTOR_ERASE 0x20 /* Erase sector */
  37. #define SST25L_CMD_READ_ID 0x90 /* Read device ID */
  38. #define SST25L_CMD_AAI_PROGRAM 0xaf /* Auto address increment */
  39. #define SST25L_STATUS_BUSY (1 << 0) /* Chip is busy */
  40. #define SST25L_STATUS_WREN (1 << 1) /* Write enabled */
  41. #define SST25L_STATUS_BP0 (1 << 2) /* Block protection 0 */
  42. #define SST25L_STATUS_BP1 (1 << 3) /* Block protection 1 */
  43. struct sst25l_flash {
  44. struct spi_device *spi;
  45. struct mutex lock;
  46. struct mtd_info mtd;
  47. int partitioned;
  48. };
  49. struct flash_info {
  50. const char *name;
  51. uint16_t device_id;
  52. unsigned page_size;
  53. unsigned nr_pages;
  54. unsigned erase_size;
  55. };
  56. #define to_sst25l_flash(x) container_of(x, struct sst25l_flash, mtd)
  57. static struct flash_info __initdata sst25l_flash_info[] = {
  58. {"sst25lf020a", 0xbf43, 256, 1024, 4096},
  59. {"sst25lf040a", 0xbf44, 256, 2048, 4096},
  60. };
  61. static int sst25l_status(struct sst25l_flash *flash, int *status)
  62. {
  63. struct spi_message m;
  64. struct spi_transfer t;
  65. unsigned char cmd_resp[2];
  66. int err;
  67. spi_message_init(&m);
  68. memset(&t, 0, sizeof(struct spi_transfer));
  69. cmd_resp[0] = SST25L_CMD_RDSR;
  70. cmd_resp[1] = 0xff;
  71. t.tx_buf = cmd_resp;
  72. t.rx_buf = cmd_resp;
  73. t.len = sizeof(cmd_resp);
  74. spi_message_add_tail(&t, &m);
  75. err = spi_sync(flash->spi, &m);
  76. if (err < 0)
  77. return err;
  78. *status = cmd_resp[1];
  79. return 0;
  80. }
  81. static int sst25l_write_enable(struct sst25l_flash *flash, int enable)
  82. {
  83. unsigned char command[2];
  84. int status, err;
  85. command[0] = enable ? SST25L_CMD_WREN : SST25L_CMD_WRDI;
  86. err = spi_write(flash->spi, command, 1);
  87. if (err)
  88. return err;
  89. command[0] = SST25L_CMD_EWSR;
  90. err = spi_write(flash->spi, command, 1);
  91. if (err)
  92. return err;
  93. command[0] = SST25L_CMD_WRSR;
  94. command[1] = enable ? 0 : SST25L_STATUS_BP0 | SST25L_STATUS_BP1;
  95. err = spi_write(flash->spi, command, 2);
  96. if (err)
  97. return err;
  98. if (enable) {
  99. err = sst25l_status(flash, &status);
  100. if (err)
  101. return err;
  102. if (!(status & SST25L_STATUS_WREN))
  103. return -EROFS;
  104. }
  105. return 0;
  106. }
  107. static int sst25l_wait_till_ready(struct sst25l_flash *flash)
  108. {
  109. unsigned long deadline;
  110. int status, err;
  111. deadline = jiffies + MAX_READY_WAIT_JIFFIES;
  112. do {
  113. err = sst25l_status(flash, &status);
  114. if (err)
  115. return err;
  116. if (!(status & SST25L_STATUS_BUSY))
  117. return 0;
  118. cond_resched();
  119. } while (!time_after_eq(jiffies, deadline));
  120. return -ETIMEDOUT;
  121. }
  122. static int sst25l_erase_sector(struct sst25l_flash *flash, uint32_t offset)
  123. {
  124. unsigned char command[4];
  125. int err;
  126. err = sst25l_write_enable(flash, 1);
  127. if (err)
  128. return err;
  129. command[0] = SST25L_CMD_SECTOR_ERASE;
  130. command[1] = offset >> 16;
  131. command[2] = offset >> 8;
  132. command[3] = offset;
  133. err = spi_write(flash->spi, command, 4);
  134. if (err)
  135. return err;
  136. err = sst25l_wait_till_ready(flash);
  137. if (err)
  138. return err;
  139. return sst25l_write_enable(flash, 0);
  140. }
  141. static int sst25l_erase(struct mtd_info *mtd, struct erase_info *instr)
  142. {
  143. struct sst25l_flash *flash = to_sst25l_flash(mtd);
  144. uint32_t addr, end;
  145. int err;
  146. /* Sanity checks */
  147. if (instr->addr + instr->len > flash->mtd.size)
  148. return -EINVAL;
  149. if ((uint32_t)instr->len % mtd->erasesize)
  150. return -EINVAL;
  151. if ((uint32_t)instr->addr % mtd->erasesize)
  152. return -EINVAL;
  153. addr = instr->addr;
  154. end = addr + instr->len;
  155. mutex_lock(&flash->lock);
  156. err = sst25l_wait_till_ready(flash);
  157. if (err) {
  158. mutex_unlock(&flash->lock);
  159. return err;
  160. }
  161. while (addr < end) {
  162. err = sst25l_erase_sector(flash, addr);
  163. if (err) {
  164. mutex_unlock(&flash->lock);
  165. instr->state = MTD_ERASE_FAILED;
  166. dev_err(&flash->spi->dev, "Erase failed\n");
  167. return err;
  168. }
  169. addr += mtd->erasesize;
  170. }
  171. mutex_unlock(&flash->lock);
  172. instr->state = MTD_ERASE_DONE;
  173. mtd_erase_callback(instr);
  174. return 0;
  175. }
  176. static int sst25l_read(struct mtd_info *mtd, loff_t from, size_t len,
  177. size_t *retlen, unsigned char *buf)
  178. {
  179. struct sst25l_flash *flash = to_sst25l_flash(mtd);
  180. struct spi_transfer transfer[2];
  181. struct spi_message message;
  182. unsigned char command[4];
  183. int ret;
  184. /* Sanity checking */
  185. if (len == 0)
  186. return 0;
  187. if (from + len > flash->mtd.size)
  188. return -EINVAL;
  189. if (retlen)
  190. *retlen = 0;
  191. spi_message_init(&message);
  192. memset(&transfer, 0, sizeof(transfer));
  193. command[0] = SST25L_CMD_READ;
  194. command[1] = from >> 16;
  195. command[2] = from >> 8;
  196. command[3] = from;
  197. transfer[0].tx_buf = command;
  198. transfer[0].len = sizeof(command);
  199. spi_message_add_tail(&transfer[0], &message);
  200. transfer[1].rx_buf = buf;
  201. transfer[1].len = len;
  202. spi_message_add_tail(&transfer[1], &message);
  203. mutex_lock(&flash->lock);
  204. /* Wait for previous write/erase to complete */
  205. ret = sst25l_wait_till_ready(flash);
  206. if (ret) {
  207. mutex_unlock(&flash->lock);
  208. return ret;
  209. }
  210. spi_sync(flash->spi, &message);
  211. if (retlen && message.actual_length > sizeof(command))
  212. *retlen += message.actual_length - sizeof(command);
  213. mutex_unlock(&flash->lock);
  214. return 0;
  215. }
  216. static int sst25l_write(struct mtd_info *mtd, loff_t to, size_t len,
  217. size_t *retlen, const unsigned char *buf)
  218. {
  219. struct sst25l_flash *flash = to_sst25l_flash(mtd);
  220. int i, j, ret, bytes, copied = 0;
  221. unsigned char command[5];
  222. /* Sanity checks */
  223. if (!len)
  224. return 0;
  225. if (to + len > flash->mtd.size)
  226. return -EINVAL;
  227. if ((uint32_t)to % mtd->writesize)
  228. return -EINVAL;
  229. mutex_lock(&flash->lock);
  230. ret = sst25l_write_enable(flash, 1);
  231. if (ret)
  232. goto out;
  233. for (i = 0; i < len; i += mtd->writesize) {
  234. ret = sst25l_wait_till_ready(flash);
  235. if (ret)
  236. goto out;
  237. /* Write the first byte of the page */
  238. command[0] = SST25L_CMD_AAI_PROGRAM;
  239. command[1] = (to + i) >> 16;
  240. command[2] = (to + i) >> 8;
  241. command[3] = (to + i);
  242. command[4] = buf[i];
  243. ret = spi_write(flash->spi, command, 5);
  244. if (ret < 0)
  245. goto out;
  246. copied++;
  247. /*
  248. * Write the remaining bytes using auto address
  249. * increment mode
  250. */
  251. bytes = min_t(uint32_t, mtd->writesize, len - i);
  252. for (j = 1; j < bytes; j++, copied++) {
  253. ret = sst25l_wait_till_ready(flash);
  254. if (ret)
  255. goto out;
  256. command[1] = buf[i + j];
  257. ret = spi_write(flash->spi, command, 2);
  258. if (ret)
  259. goto out;
  260. }
  261. }
  262. out:
  263. ret = sst25l_write_enable(flash, 0);
  264. if (retlen)
  265. *retlen = copied;
  266. mutex_unlock(&flash->lock);
  267. return ret;
  268. }
  269. static struct flash_info *__devinit sst25l_match_device(struct spi_device *spi)
  270. {
  271. struct flash_info *flash_info = NULL;
  272. struct spi_message m;
  273. struct spi_transfer t;
  274. unsigned char cmd_resp[6];
  275. int i, err;
  276. uint16_t id;
  277. spi_message_init(&m);
  278. memset(&t, 0, sizeof(struct spi_transfer));
  279. cmd_resp[0] = SST25L_CMD_READ_ID;
  280. cmd_resp[1] = 0;
  281. cmd_resp[2] = 0;
  282. cmd_resp[3] = 0;
  283. cmd_resp[4] = 0xff;
  284. cmd_resp[5] = 0xff;
  285. t.tx_buf = cmd_resp;
  286. t.rx_buf = cmd_resp;
  287. t.len = sizeof(cmd_resp);
  288. spi_message_add_tail(&t, &m);
  289. err = spi_sync(spi, &m);
  290. if (err < 0) {
  291. dev_err(&spi->dev, "error reading device id\n");
  292. return NULL;
  293. }
  294. id = (cmd_resp[4] << 8) | cmd_resp[5];
  295. for (i = 0; i < ARRAY_SIZE(sst25l_flash_info); i++)
  296. if (sst25l_flash_info[i].device_id == id)
  297. flash_info = &sst25l_flash_info[i];
  298. if (!flash_info)
  299. dev_err(&spi->dev, "unknown id %.4x\n", id);
  300. return flash_info;
  301. }
  302. static int __devinit sst25l_probe(struct spi_device *spi)
  303. {
  304. struct flash_info *flash_info;
  305. struct sst25l_flash *flash;
  306. struct flash_platform_data *data;
  307. int ret, i;
  308. flash_info = sst25l_match_device(spi);
  309. if (!flash_info)
  310. return -ENODEV;
  311. flash = kzalloc(sizeof(struct sst25l_flash), GFP_KERNEL);
  312. if (!flash)
  313. return -ENOMEM;
  314. flash->spi = spi;
  315. mutex_init(&flash->lock);
  316. dev_set_drvdata(&spi->dev, flash);
  317. data = spi->dev.platform_data;
  318. if (data && data->name)
  319. flash->mtd.name = data->name;
  320. else
  321. flash->mtd.name = dev_name(&spi->dev);
  322. flash->mtd.type = MTD_NORFLASH;
  323. flash->mtd.flags = MTD_CAP_NORFLASH;
  324. flash->mtd.erasesize = flash_info->erase_size;
  325. flash->mtd.writesize = flash_info->page_size;
  326. flash->mtd.size = flash_info->page_size * flash_info->nr_pages;
  327. flash->mtd.erase = sst25l_erase;
  328. flash->mtd.read = sst25l_read;
  329. flash->mtd.write = sst25l_write;
  330. dev_info(&spi->dev, "%s (%lld KiB)\n", flash_info->name,
  331. (long long)flash->mtd.size >> 10);
  332. DEBUG(MTD_DEBUG_LEVEL2,
  333. "mtd .name = %s, .size = 0x%llx (%lldMiB) "
  334. ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
  335. flash->mtd.name,
  336. (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
  337. flash->mtd.erasesize, flash->mtd.erasesize / 1024,
  338. flash->mtd.numeraseregions);
  339. if (mtd_has_partitions()) {
  340. struct mtd_partition *parts = NULL;
  341. int nr_parts = 0;
  342. if (mtd_has_cmdlinepart()) {
  343. static const char *part_probes[] =
  344. {"cmdlinepart", NULL};
  345. nr_parts = parse_mtd_partitions(&flash->mtd,
  346. part_probes,
  347. &parts, 0);
  348. }
  349. if (nr_parts <= 0 && data && data->parts) {
  350. parts = data->parts;
  351. nr_parts = data->nr_parts;
  352. }
  353. if (nr_parts > 0) {
  354. for (i = 0; i < nr_parts; i++) {
  355. DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
  356. "{.name = %s, .offset = 0x%llx, "
  357. ".size = 0x%llx (%lldKiB) }\n",
  358. i, parts[i].name,
  359. (long long)parts[i].offset,
  360. (long long)parts[i].size,
  361. (long long)(parts[i].size >> 10));
  362. }
  363. flash->partitioned = 1;
  364. return add_mtd_partitions(&flash->mtd,
  365. parts, nr_parts);
  366. }
  367. } else if (data && data->nr_parts) {
  368. dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
  369. data->nr_parts, data->name);
  370. }
  371. ret = add_mtd_device(&flash->mtd);
  372. if (ret == 1) {
  373. kfree(flash);
  374. dev_set_drvdata(&spi->dev, NULL);
  375. return -ENODEV;
  376. }
  377. return 0;
  378. }
  379. static int __exit sst25l_remove(struct spi_device *spi)
  380. {
  381. struct sst25l_flash *flash = dev_get_drvdata(&spi->dev);
  382. int ret;
  383. if (mtd_has_partitions() && flash->partitioned)
  384. ret = del_mtd_partitions(&flash->mtd);
  385. else
  386. ret = del_mtd_device(&flash->mtd);
  387. if (ret == 0)
  388. kfree(flash);
  389. return ret;
  390. }
  391. static struct spi_driver sst25l_driver = {
  392. .driver = {
  393. .name = "sst25l",
  394. .bus = &spi_bus_type,
  395. .owner = THIS_MODULE,
  396. },
  397. .probe = sst25l_probe,
  398. .remove = __exit_p(sst25l_remove),
  399. };
  400. static int __init sst25l_init(void)
  401. {
  402. return spi_register_driver(&sst25l_driver);
  403. }
  404. static void __exit sst25l_exit(void)
  405. {
  406. spi_unregister_driver(&sst25l_driver);
  407. }
  408. module_init(sst25l_init);
  409. module_exit(sst25l_exit);
  410. MODULE_DESCRIPTION("MTD SPI driver for SST25L Flash chips");
  411. MODULE_AUTHOR("Andre Renaud <andre@bluewatersys.com>, "
  412. "Ryan Mallon <ryan@bluewatersys.com>");
  413. MODULE_LICENSE("GPL");