ab8500-gpadc.c 17 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Arun R Murthy <arun.murthy@stericsson.com>
  6. * Author: Daniel Willerud <daniel.willerud@stericsson.com>
  7. * Author: Johan Palsson <johan.palsson@stericsson.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/device.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/completion.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/err.h>
  19. #include <linux/slab.h>
  20. #include <linux/list.h>
  21. #include <linux/mfd/ab8500.h>
  22. #include <linux/mfd/abx500.h>
  23. #include <linux/mfd/ab8500/gpadc.h>
  24. /*
  25. * GPADC register offsets
  26. * Bank : 0x0A
  27. */
  28. #define AB8500_GPADC_CTRL1_REG 0x00
  29. #define AB8500_GPADC_CTRL2_REG 0x01
  30. #define AB8500_GPADC_CTRL3_REG 0x02
  31. #define AB8500_GPADC_AUTO_TIMER_REG 0x03
  32. #define AB8500_GPADC_STAT_REG 0x04
  33. #define AB8500_GPADC_MANDATAL_REG 0x05
  34. #define AB8500_GPADC_MANDATAH_REG 0x06
  35. #define AB8500_GPADC_AUTODATAL_REG 0x07
  36. #define AB8500_GPADC_AUTODATAH_REG 0x08
  37. #define AB8500_GPADC_MUX_CTRL_REG 0x09
  38. /*
  39. * OTP register offsets
  40. * Bank : 0x15
  41. */
  42. #define AB8500_GPADC_CAL_1 0x0F
  43. #define AB8500_GPADC_CAL_2 0x10
  44. #define AB8500_GPADC_CAL_3 0x11
  45. #define AB8500_GPADC_CAL_4 0x12
  46. #define AB8500_GPADC_CAL_5 0x13
  47. #define AB8500_GPADC_CAL_6 0x14
  48. #define AB8500_GPADC_CAL_7 0x15
  49. /* gpadc constants */
  50. #define EN_VINTCORE12 0x04
  51. #define EN_VTVOUT 0x02
  52. #define EN_GPADC 0x01
  53. #define DIS_GPADC 0x00
  54. #define SW_AVG_16 0x60
  55. #define ADC_SW_CONV 0x04
  56. #define EN_ICHAR 0x80
  57. #define EN_BUF 0x40
  58. #define DIS_ZERO 0x00
  59. #define GPADC_BUSY 0x01
  60. /* GPADC constants from AB8500 spec, UM0836 */
  61. #define ADC_RESOLUTION 1024
  62. #define ADC_CH_BTEMP_MIN 0
  63. #define ADC_CH_BTEMP_MAX 1350
  64. #define ADC_CH_DIETEMP_MIN 0
  65. #define ADC_CH_DIETEMP_MAX 1350
  66. #define ADC_CH_CHG_V_MIN 0
  67. #define ADC_CH_CHG_V_MAX 20030
  68. #define ADC_CH_ACCDET2_MIN 0
  69. #define ADC_CH_ACCDET2_MAX 2500
  70. #define ADC_CH_VBAT_MIN 2300
  71. #define ADC_CH_VBAT_MAX 4800
  72. #define ADC_CH_CHG_I_MIN 0
  73. #define ADC_CH_CHG_I_MAX 1500
  74. #define ADC_CH_BKBAT_MIN 0
  75. #define ADC_CH_BKBAT_MAX 3200
  76. /* This is used to not lose precision when dividing to get gain and offset */
  77. #define CALIB_SCALE 1000
  78. enum cal_channels {
  79. ADC_INPUT_VMAIN = 0,
  80. ADC_INPUT_BTEMP,
  81. ADC_INPUT_VBAT,
  82. NBR_CAL_INPUTS,
  83. };
  84. /**
  85. * struct adc_cal_data - Table for storing gain and offset for the calibrated
  86. * ADC channels
  87. * @gain: Gain of the ADC channel
  88. * @offset: Offset of the ADC channel
  89. */
  90. struct adc_cal_data {
  91. u64 gain;
  92. u64 offset;
  93. };
  94. /**
  95. * struct ab8500_gpadc - AB8500 GPADC device information
  96. * @dev: pointer to the struct device
  97. * @node: a list of AB8500 GPADCs, hence prepared for
  98. reentrance
  99. * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
  100. * the completion of gpadc conversion
  101. * @ab8500_gpadc_lock: structure of type mutex
  102. * @regu: pointer to the struct regulator
  103. * @irq: interrupt number that is used by gpadc
  104. * @cal_data array of ADC calibration data structs
  105. */
  106. struct ab8500_gpadc {
  107. struct device *dev;
  108. struct list_head node;
  109. struct completion ab8500_gpadc_complete;
  110. struct mutex ab8500_gpadc_lock;
  111. struct regulator *regu;
  112. int irq;
  113. struct adc_cal_data cal_data[NBR_CAL_INPUTS];
  114. };
  115. static LIST_HEAD(ab8500_gpadc_list);
  116. /**
  117. * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
  118. * (i.e. the first GPADC in the instance list)
  119. */
  120. struct ab8500_gpadc *ab8500_gpadc_get(char *name)
  121. {
  122. struct ab8500_gpadc *gpadc;
  123. list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
  124. if (!strcmp(name, dev_name(gpadc->dev)))
  125. return gpadc;
  126. }
  127. return ERR_PTR(-ENOENT);
  128. }
  129. EXPORT_SYMBOL(ab8500_gpadc_get);
  130. static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
  131. int ad_value)
  132. {
  133. int res;
  134. switch (input) {
  135. case MAIN_CHARGER_V:
  136. /* For some reason we don't have calibrated data */
  137. if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
  138. res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
  139. ADC_CH_CHG_V_MIN) * ad_value /
  140. ADC_RESOLUTION;
  141. break;
  142. }
  143. /* Here we can use the calibrated data */
  144. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
  145. gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
  146. break;
  147. case BAT_CTRL:
  148. case BTEMP_BALL:
  149. case ACC_DETECT1:
  150. case ADC_AUX1:
  151. case ADC_AUX2:
  152. /* For some reason we don't have calibrated data */
  153. if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
  154. res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
  155. ADC_CH_BTEMP_MIN) * ad_value /
  156. ADC_RESOLUTION;
  157. break;
  158. }
  159. /* Here we can use the calibrated data */
  160. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
  161. gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
  162. break;
  163. case MAIN_BAT_V:
  164. /* For some reason we don't have calibrated data */
  165. if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
  166. res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
  167. ADC_CH_VBAT_MIN) * ad_value /
  168. ADC_RESOLUTION;
  169. break;
  170. }
  171. /* Here we can use the calibrated data */
  172. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
  173. gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
  174. break;
  175. case DIE_TEMP:
  176. res = ADC_CH_DIETEMP_MIN +
  177. (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
  178. ADC_RESOLUTION;
  179. break;
  180. case ACC_DETECT2:
  181. res = ADC_CH_ACCDET2_MIN +
  182. (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
  183. ADC_RESOLUTION;
  184. break;
  185. case VBUS_V:
  186. res = ADC_CH_CHG_V_MIN +
  187. (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
  188. ADC_RESOLUTION;
  189. break;
  190. case MAIN_CHARGER_C:
  191. case USB_CHARGER_C:
  192. res = ADC_CH_CHG_I_MIN +
  193. (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
  194. ADC_RESOLUTION;
  195. break;
  196. case BK_BAT_V:
  197. res = ADC_CH_BKBAT_MIN +
  198. (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
  199. ADC_RESOLUTION;
  200. break;
  201. default:
  202. dev_err(gpadc->dev,
  203. "unknown channel, not possible to convert\n");
  204. res = -EINVAL;
  205. break;
  206. }
  207. return res;
  208. }
  209. /**
  210. * ab8500_gpadc_convert() - gpadc conversion
  211. * @input: analog input to be converted to digital data
  212. *
  213. * This function converts the selected analog i/p to digital
  214. * data.
  215. */
  216. int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
  217. {
  218. int ret;
  219. u16 data = 0;
  220. int looplimit = 0;
  221. u8 val, low_data, high_data;
  222. if (!gpadc)
  223. return -ENODEV;
  224. mutex_lock(&gpadc->ab8500_gpadc_lock);
  225. /* Enable VTVout LDO this is required for GPADC */
  226. regulator_enable(gpadc->regu);
  227. /* Check if ADC is not busy, lock and proceed */
  228. do {
  229. ret = abx500_get_register_interruptible(gpadc->dev,
  230. AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
  231. if (ret < 0)
  232. goto out;
  233. if (!(val & GPADC_BUSY))
  234. break;
  235. msleep(10);
  236. } while (++looplimit < 10);
  237. if (looplimit >= 10 && (val & GPADC_BUSY)) {
  238. dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
  239. ret = -EINVAL;
  240. goto out;
  241. }
  242. /* Enable GPADC */
  243. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  244. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
  245. if (ret < 0) {
  246. dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
  247. goto out;
  248. }
  249. /* Select the input source and set average samples to 16 */
  250. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  251. AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16));
  252. if (ret < 0) {
  253. dev_err(gpadc->dev,
  254. "gpadc_conversion: set avg samples failed\n");
  255. goto out;
  256. }
  257. /*
  258. * Enable ADC, buffering, select rising edge and enable ADC path
  259. * charging current sense if it needed
  260. */
  261. switch (input) {
  262. case MAIN_CHARGER_C:
  263. case USB_CHARGER_C:
  264. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  265. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  266. EN_BUF | EN_ICHAR,
  267. EN_BUF | EN_ICHAR);
  268. break;
  269. default:
  270. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  271. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
  272. break;
  273. }
  274. if (ret < 0) {
  275. dev_err(gpadc->dev,
  276. "gpadc_conversion: select falling edge failed\n");
  277. goto out;
  278. }
  279. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  280. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
  281. if (ret < 0) {
  282. dev_err(gpadc->dev,
  283. "gpadc_conversion: start s/w conversion failed\n");
  284. goto out;
  285. }
  286. /* wait for completion of conversion */
  287. if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
  288. dev_err(gpadc->dev,
  289. "timeout: didnt recieve GPADC conversion interrupt\n");
  290. ret = -EINVAL;
  291. goto out;
  292. }
  293. /* Read the converted RAW data */
  294. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  295. AB8500_GPADC_MANDATAL_REG, &low_data);
  296. if (ret < 0) {
  297. dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
  298. goto out;
  299. }
  300. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  301. AB8500_GPADC_MANDATAH_REG, &high_data);
  302. if (ret < 0) {
  303. dev_err(gpadc->dev,
  304. "gpadc_conversion: read high data failed\n");
  305. goto out;
  306. }
  307. data = (high_data << 8) | low_data;
  308. /* Disable GPADC */
  309. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  310. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  311. if (ret < 0) {
  312. dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
  313. goto out;
  314. }
  315. /* Disable VTVout LDO this is required for GPADC */
  316. regulator_disable(gpadc->regu);
  317. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  318. ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
  319. return ret;
  320. out:
  321. /*
  322. * It has shown to be needed to turn off the GPADC if an error occurs,
  323. * otherwise we might have problem when waiting for the busy bit in the
  324. * GPADC status register to go low. In V1.1 there wait_for_completion
  325. * seems to timeout when waiting for an interrupt.. Not seen in V2.0
  326. */
  327. (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  328. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  329. regulator_disable(gpadc->regu);
  330. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  331. dev_err(gpadc->dev,
  332. "gpadc_conversion: Failed to AD convert channel %d\n", input);
  333. return ret;
  334. }
  335. EXPORT_SYMBOL(ab8500_gpadc_convert);
  336. /**
  337. * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
  338. * @irq: irq number
  339. * @data: pointer to the data passed during request irq
  340. *
  341. * This is a interrupt service routine for s/w gpadc conversion completion.
  342. * Notifies the gpadc completion is completed and the converted raw value
  343. * can be read from the registers.
  344. * Returns IRQ status(IRQ_HANDLED)
  345. */
  346. static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
  347. {
  348. struct ab8500_gpadc *gpadc = _gpadc;
  349. complete(&gpadc->ab8500_gpadc_complete);
  350. return IRQ_HANDLED;
  351. }
  352. static int otp_cal_regs[] = {
  353. AB8500_GPADC_CAL_1,
  354. AB8500_GPADC_CAL_2,
  355. AB8500_GPADC_CAL_3,
  356. AB8500_GPADC_CAL_4,
  357. AB8500_GPADC_CAL_5,
  358. AB8500_GPADC_CAL_6,
  359. AB8500_GPADC_CAL_7,
  360. };
  361. static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
  362. {
  363. int i;
  364. int ret[ARRAY_SIZE(otp_cal_regs)];
  365. u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
  366. int vmain_high, vmain_low;
  367. int btemp_high, btemp_low;
  368. int vbat_high, vbat_low;
  369. /* First we read all OTP registers and store the error code */
  370. for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
  371. ret[i] = abx500_get_register_interruptible(gpadc->dev,
  372. AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
  373. if (ret[i] < 0)
  374. dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
  375. __func__, otp_cal_regs[i]);
  376. }
  377. /*
  378. * The ADC calibration data is stored in OTP registers.
  379. * The layout of the calibration data is outlined below and a more
  380. * detailed description can be found in UM0836
  381. *
  382. * vm_h/l = vmain_high/low
  383. * bt_h/l = btemp_high/low
  384. * vb_h/l = vbat_high/low
  385. *
  386. * Data bits:
  387. * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
  388. * |.......|.......|.......|.......|.......|.......|.......|.......
  389. * | | vm_h9 | vm_h8
  390. * |.......|.......|.......|.......|.......|.......|.......|.......
  391. * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
  392. * |.......|.......|.......|.......|.......|.......|.......|.......
  393. * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
  394. * |.......|.......|.......|.......|.......|.......|.......|.......
  395. * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
  396. * |.......|.......|.......|.......|.......|.......|.......|.......
  397. * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
  398. * |.......|.......|.......|.......|.......|.......|.......|.......
  399. * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
  400. * |.......|.......|.......|.......|.......|.......|.......|.......
  401. * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
  402. * |.......|.......|.......|.......|.......|.......|.......|.......
  403. *
  404. *
  405. * Ideal output ADC codes corresponding to injected input voltages
  406. * during manufacturing is:
  407. *
  408. * vmain_high: Vin = 19500mV / ADC ideal code = 997
  409. * vmain_low: Vin = 315mV / ADC ideal code = 16
  410. * btemp_high: Vin = 1300mV / ADC ideal code = 985
  411. * btemp_low: Vin = 21mV / ADC ideal code = 16
  412. * vbat_high: Vin = 4700mV / ADC ideal code = 982
  413. * vbat_low: Vin = 2380mV / ADC ideal code = 33
  414. */
  415. /* Calculate gain and offset for VMAIN if all reads succeeded */
  416. if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
  417. vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
  418. ((gpadc_cal[1] & 0x3F) << 2) |
  419. ((gpadc_cal[2] & 0xC0) >> 6));
  420. vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
  421. gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
  422. (19500 - 315) / (vmain_high - vmain_low);
  423. gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
  424. (CALIB_SCALE * (19500 - 315) /
  425. (vmain_high - vmain_low)) * vmain_high;
  426. } else {
  427. gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
  428. }
  429. /* Calculate gain and offset for BTEMP if all reads succeeded */
  430. if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
  431. btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
  432. (gpadc_cal[3] << 1) |
  433. ((gpadc_cal[4] & 0x80) >> 7));
  434. btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
  435. gpadc->cal_data[ADC_INPUT_BTEMP].gain =
  436. CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
  437. gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
  438. (CALIB_SCALE * (1300 - 21) /
  439. (btemp_high - btemp_low)) * btemp_high;
  440. } else {
  441. gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
  442. }
  443. /* Calculate gain and offset for VBAT if all reads succeeded */
  444. if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
  445. vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
  446. vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
  447. gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
  448. (4700 - 2380) / (vbat_high - vbat_low);
  449. gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
  450. (CALIB_SCALE * (4700 - 2380) /
  451. (vbat_high - vbat_low)) * vbat_high;
  452. } else {
  453. gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
  454. }
  455. dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
  456. gpadc->cal_data[ADC_INPUT_VMAIN].gain,
  457. gpadc->cal_data[ADC_INPUT_VMAIN].offset);
  458. dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
  459. gpadc->cal_data[ADC_INPUT_BTEMP].gain,
  460. gpadc->cal_data[ADC_INPUT_BTEMP].offset);
  461. dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
  462. gpadc->cal_data[ADC_INPUT_VBAT].gain,
  463. gpadc->cal_data[ADC_INPUT_VBAT].offset);
  464. }
  465. static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
  466. {
  467. int ret = 0;
  468. struct ab8500_gpadc *gpadc;
  469. gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
  470. if (!gpadc) {
  471. dev_err(&pdev->dev, "Error: No memory\n");
  472. return -ENOMEM;
  473. }
  474. gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
  475. if (gpadc->irq < 0) {
  476. dev_err(gpadc->dev, "failed to get platform irq-%d\n",
  477. gpadc->irq);
  478. ret = gpadc->irq;
  479. goto fail;
  480. }
  481. gpadc->dev = &pdev->dev;
  482. mutex_init(&gpadc->ab8500_gpadc_lock);
  483. /* Initialize completion used to notify completion of conversion */
  484. init_completion(&gpadc->ab8500_gpadc_complete);
  485. /* Register interrupt - SwAdcComplete */
  486. ret = request_threaded_irq(gpadc->irq, NULL,
  487. ab8500_bm_gpswadcconvend_handler,
  488. IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
  489. if (ret < 0) {
  490. dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
  491. gpadc->irq);
  492. goto fail;
  493. }
  494. /* VTVout LDO used to power up ab8500-GPADC */
  495. gpadc->regu = regulator_get(&pdev->dev, "vddadc");
  496. if (IS_ERR(gpadc->regu)) {
  497. ret = PTR_ERR(gpadc->regu);
  498. dev_err(gpadc->dev, "failed to get vtvout LDO\n");
  499. goto fail_irq;
  500. }
  501. ab8500_gpadc_read_calibration_data(gpadc);
  502. list_add_tail(&gpadc->node, &ab8500_gpadc_list);
  503. dev_dbg(gpadc->dev, "probe success\n");
  504. return 0;
  505. fail_irq:
  506. free_irq(gpadc->irq, gpadc);
  507. fail:
  508. kfree(gpadc);
  509. gpadc = NULL;
  510. return ret;
  511. }
  512. static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
  513. {
  514. struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
  515. /* remove this gpadc entry from the list */
  516. list_del(&gpadc->node);
  517. /* remove interrupt - completion of Sw ADC conversion */
  518. free_irq(gpadc->irq, gpadc);
  519. /* disable VTVout LDO that is being used by GPADC */
  520. regulator_put(gpadc->regu);
  521. kfree(gpadc);
  522. gpadc = NULL;
  523. return 0;
  524. }
  525. static struct platform_driver ab8500_gpadc_driver = {
  526. .probe = ab8500_gpadc_probe,
  527. .remove = __devexit_p(ab8500_gpadc_remove),
  528. .driver = {
  529. .name = "ab8500-gpadc",
  530. .owner = THIS_MODULE,
  531. },
  532. };
  533. static int __init ab8500_gpadc_init(void)
  534. {
  535. return platform_driver_register(&ab8500_gpadc_driver);
  536. }
  537. static void __exit ab8500_gpadc_exit(void)
  538. {
  539. platform_driver_unregister(&ab8500_gpadc_driver);
  540. }
  541. subsys_initcall_sync(ab8500_gpadc_init);
  542. module_exit(ab8500_gpadc_exit);
  543. MODULE_LICENSE("GPL v2");
  544. MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
  545. MODULE_ALIAS("platform:ab8500_gpadc");
  546. MODULE_DESCRIPTION("AB8500 GPADC driver");