ab3550-core.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397
  1. /*
  2. * Copyright (C) 2007-2010 ST-Ericsson
  3. * License terms: GNU General Public License (GPL) version 2
  4. * Low-level core for exclusive access to the AB3550 IC on the I2C bus
  5. * and some basic chip-configuration.
  6. * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
  7. * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
  8. * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  9. * Author: Rickard Andersson <rickard.andersson@stericsson.com>
  10. */
  11. #include <linux/i2c.h>
  12. #include <linux/mutex.h>
  13. #include <linux/err.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/device.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/random.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/debugfs.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/uaccess.h>
  24. #include <linux/mfd/abx500.h>
  25. #include <linux/list.h>
  26. #include <linux/bitops.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mfd/core.h>
  29. #define AB3550_NAME_STRING "ab3550"
  30. #define AB3550_ID_FORMAT_STRING "AB3550 %s"
  31. #define AB3550_NUM_BANKS 2
  32. #define AB3550_NUM_EVENT_REG 5
  33. /* These are the only registers inside AB3550 used in this main file */
  34. /* Chip ID register */
  35. #define AB3550_CID_REG 0x20
  36. /* Interrupt event registers */
  37. #define AB3550_EVENT_BANK 0
  38. #define AB3550_EVENT_REG 0x22
  39. /* Read/write operation values. */
  40. #define AB3550_PERM_RD (0x01)
  41. #define AB3550_PERM_WR (0x02)
  42. /* Read/write permissions. */
  43. #define AB3550_PERM_RO (AB3550_PERM_RD)
  44. #define AB3550_PERM_RW (AB3550_PERM_RD | AB3550_PERM_WR)
  45. /**
  46. * struct ab3550
  47. * @access_mutex: lock out concurrent accesses to the AB registers
  48. * @i2c_client: I2C client for this chip
  49. * @chip_name: name of this chip variant
  50. * @chip_id: 8 bit chip ID for this chip variant
  51. * @mask_work: a worker for writing to mask registers
  52. * @event_lock: a lock to protect the event_mask
  53. * @event_mask: a local copy of the mask event registers
  54. * @startup_events: a copy of the first reading of the event registers
  55. * @startup_events_read: whether the first events have been read
  56. */
  57. struct ab3550 {
  58. struct mutex access_mutex;
  59. struct i2c_client *i2c_client[AB3550_NUM_BANKS];
  60. char chip_name[32];
  61. u8 chip_id;
  62. struct work_struct mask_work;
  63. spinlock_t event_lock;
  64. u8 event_mask[AB3550_NUM_EVENT_REG];
  65. u8 startup_events[AB3550_NUM_EVENT_REG];
  66. bool startup_events_read;
  67. #ifdef CONFIG_DEBUG_FS
  68. unsigned int debug_bank;
  69. unsigned int debug_address;
  70. #endif
  71. };
  72. /**
  73. * struct ab3550_reg_range
  74. * @first: the first address of the range
  75. * @last: the last address of the range
  76. * @perm: access permissions for the range
  77. */
  78. struct ab3550_reg_range {
  79. u8 first;
  80. u8 last;
  81. u8 perm;
  82. };
  83. /**
  84. * struct ab3550_reg_ranges
  85. * @count: the number of ranges in the list
  86. * @range: the list of register ranges
  87. */
  88. struct ab3550_reg_ranges {
  89. u8 count;
  90. const struct ab3550_reg_range *range;
  91. };
  92. /*
  93. * Permissible register ranges for reading and writing per device and bank.
  94. *
  95. * The ranges must be listed in increasing address order, and no overlaps are
  96. * allowed. It is assumed that write permission implies read permission
  97. * (i.e. only RO and RW permissions should be used). Ranges with write
  98. * permission must not be split up.
  99. */
  100. #define NO_RANGE {.count = 0, .range = NULL,}
  101. static struct
  102. ab3550_reg_ranges ab3550_reg_ranges[AB3550_NUM_DEVICES][AB3550_NUM_BANKS] = {
  103. [AB3550_DEVID_DAC] = {
  104. NO_RANGE,
  105. {
  106. .count = 2,
  107. .range = (struct ab3550_reg_range[]) {
  108. {
  109. .first = 0xb0,
  110. .last = 0xba,
  111. .perm = AB3550_PERM_RW,
  112. },
  113. {
  114. .first = 0xbc,
  115. .last = 0xc3,
  116. .perm = AB3550_PERM_RW,
  117. },
  118. },
  119. },
  120. },
  121. [AB3550_DEVID_LEDS] = {
  122. NO_RANGE,
  123. {
  124. .count = 2,
  125. .range = (struct ab3550_reg_range[]) {
  126. {
  127. .first = 0x5a,
  128. .last = 0x88,
  129. .perm = AB3550_PERM_RW,
  130. },
  131. {
  132. .first = 0x8a,
  133. .last = 0xad,
  134. .perm = AB3550_PERM_RW,
  135. },
  136. }
  137. },
  138. },
  139. [AB3550_DEVID_POWER] = {
  140. {
  141. .count = 1,
  142. .range = (struct ab3550_reg_range[]) {
  143. {
  144. .first = 0x21,
  145. .last = 0x21,
  146. .perm = AB3550_PERM_RO,
  147. },
  148. }
  149. },
  150. NO_RANGE,
  151. },
  152. [AB3550_DEVID_REGULATORS] = {
  153. {
  154. .count = 1,
  155. .range = (struct ab3550_reg_range[]) {
  156. {
  157. .first = 0x69,
  158. .last = 0xa3,
  159. .perm = AB3550_PERM_RW,
  160. },
  161. }
  162. },
  163. {
  164. .count = 1,
  165. .range = (struct ab3550_reg_range[]) {
  166. {
  167. .first = 0x14,
  168. .last = 0x16,
  169. .perm = AB3550_PERM_RW,
  170. },
  171. }
  172. },
  173. },
  174. [AB3550_DEVID_SIM] = {
  175. {
  176. .count = 1,
  177. .range = (struct ab3550_reg_range[]) {
  178. {
  179. .first = 0x21,
  180. .last = 0x21,
  181. .perm = AB3550_PERM_RO,
  182. },
  183. }
  184. },
  185. {
  186. .count = 1,
  187. .range = (struct ab3550_reg_range[]) {
  188. {
  189. .first = 0x14,
  190. .last = 0x17,
  191. .perm = AB3550_PERM_RW,
  192. },
  193. }
  194. },
  195. },
  196. [AB3550_DEVID_UART] = {
  197. NO_RANGE,
  198. NO_RANGE,
  199. },
  200. [AB3550_DEVID_RTC] = {
  201. {
  202. .count = 1,
  203. .range = (struct ab3550_reg_range[]) {
  204. {
  205. .first = 0x00,
  206. .last = 0x0c,
  207. .perm = AB3550_PERM_RW,
  208. },
  209. }
  210. },
  211. NO_RANGE,
  212. },
  213. [AB3550_DEVID_CHARGER] = {
  214. {
  215. .count = 2,
  216. .range = (struct ab3550_reg_range[]) {
  217. {
  218. .first = 0x10,
  219. .last = 0x1a,
  220. .perm = AB3550_PERM_RW,
  221. },
  222. {
  223. .first = 0x21,
  224. .last = 0x21,
  225. .perm = AB3550_PERM_RO,
  226. },
  227. }
  228. },
  229. NO_RANGE,
  230. },
  231. [AB3550_DEVID_ADC] = {
  232. NO_RANGE,
  233. {
  234. .count = 1,
  235. .range = (struct ab3550_reg_range[]) {
  236. {
  237. .first = 0x20,
  238. .last = 0x56,
  239. .perm = AB3550_PERM_RW,
  240. },
  241. }
  242. },
  243. },
  244. [AB3550_DEVID_FUELGAUGE] = {
  245. {
  246. .count = 1,
  247. .range = (struct ab3550_reg_range[]) {
  248. {
  249. .first = 0x21,
  250. .last = 0x21,
  251. .perm = AB3550_PERM_RO,
  252. },
  253. }
  254. },
  255. {
  256. .count = 1,
  257. .range = (struct ab3550_reg_range[]) {
  258. {
  259. .first = 0x00,
  260. .last = 0x0e,
  261. .perm = AB3550_PERM_RW,
  262. },
  263. }
  264. },
  265. },
  266. [AB3550_DEVID_VIBRATOR] = {
  267. NO_RANGE,
  268. {
  269. .count = 1,
  270. .range = (struct ab3550_reg_range[]) {
  271. {
  272. .first = 0x10,
  273. .last = 0x13,
  274. .perm = AB3550_PERM_RW,
  275. },
  276. }
  277. },
  278. },
  279. [AB3550_DEVID_CODEC] = {
  280. {
  281. .count = 2,
  282. .range = (struct ab3550_reg_range[]) {
  283. {
  284. .first = 0x31,
  285. .last = 0x63,
  286. .perm = AB3550_PERM_RW,
  287. },
  288. {
  289. .first = 0x65,
  290. .last = 0x68,
  291. .perm = AB3550_PERM_RW,
  292. },
  293. }
  294. },
  295. NO_RANGE,
  296. },
  297. };
  298. static struct mfd_cell ab3550_devs[AB3550_NUM_DEVICES] = {
  299. [AB3550_DEVID_DAC] = {
  300. .name = "ab3550-dac",
  301. .id = AB3550_DEVID_DAC,
  302. .num_resources = 0,
  303. },
  304. [AB3550_DEVID_LEDS] = {
  305. .name = "ab3550-leds",
  306. .id = AB3550_DEVID_LEDS,
  307. },
  308. [AB3550_DEVID_POWER] = {
  309. .name = "ab3550-power",
  310. .id = AB3550_DEVID_POWER,
  311. },
  312. [AB3550_DEVID_REGULATORS] = {
  313. .name = "ab3550-regulators",
  314. .id = AB3550_DEVID_REGULATORS,
  315. },
  316. [AB3550_DEVID_SIM] = {
  317. .name = "ab3550-sim",
  318. .id = AB3550_DEVID_SIM,
  319. },
  320. [AB3550_DEVID_UART] = {
  321. .name = "ab3550-uart",
  322. .id = AB3550_DEVID_UART,
  323. },
  324. [AB3550_DEVID_RTC] = {
  325. .name = "ab3550-rtc",
  326. .id = AB3550_DEVID_RTC,
  327. },
  328. [AB3550_DEVID_CHARGER] = {
  329. .name = "ab3550-charger",
  330. .id = AB3550_DEVID_CHARGER,
  331. },
  332. [AB3550_DEVID_ADC] = {
  333. .name = "ab3550-adc",
  334. .id = AB3550_DEVID_ADC,
  335. .num_resources = 10,
  336. .resources = (struct resource[]) {
  337. {
  338. .name = "TRIGGER-0",
  339. .flags = IORESOURCE_IRQ,
  340. .start = 16,
  341. .end = 16,
  342. },
  343. {
  344. .name = "TRIGGER-1",
  345. .flags = IORESOURCE_IRQ,
  346. .start = 17,
  347. .end = 17,
  348. },
  349. {
  350. .name = "TRIGGER-2",
  351. .flags = IORESOURCE_IRQ,
  352. .start = 18,
  353. .end = 18,
  354. },
  355. {
  356. .name = "TRIGGER-3",
  357. .flags = IORESOURCE_IRQ,
  358. .start = 19,
  359. .end = 19,
  360. },
  361. {
  362. .name = "TRIGGER-4",
  363. .flags = IORESOURCE_IRQ,
  364. .start = 20,
  365. .end = 20,
  366. },
  367. {
  368. .name = "TRIGGER-5",
  369. .flags = IORESOURCE_IRQ,
  370. .start = 21,
  371. .end = 21,
  372. },
  373. {
  374. .name = "TRIGGER-6",
  375. .flags = IORESOURCE_IRQ,
  376. .start = 22,
  377. .end = 22,
  378. },
  379. {
  380. .name = "TRIGGER-7",
  381. .flags = IORESOURCE_IRQ,
  382. .start = 23,
  383. .end = 23,
  384. },
  385. {
  386. .name = "TRIGGER-VBAT-TXON",
  387. .flags = IORESOURCE_IRQ,
  388. .start = 13,
  389. .end = 13,
  390. },
  391. {
  392. .name = "TRIGGER-VBAT",
  393. .flags = IORESOURCE_IRQ,
  394. .start = 12,
  395. .end = 12,
  396. },
  397. },
  398. },
  399. [AB3550_DEVID_FUELGAUGE] = {
  400. .name = "ab3550-fuelgauge",
  401. .id = AB3550_DEVID_FUELGAUGE,
  402. },
  403. [AB3550_DEVID_VIBRATOR] = {
  404. .name = "ab3550-vibrator",
  405. .id = AB3550_DEVID_VIBRATOR,
  406. },
  407. [AB3550_DEVID_CODEC] = {
  408. .name = "ab3550-codec",
  409. .id = AB3550_DEVID_CODEC,
  410. },
  411. };
  412. /*
  413. * I2C transactions with error messages.
  414. */
  415. static int ab3550_i2c_master_send(struct ab3550 *ab, u8 bank, u8 *data,
  416. u8 count)
  417. {
  418. int err;
  419. err = i2c_master_send(ab->i2c_client[bank], data, count);
  420. if (err < 0) {
  421. dev_err(&ab->i2c_client[0]->dev, "send error: %d\n", err);
  422. return err;
  423. }
  424. return 0;
  425. }
  426. static int ab3550_i2c_master_recv(struct ab3550 *ab, u8 bank, u8 *data,
  427. u8 count)
  428. {
  429. int err;
  430. err = i2c_master_recv(ab->i2c_client[bank], data, count);
  431. if (err < 0) {
  432. dev_err(&ab->i2c_client[0]->dev, "receive error: %d\n", err);
  433. return err;
  434. }
  435. return 0;
  436. }
  437. /*
  438. * Functionality for getting/setting register values.
  439. */
  440. static int get_register_interruptible(struct ab3550 *ab, u8 bank, u8 reg,
  441. u8 *value)
  442. {
  443. int err;
  444. err = mutex_lock_interruptible(&ab->access_mutex);
  445. if (err)
  446. return err;
  447. err = ab3550_i2c_master_send(ab, bank, &reg, 1);
  448. if (!err)
  449. err = ab3550_i2c_master_recv(ab, bank, value, 1);
  450. mutex_unlock(&ab->access_mutex);
  451. return err;
  452. }
  453. static int get_register_page_interruptible(struct ab3550 *ab, u8 bank,
  454. u8 first_reg, u8 *regvals, u8 numregs)
  455. {
  456. int err;
  457. err = mutex_lock_interruptible(&ab->access_mutex);
  458. if (err)
  459. return err;
  460. err = ab3550_i2c_master_send(ab, bank, &first_reg, 1);
  461. if (!err)
  462. err = ab3550_i2c_master_recv(ab, bank, regvals, numregs);
  463. mutex_unlock(&ab->access_mutex);
  464. return err;
  465. }
  466. static int mask_and_set_register_interruptible(struct ab3550 *ab, u8 bank,
  467. u8 reg, u8 bitmask, u8 bitvalues)
  468. {
  469. int err = 0;
  470. if (likely(bitmask)) {
  471. u8 reg_bits[2] = {reg, 0};
  472. err = mutex_lock_interruptible(&ab->access_mutex);
  473. if (err)
  474. return err;
  475. if (bitmask == 0xFF) /* No need to read in this case. */
  476. reg_bits[1] = bitvalues;
  477. else { /* Read and modify the register value. */
  478. u8 bits;
  479. err = ab3550_i2c_master_send(ab, bank, &reg, 1);
  480. if (err)
  481. goto unlock_and_return;
  482. err = ab3550_i2c_master_recv(ab, bank, &bits, 1);
  483. if (err)
  484. goto unlock_and_return;
  485. reg_bits[1] = ((~bitmask & bits) |
  486. (bitmask & bitvalues));
  487. }
  488. /* Write the new value. */
  489. err = ab3550_i2c_master_send(ab, bank, reg_bits, 2);
  490. unlock_and_return:
  491. mutex_unlock(&ab->access_mutex);
  492. }
  493. return err;
  494. }
  495. /*
  496. * Read/write permission checking functions.
  497. */
  498. static bool page_write_allowed(const struct ab3550_reg_ranges *ranges,
  499. u8 first_reg, u8 last_reg)
  500. {
  501. u8 i;
  502. if (last_reg < first_reg)
  503. return false;
  504. for (i = 0; i < ranges->count; i++) {
  505. if (first_reg < ranges->range[i].first)
  506. break;
  507. if ((last_reg <= ranges->range[i].last) &&
  508. (ranges->range[i].perm & AB3550_PERM_WR))
  509. return true;
  510. }
  511. return false;
  512. }
  513. static bool reg_write_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
  514. {
  515. return page_write_allowed(ranges, reg, reg);
  516. }
  517. static bool page_read_allowed(const struct ab3550_reg_ranges *ranges,
  518. u8 first_reg, u8 last_reg)
  519. {
  520. u8 i;
  521. if (last_reg < first_reg)
  522. return false;
  523. /* Find the range (if it exists in the list) that includes first_reg. */
  524. for (i = 0; i < ranges->count; i++) {
  525. if (first_reg < ranges->range[i].first)
  526. return false;
  527. if (first_reg <= ranges->range[i].last)
  528. break;
  529. }
  530. /* Make sure that the entire range up to and including last_reg is
  531. * readable. This may span several of the ranges in the list.
  532. */
  533. while ((i < ranges->count) &&
  534. (ranges->range[i].perm & AB3550_PERM_RD)) {
  535. if (last_reg <= ranges->range[i].last)
  536. return true;
  537. if ((++i >= ranges->count) ||
  538. (ranges->range[i].first !=
  539. (ranges->range[i - 1].last + 1))) {
  540. break;
  541. }
  542. }
  543. return false;
  544. }
  545. static bool reg_read_allowed(const struct ab3550_reg_ranges *ranges, u8 reg)
  546. {
  547. return page_read_allowed(ranges, reg, reg);
  548. }
  549. /*
  550. * The register access functionality.
  551. */
  552. static int ab3550_get_chip_id(struct device *dev)
  553. {
  554. struct ab3550 *ab = dev_get_drvdata(dev->parent);
  555. return (int)ab->chip_id;
  556. }
  557. static int ab3550_mask_and_set_register_interruptible(struct device *dev,
  558. u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
  559. {
  560. struct ab3550 *ab;
  561. struct platform_device *pdev = to_platform_device(dev);
  562. if ((AB3550_NUM_BANKS <= bank) ||
  563. !reg_write_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
  564. return -EINVAL;
  565. ab = dev_get_drvdata(dev->parent);
  566. return mask_and_set_register_interruptible(ab, bank, reg,
  567. bitmask, bitvalues);
  568. }
  569. static int ab3550_set_register_interruptible(struct device *dev, u8 bank,
  570. u8 reg, u8 value)
  571. {
  572. return ab3550_mask_and_set_register_interruptible(dev, bank, reg, 0xFF,
  573. value);
  574. }
  575. static int ab3550_get_register_interruptible(struct device *dev, u8 bank,
  576. u8 reg, u8 *value)
  577. {
  578. struct ab3550 *ab;
  579. struct platform_device *pdev = to_platform_device(dev);
  580. if ((AB3550_NUM_BANKS <= bank) ||
  581. !reg_read_allowed(&ab3550_reg_ranges[pdev->id][bank], reg))
  582. return -EINVAL;
  583. ab = dev_get_drvdata(dev->parent);
  584. return get_register_interruptible(ab, bank, reg, value);
  585. }
  586. static int ab3550_get_register_page_interruptible(struct device *dev, u8 bank,
  587. u8 first_reg, u8 *regvals, u8 numregs)
  588. {
  589. struct ab3550 *ab;
  590. struct platform_device *pdev = to_platform_device(dev);
  591. if ((AB3550_NUM_BANKS <= bank) ||
  592. !page_read_allowed(&ab3550_reg_ranges[pdev->id][bank],
  593. first_reg, (first_reg + numregs - 1)))
  594. return -EINVAL;
  595. ab = dev_get_drvdata(dev->parent);
  596. return get_register_page_interruptible(ab, bank, first_reg, regvals,
  597. numregs);
  598. }
  599. static int ab3550_event_registers_startup_state_get(struct device *dev,
  600. u8 *event)
  601. {
  602. struct ab3550 *ab;
  603. ab = dev_get_drvdata(dev->parent);
  604. if (!ab->startup_events_read)
  605. return -EAGAIN; /* Try again later */
  606. memcpy(event, ab->startup_events, AB3550_NUM_EVENT_REG);
  607. return 0;
  608. }
  609. static int ab3550_startup_irq_enabled(struct device *dev, unsigned int irq)
  610. {
  611. struct ab3550 *ab;
  612. struct ab3550_platform_data *plf_data;
  613. bool val;
  614. ab = irq_get_chip_data(irq);
  615. plf_data = ab->i2c_client[0]->dev.platform_data;
  616. irq -= plf_data->irq.base;
  617. val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0);
  618. return val;
  619. }
  620. static struct abx500_ops ab3550_ops = {
  621. .get_chip_id = ab3550_get_chip_id,
  622. .get_register = ab3550_get_register_interruptible,
  623. .set_register = ab3550_set_register_interruptible,
  624. .get_register_page = ab3550_get_register_page_interruptible,
  625. .set_register_page = NULL,
  626. .mask_and_set_register = ab3550_mask_and_set_register_interruptible,
  627. .event_registers_startup_state_get =
  628. ab3550_event_registers_startup_state_get,
  629. .startup_irq_enabled = ab3550_startup_irq_enabled,
  630. };
  631. static irqreturn_t ab3550_irq_handler(int irq, void *data)
  632. {
  633. struct ab3550 *ab = data;
  634. int err;
  635. unsigned int i;
  636. u8 e[AB3550_NUM_EVENT_REG];
  637. u8 *events;
  638. unsigned long flags;
  639. events = (ab->startup_events_read ? e : ab->startup_events);
  640. err = get_register_page_interruptible(ab, AB3550_EVENT_BANK,
  641. AB3550_EVENT_REG, events, AB3550_NUM_EVENT_REG);
  642. if (err)
  643. goto err_event_rd;
  644. if (!ab->startup_events_read) {
  645. dev_info(&ab->i2c_client[0]->dev,
  646. "startup events 0x%x,0x%x,0x%x,0x%x,0x%x\n",
  647. ab->startup_events[0], ab->startup_events[1],
  648. ab->startup_events[2], ab->startup_events[3],
  649. ab->startup_events[4]);
  650. ab->startup_events_read = true;
  651. goto out;
  652. }
  653. /* The two highest bits in event[4] are not used. */
  654. events[4] &= 0x3f;
  655. spin_lock_irqsave(&ab->event_lock, flags);
  656. for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
  657. events[i] &= ~ab->event_mask[i];
  658. spin_unlock_irqrestore(&ab->event_lock, flags);
  659. for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
  660. u8 bit;
  661. u8 event_reg;
  662. dev_dbg(&ab->i2c_client[0]->dev, "IRQ Event[%d]: 0x%2x\n",
  663. i, events[i]);
  664. event_reg = events[i];
  665. for (bit = 0; event_reg; bit++, event_reg /= 2) {
  666. if (event_reg % 2) {
  667. unsigned int irq;
  668. struct ab3550_platform_data *plf_data;
  669. plf_data = ab->i2c_client[0]->dev.platform_data;
  670. irq = plf_data->irq.base + (i * 8) + bit;
  671. handle_nested_irq(irq);
  672. }
  673. }
  674. }
  675. out:
  676. return IRQ_HANDLED;
  677. err_event_rd:
  678. dev_dbg(&ab->i2c_client[0]->dev, "error reading event registers\n");
  679. return IRQ_HANDLED;
  680. }
  681. #ifdef CONFIG_DEBUG_FS
  682. static struct ab3550_reg_ranges debug_ranges[AB3550_NUM_BANKS] = {
  683. {
  684. .count = 6,
  685. .range = (struct ab3550_reg_range[]) {
  686. {
  687. .first = 0x00,
  688. .last = 0x0e,
  689. },
  690. {
  691. .first = 0x10,
  692. .last = 0x1a,
  693. },
  694. {
  695. .first = 0x1e,
  696. .last = 0x4f,
  697. },
  698. {
  699. .first = 0x51,
  700. .last = 0x63,
  701. },
  702. {
  703. .first = 0x65,
  704. .last = 0xa3,
  705. },
  706. {
  707. .first = 0xa5,
  708. .last = 0xa8,
  709. },
  710. }
  711. },
  712. {
  713. .count = 8,
  714. .range = (struct ab3550_reg_range[]) {
  715. {
  716. .first = 0x00,
  717. .last = 0x0e,
  718. },
  719. {
  720. .first = 0x10,
  721. .last = 0x17,
  722. },
  723. {
  724. .first = 0x1a,
  725. .last = 0x1c,
  726. },
  727. {
  728. .first = 0x20,
  729. .last = 0x56,
  730. },
  731. {
  732. .first = 0x5a,
  733. .last = 0x88,
  734. },
  735. {
  736. .first = 0x8a,
  737. .last = 0xad,
  738. },
  739. {
  740. .first = 0xb0,
  741. .last = 0xba,
  742. },
  743. {
  744. .first = 0xbc,
  745. .last = 0xc3,
  746. },
  747. }
  748. },
  749. };
  750. static int ab3550_registers_print(struct seq_file *s, void *p)
  751. {
  752. struct ab3550 *ab = s->private;
  753. int bank;
  754. seq_printf(s, AB3550_NAME_STRING " register values:\n");
  755. for (bank = 0; bank < AB3550_NUM_BANKS; bank++) {
  756. unsigned int i;
  757. seq_printf(s, " bank %d:\n", bank);
  758. for (i = 0; i < debug_ranges[bank].count; i++) {
  759. u8 reg;
  760. for (reg = debug_ranges[bank].range[i].first;
  761. reg <= debug_ranges[bank].range[i].last;
  762. reg++) {
  763. u8 value;
  764. get_register_interruptible(ab, bank, reg,
  765. &value);
  766. seq_printf(s, " [%d/0x%02X]: 0x%02X\n", bank,
  767. reg, value);
  768. }
  769. }
  770. }
  771. return 0;
  772. }
  773. static int ab3550_registers_open(struct inode *inode, struct file *file)
  774. {
  775. return single_open(file, ab3550_registers_print, inode->i_private);
  776. }
  777. static const struct file_operations ab3550_registers_fops = {
  778. .open = ab3550_registers_open,
  779. .read = seq_read,
  780. .llseek = seq_lseek,
  781. .release = single_release,
  782. .owner = THIS_MODULE,
  783. };
  784. static int ab3550_bank_print(struct seq_file *s, void *p)
  785. {
  786. struct ab3550 *ab = s->private;
  787. seq_printf(s, "%d\n", ab->debug_bank);
  788. return 0;
  789. }
  790. static int ab3550_bank_open(struct inode *inode, struct file *file)
  791. {
  792. return single_open(file, ab3550_bank_print, inode->i_private);
  793. }
  794. static ssize_t ab3550_bank_write(struct file *file,
  795. const char __user *user_buf,
  796. size_t count, loff_t *ppos)
  797. {
  798. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  799. char buf[32];
  800. int buf_size;
  801. unsigned long user_bank;
  802. int err;
  803. /* Get userspace string and assure termination */
  804. buf_size = min(count, (sizeof(buf) - 1));
  805. if (copy_from_user(buf, user_buf, buf_size))
  806. return -EFAULT;
  807. buf[buf_size] = 0;
  808. err = strict_strtoul(buf, 0, &user_bank);
  809. if (err)
  810. return -EINVAL;
  811. if (user_bank >= AB3550_NUM_BANKS) {
  812. dev_err(&ab->i2c_client[0]->dev,
  813. "debugfs error input > number of banks\n");
  814. return -EINVAL;
  815. }
  816. ab->debug_bank = user_bank;
  817. return buf_size;
  818. }
  819. static int ab3550_address_print(struct seq_file *s, void *p)
  820. {
  821. struct ab3550 *ab = s->private;
  822. seq_printf(s, "0x%02X\n", ab->debug_address);
  823. return 0;
  824. }
  825. static int ab3550_address_open(struct inode *inode, struct file *file)
  826. {
  827. return single_open(file, ab3550_address_print, inode->i_private);
  828. }
  829. static ssize_t ab3550_address_write(struct file *file,
  830. const char __user *user_buf,
  831. size_t count, loff_t *ppos)
  832. {
  833. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  834. char buf[32];
  835. int buf_size;
  836. unsigned long user_address;
  837. int err;
  838. /* Get userspace string and assure termination */
  839. buf_size = min(count, (sizeof(buf) - 1));
  840. if (copy_from_user(buf, user_buf, buf_size))
  841. return -EFAULT;
  842. buf[buf_size] = 0;
  843. err = strict_strtoul(buf, 0, &user_address);
  844. if (err)
  845. return -EINVAL;
  846. if (user_address > 0xff) {
  847. dev_err(&ab->i2c_client[0]->dev,
  848. "debugfs error input > 0xff\n");
  849. return -EINVAL;
  850. }
  851. ab->debug_address = user_address;
  852. return buf_size;
  853. }
  854. static int ab3550_val_print(struct seq_file *s, void *p)
  855. {
  856. struct ab3550 *ab = s->private;
  857. int err;
  858. u8 regvalue;
  859. err = get_register_interruptible(ab, (u8)ab->debug_bank,
  860. (u8)ab->debug_address, &regvalue);
  861. if (err)
  862. return -EINVAL;
  863. seq_printf(s, "0x%02X\n", regvalue);
  864. return 0;
  865. }
  866. static int ab3550_val_open(struct inode *inode, struct file *file)
  867. {
  868. return single_open(file, ab3550_val_print, inode->i_private);
  869. }
  870. static ssize_t ab3550_val_write(struct file *file,
  871. const char __user *user_buf,
  872. size_t count, loff_t *ppos)
  873. {
  874. struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private;
  875. char buf[32];
  876. int buf_size;
  877. unsigned long user_val;
  878. int err;
  879. u8 regvalue;
  880. /* Get userspace string and assure termination */
  881. buf_size = min(count, (sizeof(buf)-1));
  882. if (copy_from_user(buf, user_buf, buf_size))
  883. return -EFAULT;
  884. buf[buf_size] = 0;
  885. err = strict_strtoul(buf, 0, &user_val);
  886. if (err)
  887. return -EINVAL;
  888. if (user_val > 0xff) {
  889. dev_err(&ab->i2c_client[0]->dev,
  890. "debugfs error input > 0xff\n");
  891. return -EINVAL;
  892. }
  893. err = mask_and_set_register_interruptible(
  894. ab, (u8)ab->debug_bank,
  895. (u8)ab->debug_address, 0xFF, (u8)user_val);
  896. if (err)
  897. return -EINVAL;
  898. get_register_interruptible(ab, (u8)ab->debug_bank,
  899. (u8)ab->debug_address, &regvalue);
  900. if (err)
  901. return -EINVAL;
  902. return buf_size;
  903. }
  904. static const struct file_operations ab3550_bank_fops = {
  905. .open = ab3550_bank_open,
  906. .write = ab3550_bank_write,
  907. .read = seq_read,
  908. .llseek = seq_lseek,
  909. .release = single_release,
  910. .owner = THIS_MODULE,
  911. };
  912. static const struct file_operations ab3550_address_fops = {
  913. .open = ab3550_address_open,
  914. .write = ab3550_address_write,
  915. .read = seq_read,
  916. .llseek = seq_lseek,
  917. .release = single_release,
  918. .owner = THIS_MODULE,
  919. };
  920. static const struct file_operations ab3550_val_fops = {
  921. .open = ab3550_val_open,
  922. .write = ab3550_val_write,
  923. .read = seq_read,
  924. .llseek = seq_lseek,
  925. .release = single_release,
  926. .owner = THIS_MODULE,
  927. };
  928. static struct dentry *ab3550_dir;
  929. static struct dentry *ab3550_reg_file;
  930. static struct dentry *ab3550_bank_file;
  931. static struct dentry *ab3550_address_file;
  932. static struct dentry *ab3550_val_file;
  933. static inline void ab3550_setup_debugfs(struct ab3550 *ab)
  934. {
  935. ab->debug_bank = 0;
  936. ab->debug_address = 0x00;
  937. ab3550_dir = debugfs_create_dir(AB3550_NAME_STRING, NULL);
  938. if (!ab3550_dir)
  939. goto exit_no_debugfs;
  940. ab3550_reg_file = debugfs_create_file("all-registers",
  941. S_IRUGO, ab3550_dir, ab, &ab3550_registers_fops);
  942. if (!ab3550_reg_file)
  943. goto exit_destroy_dir;
  944. ab3550_bank_file = debugfs_create_file("register-bank",
  945. (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_bank_fops);
  946. if (!ab3550_bank_file)
  947. goto exit_destroy_reg;
  948. ab3550_address_file = debugfs_create_file("register-address",
  949. (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_address_fops);
  950. if (!ab3550_address_file)
  951. goto exit_destroy_bank;
  952. ab3550_val_file = debugfs_create_file("register-value",
  953. (S_IRUGO | S_IWUSR), ab3550_dir, ab, &ab3550_val_fops);
  954. if (!ab3550_val_file)
  955. goto exit_destroy_address;
  956. return;
  957. exit_destroy_address:
  958. debugfs_remove(ab3550_address_file);
  959. exit_destroy_bank:
  960. debugfs_remove(ab3550_bank_file);
  961. exit_destroy_reg:
  962. debugfs_remove(ab3550_reg_file);
  963. exit_destroy_dir:
  964. debugfs_remove(ab3550_dir);
  965. exit_no_debugfs:
  966. dev_err(&ab->i2c_client[0]->dev, "failed to create debugfs entries.\n");
  967. return;
  968. }
  969. static inline void ab3550_remove_debugfs(void)
  970. {
  971. debugfs_remove(ab3550_val_file);
  972. debugfs_remove(ab3550_address_file);
  973. debugfs_remove(ab3550_bank_file);
  974. debugfs_remove(ab3550_reg_file);
  975. debugfs_remove(ab3550_dir);
  976. }
  977. #else /* !CONFIG_DEBUG_FS */
  978. static inline void ab3550_setup_debugfs(struct ab3550 *ab)
  979. {
  980. }
  981. static inline void ab3550_remove_debugfs(void)
  982. {
  983. }
  984. #endif
  985. /*
  986. * Basic set-up, datastructure creation/destruction and I2C interface.
  987. * This sets up a default config in the AB3550 chip so that it
  988. * will work as expected.
  989. */
  990. static int __init ab3550_setup(struct ab3550 *ab)
  991. {
  992. int err = 0;
  993. int i;
  994. struct ab3550_platform_data *plf_data;
  995. struct abx500_init_settings *settings;
  996. plf_data = ab->i2c_client[0]->dev.platform_data;
  997. settings = plf_data->init_settings;
  998. for (i = 0; i < plf_data->init_settings_sz; i++) {
  999. err = mask_and_set_register_interruptible(ab,
  1000. settings[i].bank,
  1001. settings[i].reg,
  1002. 0xFF, settings[i].setting);
  1003. if (err)
  1004. goto exit_no_setup;
  1005. /* If event mask register update the event mask in ab3550 */
  1006. if ((settings[i].bank == 0) &&
  1007. (AB3550_IMR1 <= settings[i].reg) &&
  1008. (settings[i].reg <= AB3550_IMR5)) {
  1009. ab->event_mask[settings[i].reg - AB3550_IMR1] =
  1010. settings[i].setting;
  1011. }
  1012. }
  1013. exit_no_setup:
  1014. return err;
  1015. }
  1016. static void ab3550_mask_work(struct work_struct *work)
  1017. {
  1018. struct ab3550 *ab = container_of(work, struct ab3550, mask_work);
  1019. int i;
  1020. unsigned long flags;
  1021. u8 mask[AB3550_NUM_EVENT_REG];
  1022. spin_lock_irqsave(&ab->event_lock, flags);
  1023. for (i = 0; i < AB3550_NUM_EVENT_REG; i++)
  1024. mask[i] = ab->event_mask[i];
  1025. spin_unlock_irqrestore(&ab->event_lock, flags);
  1026. for (i = 0; i < AB3550_NUM_EVENT_REG; i++) {
  1027. int err;
  1028. err = mask_and_set_register_interruptible(ab, 0,
  1029. (AB3550_IMR1 + i), ~0, mask[i]);
  1030. if (err)
  1031. dev_err(&ab->i2c_client[0]->dev,
  1032. "ab3550_mask_work failed 0x%x,0x%x\n",
  1033. (AB3550_IMR1 + i), mask[i]);
  1034. }
  1035. }
  1036. static void ab3550_mask(struct irq_data *data)
  1037. {
  1038. unsigned long flags;
  1039. struct ab3550 *ab;
  1040. struct ab3550_platform_data *plf_data;
  1041. int irq;
  1042. ab = irq_data_get_irq_chip_data(data);
  1043. plf_data = ab->i2c_client[0]->dev.platform_data;
  1044. irq = data->irq - plf_data->irq.base;
  1045. spin_lock_irqsave(&ab->event_lock, flags);
  1046. ab->event_mask[irq / 8] |= BIT(irq % 8);
  1047. spin_unlock_irqrestore(&ab->event_lock, flags);
  1048. schedule_work(&ab->mask_work);
  1049. }
  1050. static void ab3550_unmask(struct irq_data *data)
  1051. {
  1052. unsigned long flags;
  1053. struct ab3550 *ab;
  1054. struct ab3550_platform_data *plf_data;
  1055. int irq;
  1056. ab = irq_data_get_irq_chip_data(data);
  1057. plf_data = ab->i2c_client[0]->dev.platform_data;
  1058. irq = data->irq - plf_data->irq.base;
  1059. spin_lock_irqsave(&ab->event_lock, flags);
  1060. ab->event_mask[irq / 8] &= ~BIT(irq % 8);
  1061. spin_unlock_irqrestore(&ab->event_lock, flags);
  1062. schedule_work(&ab->mask_work);
  1063. }
  1064. static void noop(struct irq_data *data)
  1065. {
  1066. }
  1067. static struct irq_chip ab3550_irq_chip = {
  1068. .name = "ab3550-core", /* Keep the same name as the request */
  1069. .irq_disable = ab3550_mask, /* No default to mask in chip.c */
  1070. .irq_ack = noop,
  1071. .irq_mask = ab3550_mask,
  1072. .irq_unmask = ab3550_unmask,
  1073. };
  1074. struct ab_family_id {
  1075. u8 id;
  1076. char *name;
  1077. };
  1078. static const struct ab_family_id ids[] __initdata = {
  1079. /* AB3550 */
  1080. {
  1081. .id = AB3550_P1A,
  1082. .name = "P1A"
  1083. },
  1084. /* Terminator */
  1085. {
  1086. .id = 0x00,
  1087. }
  1088. };
  1089. static int __init ab3550_probe(struct i2c_client *client,
  1090. const struct i2c_device_id *id)
  1091. {
  1092. struct ab3550 *ab;
  1093. struct ab3550_platform_data *ab3550_plf_data =
  1094. client->dev.platform_data;
  1095. int err;
  1096. int i;
  1097. int num_i2c_clients = 0;
  1098. ab = kzalloc(sizeof(struct ab3550), GFP_KERNEL);
  1099. if (!ab) {
  1100. dev_err(&client->dev,
  1101. "could not allocate " AB3550_NAME_STRING " device\n");
  1102. return -ENOMEM;
  1103. }
  1104. /* Initialize data structure */
  1105. mutex_init(&ab->access_mutex);
  1106. spin_lock_init(&ab->event_lock);
  1107. ab->i2c_client[0] = client;
  1108. i2c_set_clientdata(client, ab);
  1109. /* Read chip ID register */
  1110. err = get_register_interruptible(ab, 0, AB3550_CID_REG, &ab->chip_id);
  1111. if (err) {
  1112. dev_err(&client->dev, "could not communicate with the analog "
  1113. "baseband chip\n");
  1114. goto exit_no_detect;
  1115. }
  1116. for (i = 0; ids[i].id != 0x0; i++) {
  1117. if (ids[i].id == ab->chip_id) {
  1118. snprintf(&ab->chip_name[0], sizeof(ab->chip_name) - 1,
  1119. AB3550_ID_FORMAT_STRING, ids[i].name);
  1120. break;
  1121. }
  1122. }
  1123. if (ids[i].id == 0x0) {
  1124. dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
  1125. ab->chip_id);
  1126. dev_err(&client->dev, "driver not started!\n");
  1127. goto exit_no_detect;
  1128. }
  1129. dev_info(&client->dev, "detected AB chip: %s\n", &ab->chip_name[0]);
  1130. /* Attach other dummy I2C clients. */
  1131. while (++num_i2c_clients < AB3550_NUM_BANKS) {
  1132. ab->i2c_client[num_i2c_clients] =
  1133. i2c_new_dummy(client->adapter,
  1134. (client->addr + num_i2c_clients));
  1135. if (!ab->i2c_client[num_i2c_clients]) {
  1136. err = -ENOMEM;
  1137. goto exit_no_dummy_client;
  1138. }
  1139. strlcpy(ab->i2c_client[num_i2c_clients]->name, id->name,
  1140. sizeof(ab->i2c_client[num_i2c_clients]->name));
  1141. }
  1142. err = ab3550_setup(ab);
  1143. if (err)
  1144. goto exit_no_setup;
  1145. INIT_WORK(&ab->mask_work, ab3550_mask_work);
  1146. for (i = 0; i < ab3550_plf_data->irq.count; i++) {
  1147. unsigned int irq;
  1148. irq = ab3550_plf_data->irq.base + i;
  1149. irq_set_chip_data(irq, ab);
  1150. irq_set_chip_and_handler(irq, &ab3550_irq_chip,
  1151. handle_simple_irq);
  1152. irq_set_nested_thread(irq, 1);
  1153. #ifdef CONFIG_ARM
  1154. set_irq_flags(irq, IRQF_VALID);
  1155. #else
  1156. irq_set_noprobe(irq);
  1157. #endif
  1158. }
  1159. err = request_threaded_irq(client->irq, NULL, ab3550_irq_handler,
  1160. IRQF_ONESHOT, "ab3550-core", ab);
  1161. /* This real unpredictable IRQ is of course sampled for entropy */
  1162. rand_initialize_irq(client->irq);
  1163. if (err)
  1164. goto exit_no_irq;
  1165. err = abx500_register_ops(&client->dev, &ab3550_ops);
  1166. if (err)
  1167. goto exit_no_ops;
  1168. /* Set up and register the platform devices. */
  1169. for (i = 0; i < AB3550_NUM_DEVICES; i++)
  1170. ab3550_devs[i].mfd_data = ab3550_plf_data->dev_data[i];
  1171. err = mfd_add_devices(&client->dev, 0, ab3550_devs,
  1172. ARRAY_SIZE(ab3550_devs), NULL,
  1173. ab3550_plf_data->irq.base);
  1174. ab3550_setup_debugfs(ab);
  1175. return 0;
  1176. exit_no_ops:
  1177. exit_no_irq:
  1178. exit_no_setup:
  1179. exit_no_dummy_client:
  1180. /* Unregister the dummy i2c clients. */
  1181. while (--num_i2c_clients)
  1182. i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
  1183. exit_no_detect:
  1184. kfree(ab);
  1185. return err;
  1186. }
  1187. static int __exit ab3550_remove(struct i2c_client *client)
  1188. {
  1189. struct ab3550 *ab = i2c_get_clientdata(client);
  1190. int num_i2c_clients = AB3550_NUM_BANKS;
  1191. mfd_remove_devices(&client->dev);
  1192. ab3550_remove_debugfs();
  1193. while (--num_i2c_clients)
  1194. i2c_unregister_device(ab->i2c_client[num_i2c_clients]);
  1195. /*
  1196. * At this point, all subscribers should have unregistered
  1197. * their notifiers so deactivate IRQ
  1198. */
  1199. free_irq(client->irq, ab);
  1200. kfree(ab);
  1201. return 0;
  1202. }
  1203. static const struct i2c_device_id ab3550_id[] = {
  1204. {AB3550_NAME_STRING, 0},
  1205. {}
  1206. };
  1207. MODULE_DEVICE_TABLE(i2c, ab3550_id);
  1208. static struct i2c_driver ab3550_driver = {
  1209. .driver = {
  1210. .name = AB3550_NAME_STRING,
  1211. .owner = THIS_MODULE,
  1212. },
  1213. .id_table = ab3550_id,
  1214. .probe = ab3550_probe,
  1215. .remove = __exit_p(ab3550_remove),
  1216. };
  1217. static int __init ab3550_i2c_init(void)
  1218. {
  1219. return i2c_add_driver(&ab3550_driver);
  1220. }
  1221. static void __exit ab3550_i2c_exit(void)
  1222. {
  1223. i2c_del_driver(&ab3550_driver);
  1224. }
  1225. subsys_initcall(ab3550_i2c_init);
  1226. module_exit(ab3550_i2c_exit);
  1227. MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>");
  1228. MODULE_DESCRIPTION("AB3550 core driver");
  1229. MODULE_LICENSE("GPL");