ov6650.c 29 KB

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  1. /*
  2. * V4L2 SoC Camera driver for OmniVision OV6650 Camera Sensor
  3. *
  4. * Copyright (C) 2010 Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
  5. *
  6. * Based on OmniVision OV96xx Camera Driver
  7. * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
  8. *
  9. * Based on ov772x camera driver:
  10. * Copyright (C) 2008 Renesas Solutions Corp.
  11. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  12. *
  13. * Based on ov7670 and soc_camera_platform driver,
  14. * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
  15. * Copyright (C) 2008 Magnus Damm
  16. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  17. *
  18. * Hardware specific bits initialy based on former work by Matt Callow
  19. * drivers/media/video/omap/sensor_ov6650.c
  20. * Copyright (C) 2006 Matt Callow
  21. *
  22. * This program is free software; you can redistribute it and/or modify
  23. * it under the terms of the GNU General Public License version 2 as
  24. * published by the Free Software Foundation.
  25. */
  26. #include <linux/bitops.h>
  27. #include <linux/delay.h>
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <media/soc_camera.h>
  31. #include <media/v4l2-chip-ident.h>
  32. /* Register definitions */
  33. #define REG_GAIN 0x00 /* range 00 - 3F */
  34. #define REG_BLUE 0x01
  35. #define REG_RED 0x02
  36. #define REG_SAT 0x03 /* [7:4] saturation [0:3] reserved */
  37. #define REG_HUE 0x04 /* [7:6] rsrvd [5] hue en [4:0] hue */
  38. #define REG_BRT 0x06
  39. #define REG_PIDH 0x0a
  40. #define REG_PIDL 0x0b
  41. #define REG_AECH 0x10
  42. #define REG_CLKRC 0x11 /* Data Format and Internal Clock */
  43. /* [7:6] Input system clock (MHz)*/
  44. /* 00=8, 01=12, 10=16, 11=24 */
  45. /* [5:0]: Internal Clock Pre-Scaler */
  46. #define REG_COMA 0x12 /* [7] Reset */
  47. #define REG_COMB 0x13
  48. #define REG_COMC 0x14
  49. #define REG_COMD 0x15
  50. #define REG_COML 0x16
  51. #define REG_HSTRT 0x17
  52. #define REG_HSTOP 0x18
  53. #define REG_VSTRT 0x19
  54. #define REG_VSTOP 0x1a
  55. #define REG_PSHFT 0x1b
  56. #define REG_MIDH 0x1c
  57. #define REG_MIDL 0x1d
  58. #define REG_HSYNS 0x1e
  59. #define REG_HSYNE 0x1f
  60. #define REG_COME 0x20
  61. #define REG_YOFF 0x21
  62. #define REG_UOFF 0x22
  63. #define REG_VOFF 0x23
  64. #define REG_AEW 0x24
  65. #define REG_AEB 0x25
  66. #define REG_COMF 0x26
  67. #define REG_COMG 0x27
  68. #define REG_COMH 0x28
  69. #define REG_COMI 0x29
  70. #define REG_FRARL 0x2b
  71. #define REG_COMJ 0x2c
  72. #define REG_COMK 0x2d
  73. #define REG_AVGY 0x2e
  74. #define REG_REF0 0x2f
  75. #define REG_REF1 0x30
  76. #define REG_REF2 0x31
  77. #define REG_FRAJH 0x32
  78. #define REG_FRAJL 0x33
  79. #define REG_FACT 0x34
  80. #define REG_L1AEC 0x35
  81. #define REG_AVGU 0x36
  82. #define REG_AVGV 0x37
  83. #define REG_SPCB 0x60
  84. #define REG_SPCC 0x61
  85. #define REG_GAM1 0x62
  86. #define REG_GAM2 0x63
  87. #define REG_GAM3 0x64
  88. #define REG_SPCD 0x65
  89. #define REG_SPCE 0x68
  90. #define REG_ADCL 0x69
  91. #define REG_RMCO 0x6c
  92. #define REG_GMCO 0x6d
  93. #define REG_BMCO 0x6e
  94. /* Register bits, values, etc. */
  95. #define OV6650_PIDH 0x66 /* high byte of product ID number */
  96. #define OV6650_PIDL 0x50 /* low byte of product ID number */
  97. #define OV6650_MIDH 0x7F /* high byte of mfg ID */
  98. #define OV6650_MIDL 0xA2 /* low byte of mfg ID */
  99. #define DEF_GAIN 0x00
  100. #define DEF_BLUE 0x80
  101. #define DEF_RED 0x80
  102. #define SAT_SHIFT 4
  103. #define SAT_MASK (0xf << SAT_SHIFT)
  104. #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK)
  105. #define HUE_EN BIT(5)
  106. #define HUE_MASK 0x1f
  107. #define DEF_HUE 0x10
  108. #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK))
  109. #define DEF_AECH 0x4D
  110. #define CLKRC_6MHz 0x00
  111. #define CLKRC_12MHz 0x40
  112. #define CLKRC_16MHz 0x80
  113. #define CLKRC_24MHz 0xc0
  114. #define CLKRC_DIV_MASK 0x3f
  115. #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
  116. #define COMA_RESET BIT(7)
  117. #define COMA_QCIF BIT(5)
  118. #define COMA_RAW_RGB BIT(4)
  119. #define COMA_RGB BIT(3)
  120. #define COMA_BW BIT(2)
  121. #define COMA_WORD_SWAP BIT(1)
  122. #define COMA_BYTE_SWAP BIT(0)
  123. #define DEF_COMA 0x00
  124. #define COMB_FLIP_V BIT(7)
  125. #define COMB_FLIP_H BIT(5)
  126. #define COMB_BAND_FILTER BIT(4)
  127. #define COMB_AWB BIT(2)
  128. #define COMB_AGC BIT(1)
  129. #define COMB_AEC BIT(0)
  130. #define DEF_COMB 0x5f
  131. #define COML_ONE_CHANNEL BIT(7)
  132. #define DEF_HSTRT 0x24
  133. #define DEF_HSTOP 0xd4
  134. #define DEF_VSTRT 0x04
  135. #define DEF_VSTOP 0x94
  136. #define COMF_HREF_LOW BIT(4)
  137. #define COMJ_PCLK_RISING BIT(4)
  138. #define COMJ_VSYNC_HIGH BIT(0)
  139. /* supported resolutions */
  140. #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
  141. #define W_CIF (W_QCIF << 1)
  142. #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
  143. #define H_CIF (H_QCIF << 1)
  144. #define FRAME_RATE_MAX 30
  145. struct ov6650_reg {
  146. u8 reg;
  147. u8 val;
  148. };
  149. struct ov6650 {
  150. struct v4l2_subdev subdev;
  151. int gain;
  152. int blue;
  153. int red;
  154. int saturation;
  155. int hue;
  156. int brightness;
  157. int exposure;
  158. int gamma;
  159. int aec;
  160. bool vflip;
  161. bool hflip;
  162. bool awb;
  163. bool agc;
  164. bool half_scale; /* scale down output by 2 */
  165. struct v4l2_rect rect; /* sensor cropping window */
  166. unsigned long pclk_limit; /* from host */
  167. unsigned long pclk_max; /* from resolution and format */
  168. struct v4l2_fract tpf; /* as requested with s_parm */
  169. enum v4l2_mbus_pixelcode code;
  170. enum v4l2_colorspace colorspace;
  171. };
  172. static enum v4l2_mbus_pixelcode ov6650_codes[] = {
  173. V4L2_MBUS_FMT_YUYV8_2X8,
  174. V4L2_MBUS_FMT_UYVY8_2X8,
  175. V4L2_MBUS_FMT_YVYU8_2X8,
  176. V4L2_MBUS_FMT_VYUY8_2X8,
  177. V4L2_MBUS_FMT_SBGGR8_1X8,
  178. V4L2_MBUS_FMT_Y8_1X8,
  179. };
  180. static const struct v4l2_queryctrl ov6650_controls[] = {
  181. {
  182. .id = V4L2_CID_AUTOGAIN,
  183. .type = V4L2_CTRL_TYPE_BOOLEAN,
  184. .name = "AGC",
  185. .minimum = 0,
  186. .maximum = 1,
  187. .step = 1,
  188. .default_value = 1,
  189. },
  190. {
  191. .id = V4L2_CID_GAIN,
  192. .type = V4L2_CTRL_TYPE_INTEGER,
  193. .name = "Gain",
  194. .minimum = 0,
  195. .maximum = 0x3f,
  196. .step = 1,
  197. .default_value = DEF_GAIN,
  198. },
  199. {
  200. .id = V4L2_CID_AUTO_WHITE_BALANCE,
  201. .type = V4L2_CTRL_TYPE_BOOLEAN,
  202. .name = "AWB",
  203. .minimum = 0,
  204. .maximum = 1,
  205. .step = 1,
  206. .default_value = 1,
  207. },
  208. {
  209. .id = V4L2_CID_BLUE_BALANCE,
  210. .type = V4L2_CTRL_TYPE_INTEGER,
  211. .name = "Blue",
  212. .minimum = 0,
  213. .maximum = 0xff,
  214. .step = 1,
  215. .default_value = DEF_BLUE,
  216. },
  217. {
  218. .id = V4L2_CID_RED_BALANCE,
  219. .type = V4L2_CTRL_TYPE_INTEGER,
  220. .name = "Red",
  221. .minimum = 0,
  222. .maximum = 0xff,
  223. .step = 1,
  224. .default_value = DEF_RED,
  225. },
  226. {
  227. .id = V4L2_CID_SATURATION,
  228. .type = V4L2_CTRL_TYPE_INTEGER,
  229. .name = "Saturation",
  230. .minimum = 0,
  231. .maximum = 0xf,
  232. .step = 1,
  233. .default_value = 0x8,
  234. },
  235. {
  236. .id = V4L2_CID_HUE,
  237. .type = V4L2_CTRL_TYPE_INTEGER,
  238. .name = "Hue",
  239. .minimum = 0,
  240. .maximum = HUE_MASK,
  241. .step = 1,
  242. .default_value = DEF_HUE,
  243. },
  244. {
  245. .id = V4L2_CID_BRIGHTNESS,
  246. .type = V4L2_CTRL_TYPE_INTEGER,
  247. .name = "Brightness",
  248. .minimum = 0,
  249. .maximum = 0xff,
  250. .step = 1,
  251. .default_value = 0x80,
  252. },
  253. {
  254. .id = V4L2_CID_EXPOSURE_AUTO,
  255. .type = V4L2_CTRL_TYPE_INTEGER,
  256. .name = "AEC",
  257. .minimum = 0,
  258. .maximum = 3,
  259. .step = 1,
  260. .default_value = 0,
  261. },
  262. {
  263. .id = V4L2_CID_EXPOSURE,
  264. .type = V4L2_CTRL_TYPE_INTEGER,
  265. .name = "Exposure",
  266. .minimum = 0,
  267. .maximum = 0xff,
  268. .step = 1,
  269. .default_value = DEF_AECH,
  270. },
  271. {
  272. .id = V4L2_CID_GAMMA,
  273. .type = V4L2_CTRL_TYPE_INTEGER,
  274. .name = "Gamma",
  275. .minimum = 0,
  276. .maximum = 0xff,
  277. .step = 1,
  278. .default_value = 0x12,
  279. },
  280. {
  281. .id = V4L2_CID_VFLIP,
  282. .type = V4L2_CTRL_TYPE_BOOLEAN,
  283. .name = "Flip Vertically",
  284. .minimum = 0,
  285. .maximum = 1,
  286. .step = 1,
  287. .default_value = 0,
  288. },
  289. {
  290. .id = V4L2_CID_HFLIP,
  291. .type = V4L2_CTRL_TYPE_BOOLEAN,
  292. .name = "Flip Horizontally",
  293. .minimum = 0,
  294. .maximum = 1,
  295. .step = 1,
  296. .default_value = 0,
  297. },
  298. };
  299. /* read a register */
  300. static int ov6650_reg_read(struct i2c_client *client, u8 reg, u8 *val)
  301. {
  302. int ret;
  303. u8 data = reg;
  304. struct i2c_msg msg = {
  305. .addr = client->addr,
  306. .flags = 0,
  307. .len = 1,
  308. .buf = &data,
  309. };
  310. ret = i2c_transfer(client->adapter, &msg, 1);
  311. if (ret < 0)
  312. goto err;
  313. msg.flags = I2C_M_RD;
  314. ret = i2c_transfer(client->adapter, &msg, 1);
  315. if (ret < 0)
  316. goto err;
  317. *val = data;
  318. return 0;
  319. err:
  320. dev_err(&client->dev, "Failed reading register 0x%02x!\n", reg);
  321. return ret;
  322. }
  323. /* write a register */
  324. static int ov6650_reg_write(struct i2c_client *client, u8 reg, u8 val)
  325. {
  326. int ret;
  327. unsigned char data[2] = { reg, val };
  328. struct i2c_msg msg = {
  329. .addr = client->addr,
  330. .flags = 0,
  331. .len = 2,
  332. .buf = data,
  333. };
  334. ret = i2c_transfer(client->adapter, &msg, 1);
  335. udelay(100);
  336. if (ret < 0) {
  337. dev_err(&client->dev, "Failed writing register 0x%02x!\n", reg);
  338. return ret;
  339. }
  340. return 0;
  341. }
  342. /* Read a register, alter its bits, write it back */
  343. static int ov6650_reg_rmw(struct i2c_client *client, u8 reg, u8 set, u8 mask)
  344. {
  345. u8 val;
  346. int ret;
  347. ret = ov6650_reg_read(client, reg, &val);
  348. if (ret) {
  349. dev_err(&client->dev,
  350. "[Read]-Modify-Write of register 0x%02x failed!\n",
  351. reg);
  352. return ret;
  353. }
  354. val &= ~mask;
  355. val |= set;
  356. ret = ov6650_reg_write(client, reg, val);
  357. if (ret)
  358. dev_err(&client->dev,
  359. "Read-Modify-[Write] of register 0x%02x failed!\n",
  360. reg);
  361. return ret;
  362. }
  363. static struct ov6650 *to_ov6650(const struct i2c_client *client)
  364. {
  365. return container_of(i2c_get_clientdata(client), struct ov6650, subdev);
  366. }
  367. /* Start/Stop streaming from the device */
  368. static int ov6650_s_stream(struct v4l2_subdev *sd, int enable)
  369. {
  370. return 0;
  371. }
  372. /* Alter bus settings on camera side */
  373. static int ov6650_set_bus_param(struct soc_camera_device *icd,
  374. unsigned long flags)
  375. {
  376. struct soc_camera_link *icl = to_soc_camera_link(icd);
  377. struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
  378. int ret;
  379. flags = soc_camera_apply_sensor_flags(icl, flags);
  380. if (flags & SOCAM_PCLK_SAMPLE_RISING)
  381. ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_PCLK_RISING, 0);
  382. else
  383. ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_PCLK_RISING);
  384. if (ret)
  385. return ret;
  386. if (flags & SOCAM_HSYNC_ACTIVE_LOW)
  387. ret = ov6650_reg_rmw(client, REG_COMF, COMF_HREF_LOW, 0);
  388. else
  389. ret = ov6650_reg_rmw(client, REG_COMF, 0, COMF_HREF_LOW);
  390. if (ret)
  391. return ret;
  392. if (flags & SOCAM_VSYNC_ACTIVE_HIGH)
  393. ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_VSYNC_HIGH, 0);
  394. else
  395. ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_VSYNC_HIGH);
  396. return ret;
  397. }
  398. /* Request bus settings on camera side */
  399. static unsigned long ov6650_query_bus_param(struct soc_camera_device *icd)
  400. {
  401. struct soc_camera_link *icl = to_soc_camera_link(icd);
  402. unsigned long flags = SOCAM_MASTER |
  403. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING |
  404. SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_LOW |
  405. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW |
  406. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
  407. return soc_camera_apply_sensor_flags(icl, flags);
  408. }
  409. /* Get status of additional camera capabilities */
  410. static int ov6650_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  411. {
  412. struct i2c_client *client = v4l2_get_subdevdata(sd);
  413. struct ov6650 *priv = to_ov6650(client);
  414. uint8_t reg;
  415. int ret = 0;
  416. switch (ctrl->id) {
  417. case V4L2_CID_AUTOGAIN:
  418. ctrl->value = priv->agc;
  419. break;
  420. case V4L2_CID_GAIN:
  421. if (priv->agc) {
  422. ret = ov6650_reg_read(client, REG_GAIN, &reg);
  423. ctrl->value = reg;
  424. } else {
  425. ctrl->value = priv->gain;
  426. }
  427. break;
  428. case V4L2_CID_AUTO_WHITE_BALANCE:
  429. ctrl->value = priv->awb;
  430. break;
  431. case V4L2_CID_BLUE_BALANCE:
  432. if (priv->awb) {
  433. ret = ov6650_reg_read(client, REG_BLUE, &reg);
  434. ctrl->value = reg;
  435. } else {
  436. ctrl->value = priv->blue;
  437. }
  438. break;
  439. case V4L2_CID_RED_BALANCE:
  440. if (priv->awb) {
  441. ret = ov6650_reg_read(client, REG_RED, &reg);
  442. ctrl->value = reg;
  443. } else {
  444. ctrl->value = priv->red;
  445. }
  446. break;
  447. case V4L2_CID_SATURATION:
  448. ctrl->value = priv->saturation;
  449. break;
  450. case V4L2_CID_HUE:
  451. ctrl->value = priv->hue;
  452. break;
  453. case V4L2_CID_BRIGHTNESS:
  454. ctrl->value = priv->brightness;
  455. break;
  456. case V4L2_CID_EXPOSURE_AUTO:
  457. ctrl->value = priv->aec;
  458. break;
  459. case V4L2_CID_EXPOSURE:
  460. if (priv->aec) {
  461. ret = ov6650_reg_read(client, REG_AECH, &reg);
  462. ctrl->value = reg;
  463. } else {
  464. ctrl->value = priv->exposure;
  465. }
  466. break;
  467. case V4L2_CID_GAMMA:
  468. ctrl->value = priv->gamma;
  469. break;
  470. case V4L2_CID_VFLIP:
  471. ctrl->value = priv->vflip;
  472. break;
  473. case V4L2_CID_HFLIP:
  474. ctrl->value = priv->hflip;
  475. break;
  476. }
  477. return ret;
  478. }
  479. /* Set status of additional camera capabilities */
  480. static int ov6650_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  481. {
  482. struct i2c_client *client = v4l2_get_subdevdata(sd);
  483. struct ov6650 *priv = to_ov6650(client);
  484. int ret = 0;
  485. switch (ctrl->id) {
  486. case V4L2_CID_AUTOGAIN:
  487. ret = ov6650_reg_rmw(client, REG_COMB,
  488. ctrl->value ? COMB_AGC : 0, COMB_AGC);
  489. if (!ret)
  490. priv->agc = ctrl->value;
  491. break;
  492. case V4L2_CID_GAIN:
  493. ret = ov6650_reg_write(client, REG_GAIN, ctrl->value);
  494. if (!ret)
  495. priv->gain = ctrl->value;
  496. break;
  497. case V4L2_CID_AUTO_WHITE_BALANCE:
  498. ret = ov6650_reg_rmw(client, REG_COMB,
  499. ctrl->value ? COMB_AWB : 0, COMB_AWB);
  500. if (!ret)
  501. priv->awb = ctrl->value;
  502. break;
  503. case V4L2_CID_BLUE_BALANCE:
  504. ret = ov6650_reg_write(client, REG_BLUE, ctrl->value);
  505. if (!ret)
  506. priv->blue = ctrl->value;
  507. break;
  508. case V4L2_CID_RED_BALANCE:
  509. ret = ov6650_reg_write(client, REG_RED, ctrl->value);
  510. if (!ret)
  511. priv->red = ctrl->value;
  512. break;
  513. case V4L2_CID_SATURATION:
  514. ret = ov6650_reg_rmw(client, REG_SAT, SET_SAT(ctrl->value),
  515. SAT_MASK);
  516. if (!ret)
  517. priv->saturation = ctrl->value;
  518. break;
  519. case V4L2_CID_HUE:
  520. ret = ov6650_reg_rmw(client, REG_HUE, SET_HUE(ctrl->value),
  521. HUE_MASK);
  522. if (!ret)
  523. priv->hue = ctrl->value;
  524. break;
  525. case V4L2_CID_BRIGHTNESS:
  526. ret = ov6650_reg_write(client, REG_BRT, ctrl->value);
  527. if (!ret)
  528. priv->brightness = ctrl->value;
  529. break;
  530. case V4L2_CID_EXPOSURE_AUTO:
  531. switch (ctrl->value) {
  532. case V4L2_EXPOSURE_AUTO:
  533. ret = ov6650_reg_rmw(client, REG_COMB, COMB_AEC, 0);
  534. break;
  535. default:
  536. ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_AEC);
  537. break;
  538. }
  539. if (!ret)
  540. priv->aec = ctrl->value;
  541. break;
  542. case V4L2_CID_EXPOSURE:
  543. ret = ov6650_reg_write(client, REG_AECH, ctrl->value);
  544. if (!ret)
  545. priv->exposure = ctrl->value;
  546. break;
  547. case V4L2_CID_GAMMA:
  548. ret = ov6650_reg_write(client, REG_GAM1, ctrl->value);
  549. if (!ret)
  550. priv->gamma = ctrl->value;
  551. break;
  552. case V4L2_CID_VFLIP:
  553. ret = ov6650_reg_rmw(client, REG_COMB,
  554. ctrl->value ? COMB_FLIP_V : 0, COMB_FLIP_V);
  555. if (!ret)
  556. priv->vflip = ctrl->value;
  557. break;
  558. case V4L2_CID_HFLIP:
  559. ret = ov6650_reg_rmw(client, REG_COMB,
  560. ctrl->value ? COMB_FLIP_H : 0, COMB_FLIP_H);
  561. if (!ret)
  562. priv->hflip = ctrl->value;
  563. break;
  564. }
  565. return ret;
  566. }
  567. /* Get chip identification */
  568. static int ov6650_g_chip_ident(struct v4l2_subdev *sd,
  569. struct v4l2_dbg_chip_ident *id)
  570. {
  571. id->ident = V4L2_IDENT_OV6650;
  572. id->revision = 0;
  573. return 0;
  574. }
  575. #ifdef CONFIG_VIDEO_ADV_DEBUG
  576. static int ov6650_get_register(struct v4l2_subdev *sd,
  577. struct v4l2_dbg_register *reg)
  578. {
  579. struct i2c_client *client = v4l2_get_subdevdata(sd);
  580. int ret;
  581. u8 val;
  582. if (reg->reg & ~0xff)
  583. return -EINVAL;
  584. reg->size = 1;
  585. ret = ov6650_reg_read(client, reg->reg, &val);
  586. if (!ret)
  587. reg->val = (__u64)val;
  588. return ret;
  589. }
  590. static int ov6650_set_register(struct v4l2_subdev *sd,
  591. struct v4l2_dbg_register *reg)
  592. {
  593. struct i2c_client *client = v4l2_get_subdevdata(sd);
  594. if (reg->reg & ~0xff || reg->val & ~0xff)
  595. return -EINVAL;
  596. return ov6650_reg_write(client, reg->reg, reg->val);
  597. }
  598. #endif
  599. static int ov6650_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  600. {
  601. struct i2c_client *client = v4l2_get_subdevdata(sd);
  602. struct ov6650 *priv = to_ov6650(client);
  603. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  604. a->c = priv->rect;
  605. return 0;
  606. }
  607. static int ov6650_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  608. {
  609. struct i2c_client *client = v4l2_get_subdevdata(sd);
  610. struct ov6650 *priv = to_ov6650(client);
  611. struct v4l2_rect *rect = &a->c;
  612. int ret;
  613. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  614. return -EINVAL;
  615. rect->left = ALIGN(rect->left, 2);
  616. rect->width = ALIGN(rect->width, 2);
  617. rect->top = ALIGN(rect->top, 2);
  618. rect->height = ALIGN(rect->height, 2);
  619. soc_camera_limit_side(&rect->left, &rect->width,
  620. DEF_HSTRT << 1, 2, W_CIF);
  621. soc_camera_limit_side(&rect->top, &rect->height,
  622. DEF_VSTRT << 1, 2, H_CIF);
  623. ret = ov6650_reg_write(client, REG_HSTRT, rect->left >> 1);
  624. if (!ret) {
  625. priv->rect.left = rect->left;
  626. ret = ov6650_reg_write(client, REG_HSTOP,
  627. (rect->left + rect->width) >> 1);
  628. }
  629. if (!ret) {
  630. priv->rect.width = rect->width;
  631. ret = ov6650_reg_write(client, REG_VSTRT, rect->top >> 1);
  632. }
  633. if (!ret) {
  634. priv->rect.top = rect->top;
  635. ret = ov6650_reg_write(client, REG_VSTOP,
  636. (rect->top + rect->height) >> 1);
  637. }
  638. if (!ret)
  639. priv->rect.height = rect->height;
  640. return ret;
  641. }
  642. static int ov6650_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  643. {
  644. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  645. return -EINVAL;
  646. a->bounds.left = DEF_HSTRT << 1;
  647. a->bounds.top = DEF_VSTRT << 1;
  648. a->bounds.width = W_CIF;
  649. a->bounds.height = H_CIF;
  650. a->defrect = a->bounds;
  651. a->pixelaspect.numerator = 1;
  652. a->pixelaspect.denominator = 1;
  653. return 0;
  654. }
  655. static int ov6650_g_fmt(struct v4l2_subdev *sd,
  656. struct v4l2_mbus_framefmt *mf)
  657. {
  658. struct i2c_client *client = v4l2_get_subdevdata(sd);
  659. struct ov6650 *priv = to_ov6650(client);
  660. mf->width = priv->rect.width >> priv->half_scale;
  661. mf->height = priv->rect.height >> priv->half_scale;
  662. mf->code = priv->code;
  663. mf->colorspace = priv->colorspace;
  664. mf->field = V4L2_FIELD_NONE;
  665. return 0;
  666. }
  667. static bool is_unscaled_ok(int width, int height, struct v4l2_rect *rect)
  668. {
  669. return width > rect->width >> 1 || height > rect->height >> 1;
  670. }
  671. static u8 to_clkrc(struct v4l2_fract *timeperframe,
  672. unsigned long pclk_limit, unsigned long pclk_max)
  673. {
  674. unsigned long pclk;
  675. if (timeperframe->numerator && timeperframe->denominator)
  676. pclk = pclk_max * timeperframe->denominator /
  677. (FRAME_RATE_MAX * timeperframe->numerator);
  678. else
  679. pclk = pclk_max;
  680. if (pclk_limit && pclk_limit < pclk)
  681. pclk = pclk_limit;
  682. return (pclk_max - 1) / pclk;
  683. }
  684. /* set the format we will capture in */
  685. static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
  686. {
  687. struct i2c_client *client = v4l2_get_subdevdata(sd);
  688. struct soc_camera_device *icd = client->dev.platform_data;
  689. struct soc_camera_sense *sense = icd->sense;
  690. struct ov6650 *priv = to_ov6650(client);
  691. bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect);
  692. struct v4l2_crop a = {
  693. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  694. .c = {
  695. .left = priv->rect.left + (priv->rect.width >> 1) -
  696. (mf->width >> (1 - half_scale)),
  697. .top = priv->rect.top + (priv->rect.height >> 1) -
  698. (mf->height >> (1 - half_scale)),
  699. .width = mf->width << half_scale,
  700. .height = mf->height << half_scale,
  701. },
  702. };
  703. enum v4l2_mbus_pixelcode code = mf->code;
  704. unsigned long mclk, pclk;
  705. u8 coma_set = 0, coma_mask = 0, coml_set, coml_mask, clkrc;
  706. int ret;
  707. /* select color matrix configuration for given color encoding */
  708. switch (code) {
  709. case V4L2_MBUS_FMT_Y8_1X8:
  710. dev_dbg(&client->dev, "pixel format GREY8_1X8\n");
  711. coma_mask |= COMA_RGB | COMA_WORD_SWAP | COMA_BYTE_SWAP;
  712. coma_set |= COMA_BW;
  713. break;
  714. case V4L2_MBUS_FMT_YUYV8_2X8:
  715. dev_dbg(&client->dev, "pixel format YUYV8_2X8_LE\n");
  716. coma_mask |= COMA_RGB | COMA_BW | COMA_BYTE_SWAP;
  717. coma_set |= COMA_WORD_SWAP;
  718. break;
  719. case V4L2_MBUS_FMT_YVYU8_2X8:
  720. dev_dbg(&client->dev, "pixel format YVYU8_2X8_LE (untested)\n");
  721. coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP |
  722. COMA_BYTE_SWAP;
  723. break;
  724. case V4L2_MBUS_FMT_UYVY8_2X8:
  725. dev_dbg(&client->dev, "pixel format YUYV8_2X8_BE\n");
  726. if (half_scale) {
  727. coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
  728. coma_set |= COMA_BYTE_SWAP;
  729. } else {
  730. coma_mask |= COMA_RGB | COMA_BW;
  731. coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
  732. }
  733. break;
  734. case V4L2_MBUS_FMT_VYUY8_2X8:
  735. dev_dbg(&client->dev, "pixel format YVYU8_2X8_BE (untested)\n");
  736. if (half_scale) {
  737. coma_mask |= COMA_RGB | COMA_BW;
  738. coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
  739. } else {
  740. coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
  741. coma_set |= COMA_BYTE_SWAP;
  742. }
  743. break;
  744. case V4L2_MBUS_FMT_SBGGR8_1X8:
  745. dev_dbg(&client->dev, "pixel format SBGGR8_1X8 (untested)\n");
  746. coma_mask |= COMA_BW | COMA_BYTE_SWAP | COMA_WORD_SWAP;
  747. coma_set |= COMA_RAW_RGB | COMA_RGB;
  748. break;
  749. default:
  750. dev_err(&client->dev, "Pixel format not handled: 0x%x\n", code);
  751. return -EINVAL;
  752. }
  753. priv->code = code;
  754. if (code == V4L2_MBUS_FMT_Y8_1X8 ||
  755. code == V4L2_MBUS_FMT_SBGGR8_1X8) {
  756. coml_mask = COML_ONE_CHANNEL;
  757. coml_set = 0;
  758. priv->pclk_max = 4000000;
  759. } else {
  760. coml_mask = 0;
  761. coml_set = COML_ONE_CHANNEL;
  762. priv->pclk_max = 8000000;
  763. }
  764. if (code == V4L2_MBUS_FMT_SBGGR8_1X8)
  765. priv->colorspace = V4L2_COLORSPACE_SRGB;
  766. else if (code != 0)
  767. priv->colorspace = V4L2_COLORSPACE_JPEG;
  768. if (half_scale) {
  769. dev_dbg(&client->dev, "max resolution: QCIF\n");
  770. coma_set |= COMA_QCIF;
  771. priv->pclk_max /= 2;
  772. } else {
  773. dev_dbg(&client->dev, "max resolution: CIF\n");
  774. coma_mask |= COMA_QCIF;
  775. }
  776. priv->half_scale = half_scale;
  777. if (sense) {
  778. if (sense->master_clock == 8000000) {
  779. dev_dbg(&client->dev, "8MHz input clock\n");
  780. clkrc = CLKRC_6MHz;
  781. } else if (sense->master_clock == 12000000) {
  782. dev_dbg(&client->dev, "12MHz input clock\n");
  783. clkrc = CLKRC_12MHz;
  784. } else if (sense->master_clock == 16000000) {
  785. dev_dbg(&client->dev, "16MHz input clock\n");
  786. clkrc = CLKRC_16MHz;
  787. } else if (sense->master_clock == 24000000) {
  788. dev_dbg(&client->dev, "24MHz input clock\n");
  789. clkrc = CLKRC_24MHz;
  790. } else {
  791. dev_err(&client->dev,
  792. "unspported input clock, check platform data\n");
  793. return -EINVAL;
  794. }
  795. mclk = sense->master_clock;
  796. priv->pclk_limit = sense->pixel_clock_max;
  797. } else {
  798. clkrc = CLKRC_24MHz;
  799. mclk = 24000000;
  800. priv->pclk_limit = 0;
  801. dev_dbg(&client->dev, "using default 24MHz input clock\n");
  802. }
  803. clkrc |= to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
  804. pclk = priv->pclk_max / GET_CLKRC_DIV(clkrc);
  805. dev_dbg(&client->dev, "pixel clock divider: %ld.%ld\n",
  806. mclk / pclk, 10 * mclk % pclk / pclk);
  807. ret = ov6650_s_crop(sd, &a);
  808. if (!ret)
  809. ret = ov6650_reg_rmw(client, REG_COMA, coma_set, coma_mask);
  810. if (!ret)
  811. ret = ov6650_reg_write(client, REG_CLKRC, clkrc);
  812. if (!ret)
  813. ret = ov6650_reg_rmw(client, REG_COML, coml_set, coml_mask);
  814. if (!ret) {
  815. mf->colorspace = priv->colorspace;
  816. mf->width = priv->rect.width >> half_scale;
  817. mf->height = priv->rect.height >> half_scale;
  818. }
  819. return ret;
  820. }
  821. static int ov6650_try_fmt(struct v4l2_subdev *sd,
  822. struct v4l2_mbus_framefmt *mf)
  823. {
  824. struct i2c_client *client = v4l2_get_subdevdata(sd);
  825. struct ov6650 *priv = to_ov6650(client);
  826. if (is_unscaled_ok(mf->width, mf->height, &priv->rect))
  827. v4l_bound_align_image(&mf->width, 2, W_CIF, 1,
  828. &mf->height, 2, H_CIF, 1, 0);
  829. mf->field = V4L2_FIELD_NONE;
  830. switch (mf->code) {
  831. case V4L2_MBUS_FMT_Y10_1X10:
  832. mf->code = V4L2_MBUS_FMT_Y8_1X8;
  833. case V4L2_MBUS_FMT_Y8_1X8:
  834. case V4L2_MBUS_FMT_YVYU8_2X8:
  835. case V4L2_MBUS_FMT_YUYV8_2X8:
  836. case V4L2_MBUS_FMT_VYUY8_2X8:
  837. case V4L2_MBUS_FMT_UYVY8_2X8:
  838. mf->colorspace = V4L2_COLORSPACE_JPEG;
  839. break;
  840. default:
  841. mf->code = V4L2_MBUS_FMT_SBGGR8_1X8;
  842. case V4L2_MBUS_FMT_SBGGR8_1X8:
  843. mf->colorspace = V4L2_COLORSPACE_SRGB;
  844. break;
  845. }
  846. return 0;
  847. }
  848. static int ov6650_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  849. enum v4l2_mbus_pixelcode *code)
  850. {
  851. if (index >= ARRAY_SIZE(ov6650_codes))
  852. return -EINVAL;
  853. *code = ov6650_codes[index];
  854. return 0;
  855. }
  856. static int ov6650_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  857. {
  858. struct i2c_client *client = v4l2_get_subdevdata(sd);
  859. struct ov6650 *priv = to_ov6650(client);
  860. struct v4l2_captureparm *cp = &parms->parm.capture;
  861. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  862. return -EINVAL;
  863. memset(cp, 0, sizeof(*cp));
  864. cp->capability = V4L2_CAP_TIMEPERFRAME;
  865. cp->timeperframe.numerator = GET_CLKRC_DIV(to_clkrc(&priv->tpf,
  866. priv->pclk_limit, priv->pclk_max));
  867. cp->timeperframe.denominator = FRAME_RATE_MAX;
  868. dev_dbg(&client->dev, "Frame interval: %u/%u s\n",
  869. cp->timeperframe.numerator, cp->timeperframe.denominator);
  870. return 0;
  871. }
  872. static int ov6650_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  873. {
  874. struct i2c_client *client = v4l2_get_subdevdata(sd);
  875. struct ov6650 *priv = to_ov6650(client);
  876. struct v4l2_captureparm *cp = &parms->parm.capture;
  877. struct v4l2_fract *tpf = &cp->timeperframe;
  878. int div, ret;
  879. u8 clkrc;
  880. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  881. return -EINVAL;
  882. if (cp->extendedmode != 0)
  883. return -EINVAL;
  884. if (tpf->numerator == 0 || tpf->denominator == 0)
  885. div = 1; /* Reset to full rate */
  886. else
  887. div = (tpf->numerator * FRAME_RATE_MAX) / tpf->denominator;
  888. if (div == 0)
  889. div = 1;
  890. else if (div > GET_CLKRC_DIV(CLKRC_DIV_MASK))
  891. div = GET_CLKRC_DIV(CLKRC_DIV_MASK);
  892. /*
  893. * Keep result to be used as tpf limit
  894. * for subseqent clock divider calculations
  895. */
  896. priv->tpf.numerator = div;
  897. priv->tpf.denominator = FRAME_RATE_MAX;
  898. clkrc = to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
  899. ret = ov6650_reg_rmw(client, REG_CLKRC, clkrc, CLKRC_DIV_MASK);
  900. if (!ret) {
  901. tpf->numerator = GET_CLKRC_DIV(clkrc);
  902. tpf->denominator = FRAME_RATE_MAX;
  903. }
  904. return ret;
  905. }
  906. /* Soft reset the camera. This has nothing to do with the RESET pin! */
  907. static int ov6650_reset(struct i2c_client *client)
  908. {
  909. int ret;
  910. dev_dbg(&client->dev, "reset\n");
  911. ret = ov6650_reg_rmw(client, REG_COMA, COMA_RESET, 0);
  912. if (ret)
  913. dev_err(&client->dev,
  914. "An error occured while entering soft reset!\n");
  915. return ret;
  916. }
  917. /* program default register values */
  918. static int ov6650_prog_dflt(struct i2c_client *client)
  919. {
  920. int ret;
  921. dev_dbg(&client->dev, "initializing\n");
  922. ret = ov6650_reg_write(client, REG_COMA, 0); /* ~COMA_RESET */
  923. if (!ret)
  924. ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_BAND_FILTER);
  925. return ret;
  926. }
  927. static int ov6650_video_probe(struct soc_camera_device *icd,
  928. struct i2c_client *client)
  929. {
  930. u8 pidh, pidl, midh, midl;
  931. int ret = 0;
  932. /*
  933. * check and show product ID and manufacturer ID
  934. */
  935. ret = ov6650_reg_read(client, REG_PIDH, &pidh);
  936. if (!ret)
  937. ret = ov6650_reg_read(client, REG_PIDL, &pidl);
  938. if (!ret)
  939. ret = ov6650_reg_read(client, REG_MIDH, &midh);
  940. if (!ret)
  941. ret = ov6650_reg_read(client, REG_MIDL, &midl);
  942. if (ret)
  943. return ret;
  944. if ((pidh != OV6650_PIDH) || (pidl != OV6650_PIDL)) {
  945. dev_err(&client->dev, "Product ID error 0x%02x:0x%02x\n",
  946. pidh, pidl);
  947. return -ENODEV;
  948. }
  949. dev_info(&client->dev,
  950. "ov6650 Product ID 0x%02x:0x%02x Manufacturer ID 0x%02x:0x%02x\n",
  951. pidh, pidl, midh, midl);
  952. ret = ov6650_reset(client);
  953. if (!ret)
  954. ret = ov6650_prog_dflt(client);
  955. return ret;
  956. }
  957. static struct soc_camera_ops ov6650_ops = {
  958. .set_bus_param = ov6650_set_bus_param,
  959. .query_bus_param = ov6650_query_bus_param,
  960. .controls = ov6650_controls,
  961. .num_controls = ARRAY_SIZE(ov6650_controls),
  962. };
  963. static struct v4l2_subdev_core_ops ov6650_core_ops = {
  964. .g_ctrl = ov6650_g_ctrl,
  965. .s_ctrl = ov6650_s_ctrl,
  966. .g_chip_ident = ov6650_g_chip_ident,
  967. #ifdef CONFIG_VIDEO_ADV_DEBUG
  968. .g_register = ov6650_get_register,
  969. .s_register = ov6650_set_register,
  970. #endif
  971. };
  972. static struct v4l2_subdev_video_ops ov6650_video_ops = {
  973. .s_stream = ov6650_s_stream,
  974. .g_mbus_fmt = ov6650_g_fmt,
  975. .s_mbus_fmt = ov6650_s_fmt,
  976. .try_mbus_fmt = ov6650_try_fmt,
  977. .enum_mbus_fmt = ov6650_enum_fmt,
  978. .cropcap = ov6650_cropcap,
  979. .g_crop = ov6650_g_crop,
  980. .s_crop = ov6650_s_crop,
  981. .g_parm = ov6650_g_parm,
  982. .s_parm = ov6650_s_parm,
  983. };
  984. static struct v4l2_subdev_ops ov6650_subdev_ops = {
  985. .core = &ov6650_core_ops,
  986. .video = &ov6650_video_ops,
  987. };
  988. /*
  989. * i2c_driver function
  990. */
  991. static int ov6650_probe(struct i2c_client *client,
  992. const struct i2c_device_id *did)
  993. {
  994. struct ov6650 *priv;
  995. struct soc_camera_device *icd = client->dev.platform_data;
  996. struct soc_camera_link *icl;
  997. int ret;
  998. if (!icd) {
  999. dev_err(&client->dev, "Missing soc-camera data!\n");
  1000. return -EINVAL;
  1001. }
  1002. icl = to_soc_camera_link(icd);
  1003. if (!icl) {
  1004. dev_err(&client->dev, "Missing platform_data for driver\n");
  1005. return -EINVAL;
  1006. }
  1007. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1008. if (!priv) {
  1009. dev_err(&client->dev,
  1010. "Failed to allocate memory for private data!\n");
  1011. return -ENOMEM;
  1012. }
  1013. v4l2_i2c_subdev_init(&priv->subdev, client, &ov6650_subdev_ops);
  1014. icd->ops = &ov6650_ops;
  1015. priv->rect.left = DEF_HSTRT << 1;
  1016. priv->rect.top = DEF_VSTRT << 1;
  1017. priv->rect.width = W_CIF;
  1018. priv->rect.height = H_CIF;
  1019. priv->half_scale = false;
  1020. priv->code = V4L2_MBUS_FMT_YUYV8_2X8;
  1021. priv->colorspace = V4L2_COLORSPACE_JPEG;
  1022. ret = ov6650_video_probe(icd, client);
  1023. if (ret) {
  1024. icd->ops = NULL;
  1025. kfree(priv);
  1026. }
  1027. return ret;
  1028. }
  1029. static int ov6650_remove(struct i2c_client *client)
  1030. {
  1031. struct ov6650 *priv = to_ov6650(client);
  1032. kfree(priv);
  1033. return 0;
  1034. }
  1035. static const struct i2c_device_id ov6650_id[] = {
  1036. { "ov6650", 0 },
  1037. { }
  1038. };
  1039. MODULE_DEVICE_TABLE(i2c, ov6650_id);
  1040. static struct i2c_driver ov6650_i2c_driver = {
  1041. .driver = {
  1042. .name = "ov6650",
  1043. },
  1044. .probe = ov6650_probe,
  1045. .remove = ov6650_remove,
  1046. .id_table = ov6650_id,
  1047. };
  1048. static int __init ov6650_module_init(void)
  1049. {
  1050. return i2c_add_driver(&ov6650_i2c_driver);
  1051. }
  1052. static void __exit ov6650_module_exit(void)
  1053. {
  1054. i2c_del_driver(&ov6650_i2c_driver);
  1055. }
  1056. module_init(ov6650_module_init);
  1057. module_exit(ov6650_module_exit);
  1058. MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
  1059. MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
  1060. MODULE_LICENSE("GPL v2");