mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/version.h>
  34. #include <linux/videodev2.h>
  35. #include <media/soc_camera.h>
  36. #include <media/v4l2-common.h>
  37. #include <media/v4l2-dev.h>
  38. #include <media/videobuf-dma-contig.h>
  39. #include <media/soc_mediabus.h>
  40. #include <asm/dma.h>
  41. #include <asm/fiq.h>
  42. #include <mach/dma-mx1-mx2.h>
  43. #include <mach/hardware.h>
  44. #include <mach/mx1_camera.h>
  45. /*
  46. * CSI registers
  47. */
  48. #define CSICR1 0x00 /* CSI Control Register 1 */
  49. #define CSISR 0x08 /* CSI Status Register */
  50. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  51. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  52. #define CSICR1_SOF_POL (1 << 17)
  53. #define CSICR1_SOF_INTEN (1 << 16)
  54. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  55. #define CSICR1_MCLKEN (1 << 9)
  56. #define CSICR1_FCC (1 << 8)
  57. #define CSICR1_BIG_ENDIAN (1 << 7)
  58. #define CSICR1_CLR_RXFIFO (1 << 5)
  59. #define CSICR1_GCLK_MODE (1 << 4)
  60. #define CSICR1_DATA_POL (1 << 2)
  61. #define CSICR1_REDGE (1 << 1)
  62. #define CSICR1_EN (1 << 0)
  63. #define CSISR_SFF_OR_INT (1 << 25)
  64. #define CSISR_RFF_OR_INT (1 << 24)
  65. #define CSISR_STATFF_INT (1 << 21)
  66. #define CSISR_RXFF_INT (1 << 18)
  67. #define CSISR_SOF_INT (1 << 16)
  68. #define CSISR_DRDY (1 << 0)
  69. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  70. #define DRIVER_NAME "mx1-camera"
  71. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  72. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  73. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  74. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  75. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  76. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  77. SOCAM_DATAWIDTH_8)
  78. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  79. /*
  80. * Structures
  81. */
  82. /* buffer for one video frame */
  83. struct mx1_buffer {
  84. /* common v4l buffer stuff -- must be first */
  85. struct videobuf_buffer vb;
  86. enum v4l2_mbus_pixelcode code;
  87. int inwork;
  88. };
  89. /*
  90. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  91. * Interface. If anyone ever builds hardware to enable more than
  92. * one camera, they will have to modify this driver too
  93. */
  94. struct mx1_camera_dev {
  95. struct soc_camera_host soc_host;
  96. struct soc_camera_device *icd;
  97. struct mx1_camera_pdata *pdata;
  98. struct mx1_buffer *active;
  99. struct resource *res;
  100. struct clk *clk;
  101. struct list_head capture;
  102. void __iomem *base;
  103. int dma_chan;
  104. unsigned int irq;
  105. unsigned long mclk;
  106. spinlock_t lock;
  107. };
  108. /*
  109. * Videobuf operations
  110. */
  111. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  112. unsigned int *size)
  113. {
  114. struct soc_camera_device *icd = vq->priv_data;
  115. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  116. icd->current_fmt->host_fmt);
  117. if (bytes_per_line < 0)
  118. return bytes_per_line;
  119. *size = bytes_per_line * icd->user_height;
  120. if (!*count)
  121. *count = 32;
  122. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  123. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  124. dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size);
  125. return 0;
  126. }
  127. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  128. {
  129. struct soc_camera_device *icd = vq->priv_data;
  130. struct videobuf_buffer *vb = &buf->vb;
  131. BUG_ON(in_interrupt());
  132. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  133. vb, vb->baddr, vb->bsize);
  134. /*
  135. * This waits until this buffer is out of danger, i.e., until it is no
  136. * longer in STATE_QUEUED or STATE_ACTIVE
  137. */
  138. videobuf_waiton(vq, vb, 0, 0);
  139. videobuf_dma_contig_free(vq, vb);
  140. vb->state = VIDEOBUF_NEEDS_INIT;
  141. }
  142. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  143. struct videobuf_buffer *vb, enum v4l2_field field)
  144. {
  145. struct soc_camera_device *icd = vq->priv_data;
  146. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  147. int ret;
  148. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  149. icd->current_fmt->host_fmt);
  150. if (bytes_per_line < 0)
  151. return bytes_per_line;
  152. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  153. vb, vb->baddr, vb->bsize);
  154. /* Added list head initialization on alloc */
  155. WARN_ON(!list_empty(&vb->queue));
  156. BUG_ON(NULL == icd->current_fmt);
  157. /*
  158. * I think, in buf_prepare you only have to protect global data,
  159. * the actual buffer is yours
  160. */
  161. buf->inwork = 1;
  162. if (buf->code != icd->current_fmt->code ||
  163. vb->width != icd->user_width ||
  164. vb->height != icd->user_height ||
  165. vb->field != field) {
  166. buf->code = icd->current_fmt->code;
  167. vb->width = icd->user_width;
  168. vb->height = icd->user_height;
  169. vb->field = field;
  170. vb->state = VIDEOBUF_NEEDS_INIT;
  171. }
  172. vb->size = bytes_per_line * vb->height;
  173. if (0 != vb->baddr && vb->bsize < vb->size) {
  174. ret = -EINVAL;
  175. goto out;
  176. }
  177. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  178. ret = videobuf_iolock(vq, vb, NULL);
  179. if (ret)
  180. goto fail;
  181. vb->state = VIDEOBUF_PREPARED;
  182. }
  183. buf->inwork = 0;
  184. return 0;
  185. fail:
  186. free_buffer(vq, buf);
  187. out:
  188. buf->inwork = 0;
  189. return ret;
  190. }
  191. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  192. {
  193. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  194. struct device *dev = pcdev->icd->dev.parent;
  195. int ret;
  196. if (unlikely(!pcdev->active)) {
  197. dev_err(dev, "DMA End IRQ with no active buffer\n");
  198. return -EFAULT;
  199. }
  200. /* setup sg list for future DMA */
  201. ret = imx_dma_setup_single(pcdev->dma_chan,
  202. videobuf_to_dma_contig(vbuf),
  203. vbuf->size, pcdev->res->start +
  204. CSIRXR, DMA_MODE_READ);
  205. if (unlikely(ret))
  206. dev_err(dev, "Failed to setup DMA sg list\n");
  207. return ret;
  208. }
  209. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  210. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  211. struct videobuf_buffer *vb)
  212. {
  213. struct soc_camera_device *icd = vq->priv_data;
  214. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  215. struct mx1_camera_dev *pcdev = ici->priv;
  216. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  217. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  218. vb, vb->baddr, vb->bsize);
  219. list_add_tail(&vb->queue, &pcdev->capture);
  220. vb->state = VIDEOBUF_ACTIVE;
  221. if (!pcdev->active) {
  222. pcdev->active = buf;
  223. /* setup sg list for future DMA */
  224. if (!mx1_camera_setup_dma(pcdev)) {
  225. unsigned int temp;
  226. /* enable SOF irq */
  227. temp = __raw_readl(pcdev->base + CSICR1) |
  228. CSICR1_SOF_INTEN;
  229. __raw_writel(temp, pcdev->base + CSICR1);
  230. }
  231. }
  232. }
  233. static void mx1_videobuf_release(struct videobuf_queue *vq,
  234. struct videobuf_buffer *vb)
  235. {
  236. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  237. #ifdef DEBUG
  238. struct soc_camera_device *icd = vq->priv_data;
  239. struct device *dev = icd->dev.parent;
  240. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  241. vb, vb->baddr, vb->bsize);
  242. switch (vb->state) {
  243. case VIDEOBUF_ACTIVE:
  244. dev_dbg(dev, "%s (active)\n", __func__);
  245. break;
  246. case VIDEOBUF_QUEUED:
  247. dev_dbg(dev, "%s (queued)\n", __func__);
  248. break;
  249. case VIDEOBUF_PREPARED:
  250. dev_dbg(dev, "%s (prepared)\n", __func__);
  251. break;
  252. default:
  253. dev_dbg(dev, "%s (unknown)\n", __func__);
  254. break;
  255. }
  256. #endif
  257. free_buffer(vq, buf);
  258. }
  259. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  260. struct videobuf_buffer *vb,
  261. struct mx1_buffer *buf)
  262. {
  263. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  264. list_del_init(&vb->queue);
  265. vb->state = VIDEOBUF_DONE;
  266. do_gettimeofday(&vb->ts);
  267. vb->field_count++;
  268. wake_up(&vb->done);
  269. if (list_empty(&pcdev->capture)) {
  270. pcdev->active = NULL;
  271. return;
  272. }
  273. pcdev->active = list_entry(pcdev->capture.next,
  274. struct mx1_buffer, vb.queue);
  275. /* setup sg list for future DMA */
  276. if (likely(!mx1_camera_setup_dma(pcdev))) {
  277. unsigned int temp;
  278. /* enable SOF irq */
  279. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  280. __raw_writel(temp, pcdev->base + CSICR1);
  281. }
  282. }
  283. static void mx1_camera_dma_irq(int channel, void *data)
  284. {
  285. struct mx1_camera_dev *pcdev = data;
  286. struct device *dev = pcdev->icd->dev.parent;
  287. struct mx1_buffer *buf;
  288. struct videobuf_buffer *vb;
  289. unsigned long flags;
  290. spin_lock_irqsave(&pcdev->lock, flags);
  291. imx_dma_disable(channel);
  292. if (unlikely(!pcdev->active)) {
  293. dev_err(dev, "DMA End IRQ with no active buffer\n");
  294. goto out;
  295. }
  296. vb = &pcdev->active->vb;
  297. buf = container_of(vb, struct mx1_buffer, vb);
  298. WARN_ON(buf->inwork || list_empty(&vb->queue));
  299. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  300. vb, vb->baddr, vb->bsize);
  301. mx1_camera_wakeup(pcdev, vb, buf);
  302. out:
  303. spin_unlock_irqrestore(&pcdev->lock, flags);
  304. }
  305. static struct videobuf_queue_ops mx1_videobuf_ops = {
  306. .buf_setup = mx1_videobuf_setup,
  307. .buf_prepare = mx1_videobuf_prepare,
  308. .buf_queue = mx1_videobuf_queue,
  309. .buf_release = mx1_videobuf_release,
  310. };
  311. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  312. struct soc_camera_device *icd)
  313. {
  314. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  315. struct mx1_camera_dev *pcdev = ici->priv;
  316. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent,
  317. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  318. V4L2_FIELD_NONE,
  319. sizeof(struct mx1_buffer), icd, &icd->video_lock);
  320. }
  321. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  322. {
  323. unsigned int mclk = pcdev->mclk;
  324. unsigned long div;
  325. unsigned long lcdclk;
  326. lcdclk = clk_get_rate(pcdev->clk);
  327. /*
  328. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  329. * they get a nice Oops
  330. */
  331. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  332. dev_dbg(pcdev->icd->dev.parent,
  333. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  334. lcdclk / 1000, mclk / 1000, div);
  335. return div;
  336. }
  337. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  338. {
  339. unsigned int csicr1 = CSICR1_EN;
  340. dev_dbg(pcdev->icd->dev.parent, "Activate device\n");
  341. clk_enable(pcdev->clk);
  342. /* enable CSI before doing anything else */
  343. __raw_writel(csicr1, pcdev->base + CSICR1);
  344. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  345. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  346. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  347. __raw_writel(csicr1, pcdev->base + CSICR1);
  348. }
  349. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  350. {
  351. dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n");
  352. /* Disable all CSI interface */
  353. __raw_writel(0x00, pcdev->base + CSICR1);
  354. clk_disable(pcdev->clk);
  355. }
  356. /*
  357. * The following two functions absolutely depend on the fact, that
  358. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  359. */
  360. static int mx1_camera_add_device(struct soc_camera_device *icd)
  361. {
  362. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  363. struct mx1_camera_dev *pcdev = ici->priv;
  364. int ret;
  365. if (pcdev->icd) {
  366. ret = -EBUSY;
  367. goto ebusy;
  368. }
  369. dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n",
  370. icd->devnum);
  371. mx1_camera_activate(pcdev);
  372. pcdev->icd = icd;
  373. ebusy:
  374. return ret;
  375. }
  376. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  377. {
  378. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  379. struct mx1_camera_dev *pcdev = ici->priv;
  380. unsigned int csicr1;
  381. BUG_ON(icd != pcdev->icd);
  382. /* disable interrupts */
  383. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  384. __raw_writel(csicr1, pcdev->base + CSICR1);
  385. /* Stop DMA engine */
  386. imx_dma_disable(pcdev->dma_chan);
  387. dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n",
  388. icd->devnum);
  389. mx1_camera_deactivate(pcdev);
  390. pcdev->icd = NULL;
  391. }
  392. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  393. struct v4l2_crop *a)
  394. {
  395. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  396. return v4l2_subdev_call(sd, video, s_crop, a);
  397. }
  398. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  399. {
  400. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  401. struct mx1_camera_dev *pcdev = ici->priv;
  402. unsigned long camera_flags, common_flags;
  403. unsigned int csicr1;
  404. int ret;
  405. camera_flags = icd->ops->query_bus_param(icd);
  406. /* MX1 supports only 8bit buswidth */
  407. common_flags = soc_camera_bus_param_compatible(camera_flags,
  408. CSI_BUS_FLAGS);
  409. if (!common_flags)
  410. return -EINVAL;
  411. /* Make choises, based on platform choice */
  412. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  413. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  414. if (!pcdev->pdata ||
  415. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  416. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  417. else
  418. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  419. }
  420. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  421. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  422. if (!pcdev->pdata ||
  423. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  424. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  425. else
  426. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  427. }
  428. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  429. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  430. if (!pcdev->pdata ||
  431. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  432. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  433. else
  434. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  435. }
  436. ret = icd->ops->set_bus_param(icd, common_flags);
  437. if (ret < 0)
  438. return ret;
  439. csicr1 = __raw_readl(pcdev->base + CSICR1);
  440. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  441. csicr1 |= CSICR1_REDGE;
  442. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  443. csicr1 |= CSICR1_SOF_POL;
  444. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  445. csicr1 |= CSICR1_DATA_POL;
  446. __raw_writel(csicr1, pcdev->base + CSICR1);
  447. return 0;
  448. }
  449. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  450. struct v4l2_format *f)
  451. {
  452. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  453. const struct soc_camera_format_xlate *xlate;
  454. struct v4l2_pix_format *pix = &f->fmt.pix;
  455. struct v4l2_mbus_framefmt mf;
  456. int ret, buswidth;
  457. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  458. if (!xlate) {
  459. dev_warn(icd->dev.parent, "Format %x not found\n",
  460. pix->pixelformat);
  461. return -EINVAL;
  462. }
  463. buswidth = xlate->host_fmt->bits_per_sample;
  464. if (buswidth > 8) {
  465. dev_warn(icd->dev.parent,
  466. "bits-per-sample %d for format %x unsupported\n",
  467. buswidth, pix->pixelformat);
  468. return -EINVAL;
  469. }
  470. mf.width = pix->width;
  471. mf.height = pix->height;
  472. mf.field = pix->field;
  473. mf.colorspace = pix->colorspace;
  474. mf.code = xlate->code;
  475. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  476. if (ret < 0)
  477. return ret;
  478. if (mf.code != xlate->code)
  479. return -EINVAL;
  480. pix->width = mf.width;
  481. pix->height = mf.height;
  482. pix->field = mf.field;
  483. pix->colorspace = mf.colorspace;
  484. icd->current_fmt = xlate;
  485. return ret;
  486. }
  487. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  488. struct v4l2_format *f)
  489. {
  490. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  491. const struct soc_camera_format_xlate *xlate;
  492. struct v4l2_pix_format *pix = &f->fmt.pix;
  493. struct v4l2_mbus_framefmt mf;
  494. int ret;
  495. /* TODO: limit to mx1 hardware capabilities */
  496. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  497. if (!xlate) {
  498. dev_warn(icd->dev.parent, "Format %x not found\n",
  499. pix->pixelformat);
  500. return -EINVAL;
  501. }
  502. mf.width = pix->width;
  503. mf.height = pix->height;
  504. mf.field = pix->field;
  505. mf.colorspace = pix->colorspace;
  506. mf.code = xlate->code;
  507. /* limit to sensor capabilities */
  508. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  509. if (ret < 0)
  510. return ret;
  511. pix->width = mf.width;
  512. pix->height = mf.height;
  513. pix->field = mf.field;
  514. pix->colorspace = mf.colorspace;
  515. return 0;
  516. }
  517. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  518. struct v4l2_requestbuffers *p)
  519. {
  520. int i;
  521. /*
  522. * This is for locking debugging only. I removed spinlocks and now I
  523. * check whether .prepare is ever called on a linked buffer, or whether
  524. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  525. * it hadn't triggered
  526. */
  527. for (i = 0; i < p->count; i++) {
  528. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  529. struct mx1_buffer, vb);
  530. buf->inwork = 0;
  531. INIT_LIST_HEAD(&buf->vb.queue);
  532. }
  533. return 0;
  534. }
  535. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  536. {
  537. struct soc_camera_device *icd = file->private_data;
  538. struct mx1_buffer *buf;
  539. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  540. vb.stream);
  541. poll_wait(file, &buf->vb.done, pt);
  542. if (buf->vb.state == VIDEOBUF_DONE ||
  543. buf->vb.state == VIDEOBUF_ERROR)
  544. return POLLIN | POLLRDNORM;
  545. return 0;
  546. }
  547. static int mx1_camera_querycap(struct soc_camera_host *ici,
  548. struct v4l2_capability *cap)
  549. {
  550. /* cap->name is set by the friendly caller:-> */
  551. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  552. cap->version = VERSION_CODE;
  553. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  554. return 0;
  555. }
  556. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  557. .owner = THIS_MODULE,
  558. .add = mx1_camera_add_device,
  559. .remove = mx1_camera_remove_device,
  560. .set_bus_param = mx1_camera_set_bus_param,
  561. .set_crop = mx1_camera_set_crop,
  562. .set_fmt = mx1_camera_set_fmt,
  563. .try_fmt = mx1_camera_try_fmt,
  564. .init_videobuf = mx1_camera_init_videobuf,
  565. .reqbufs = mx1_camera_reqbufs,
  566. .poll = mx1_camera_poll,
  567. .querycap = mx1_camera_querycap,
  568. };
  569. static struct fiq_handler fh = {
  570. .name = "csi_sof"
  571. };
  572. static int __init mx1_camera_probe(struct platform_device *pdev)
  573. {
  574. struct mx1_camera_dev *pcdev;
  575. struct resource *res;
  576. struct pt_regs regs;
  577. struct clk *clk;
  578. void __iomem *base;
  579. unsigned int irq;
  580. int err = 0;
  581. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  582. irq = platform_get_irq(pdev, 0);
  583. if (!res || (int)irq <= 0) {
  584. err = -ENODEV;
  585. goto exit;
  586. }
  587. clk = clk_get(&pdev->dev, "csi_clk");
  588. if (IS_ERR(clk)) {
  589. err = PTR_ERR(clk);
  590. goto exit;
  591. }
  592. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  593. if (!pcdev) {
  594. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  595. err = -ENOMEM;
  596. goto exit_put_clk;
  597. }
  598. pcdev->res = res;
  599. pcdev->clk = clk;
  600. pcdev->pdata = pdev->dev.platform_data;
  601. if (pcdev->pdata)
  602. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  603. if (!pcdev->mclk) {
  604. dev_warn(&pdev->dev,
  605. "mclk_10khz == 0! Please, fix your platform data. "
  606. "Using default 20MHz\n");
  607. pcdev->mclk = 20000000;
  608. }
  609. INIT_LIST_HEAD(&pcdev->capture);
  610. spin_lock_init(&pcdev->lock);
  611. /*
  612. * Request the regions.
  613. */
  614. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  615. err = -EBUSY;
  616. goto exit_kfree;
  617. }
  618. base = ioremap(res->start, resource_size(res));
  619. if (!base) {
  620. err = -ENOMEM;
  621. goto exit_release;
  622. }
  623. pcdev->irq = irq;
  624. pcdev->base = base;
  625. /* request dma */
  626. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  627. if (pcdev->dma_chan < 0) {
  628. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  629. err = -EBUSY;
  630. goto exit_iounmap;
  631. }
  632. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  633. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  634. pcdev);
  635. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  636. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  637. /* burst length : 16 words = 64 bytes */
  638. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  639. /* request irq */
  640. err = claim_fiq(&fh);
  641. if (err) {
  642. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  643. goto exit_free_dma;
  644. }
  645. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  646. &mx1_camera_sof_fiq_start);
  647. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  648. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  649. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  650. regs.ARM_fp = (long)pcdev->base + CSISR;
  651. regs.ARM_sp = 1 << pcdev->dma_chan;
  652. set_fiq_regs(&regs);
  653. mxc_set_irq_fiq(irq, 1);
  654. enable_fiq(irq);
  655. pcdev->soc_host.drv_name = DRIVER_NAME;
  656. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  657. pcdev->soc_host.priv = pcdev;
  658. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  659. pcdev->soc_host.nr = pdev->id;
  660. err = soc_camera_host_register(&pcdev->soc_host);
  661. if (err)
  662. goto exit_free_irq;
  663. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  664. return 0;
  665. exit_free_irq:
  666. disable_fiq(irq);
  667. mxc_set_irq_fiq(irq, 0);
  668. release_fiq(&fh);
  669. exit_free_dma:
  670. imx_dma_free(pcdev->dma_chan);
  671. exit_iounmap:
  672. iounmap(base);
  673. exit_release:
  674. release_mem_region(res->start, resource_size(res));
  675. exit_kfree:
  676. kfree(pcdev);
  677. exit_put_clk:
  678. clk_put(clk);
  679. exit:
  680. return err;
  681. }
  682. static int __exit mx1_camera_remove(struct platform_device *pdev)
  683. {
  684. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  685. struct mx1_camera_dev *pcdev = container_of(soc_host,
  686. struct mx1_camera_dev, soc_host);
  687. struct resource *res;
  688. imx_dma_free(pcdev->dma_chan);
  689. disable_fiq(pcdev->irq);
  690. mxc_set_irq_fiq(pcdev->irq, 0);
  691. release_fiq(&fh);
  692. clk_put(pcdev->clk);
  693. soc_camera_host_unregister(soc_host);
  694. iounmap(pcdev->base);
  695. res = pcdev->res;
  696. release_mem_region(res->start, resource_size(res));
  697. kfree(pcdev);
  698. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  699. return 0;
  700. }
  701. static struct platform_driver mx1_camera_driver = {
  702. .driver = {
  703. .name = DRIVER_NAME,
  704. },
  705. .remove = __exit_p(mx1_camera_remove),
  706. };
  707. static int __init mx1_camera_init(void)
  708. {
  709. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  710. }
  711. static void __exit mx1_camera_exit(void)
  712. {
  713. return platform_driver_unregister(&mx1_camera_driver);
  714. }
  715. module_init(mx1_camera_init);
  716. module_exit(mx1_camera_exit);
  717. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  718. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  719. MODULE_LICENSE("GPL v2");
  720. MODULE_ALIAS("platform:" DRIVER_NAME);