mt9v011.c 15 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <asm/div64.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-chip-ident.h>
  14. #include <media/mt9v011.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  17. MODULE_LICENSE("GPL");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. #define R00_MT9V011_CHIP_VERSION 0x00
  22. #define R01_MT9V011_ROWSTART 0x01
  23. #define R02_MT9V011_COLSTART 0x02
  24. #define R03_MT9V011_HEIGHT 0x03
  25. #define R04_MT9V011_WIDTH 0x04
  26. #define R05_MT9V011_HBLANK 0x05
  27. #define R06_MT9V011_VBLANK 0x06
  28. #define R07_MT9V011_OUT_CTRL 0x07
  29. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  30. #define R0A_MT9V011_CLK_SPEED 0x0a
  31. #define R0B_MT9V011_RESTART 0x0b
  32. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  33. #define R0D_MT9V011_RESET 0x0d
  34. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  35. #define R20_MT9V011_READ_MODE 0x20
  36. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  37. #define R2C_MT9V011_BLUE_GAIN 0x2c
  38. #define R2D_MT9V011_RED_GAIN 0x2d
  39. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  40. #define R35_MT9V011_GLOBAL_GAIN 0x35
  41. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  42. #define MT9V011_VERSION 0x8232
  43. #define MT9V011_REV_B_VERSION 0x8243
  44. /* supported controls */
  45. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  46. {
  47. .id = V4L2_CID_GAIN,
  48. .type = V4L2_CTRL_TYPE_INTEGER,
  49. .name = "Gain",
  50. .minimum = 0,
  51. .maximum = (1 << 10) - 1,
  52. .step = 1,
  53. .default_value = 0x0020,
  54. .flags = 0,
  55. }, {
  56. .id = V4L2_CID_RED_BALANCE,
  57. .type = V4L2_CTRL_TYPE_INTEGER,
  58. .name = "Red Balance",
  59. .minimum = -1 << 9,
  60. .maximum = (1 << 9) - 1,
  61. .step = 1,
  62. .default_value = 0,
  63. .flags = 0,
  64. }, {
  65. .id = V4L2_CID_BLUE_BALANCE,
  66. .type = V4L2_CTRL_TYPE_INTEGER,
  67. .name = "Blue Balance",
  68. .minimum = -1 << 9,
  69. .maximum = (1 << 9) - 1,
  70. .step = 1,
  71. .default_value = 0,
  72. .flags = 0,
  73. }, {
  74. .id = V4L2_CID_HFLIP,
  75. .type = V4L2_CTRL_TYPE_BOOLEAN,
  76. .name = "Mirror",
  77. .minimum = 0,
  78. .maximum = 1,
  79. .step = 1,
  80. .default_value = 0,
  81. .flags = 0,
  82. }, {
  83. .id = V4L2_CID_VFLIP,
  84. .type = V4L2_CTRL_TYPE_BOOLEAN,
  85. .name = "Vflip",
  86. .minimum = 0,
  87. .maximum = 1,
  88. .step = 1,
  89. .default_value = 0,
  90. .flags = 0,
  91. }, {
  92. }
  93. };
  94. struct mt9v011 {
  95. struct v4l2_subdev sd;
  96. unsigned width, height;
  97. unsigned xtal;
  98. unsigned hflip:1;
  99. unsigned vflip:1;
  100. u16 global_gain, red_bal, blue_bal;
  101. };
  102. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  103. {
  104. return container_of(sd, struct mt9v011, sd);
  105. }
  106. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  107. {
  108. struct i2c_client *c = v4l2_get_subdevdata(sd);
  109. __be16 buffer;
  110. int rc, val;
  111. rc = i2c_master_send(c, &addr, 1);
  112. if (rc != 1)
  113. v4l2_dbg(0, debug, sd,
  114. "i2c i/o error: rc == %d (should be 1)\n", rc);
  115. msleep(10);
  116. rc = i2c_master_recv(c, (char *)&buffer, 2);
  117. if (rc != 2)
  118. v4l2_dbg(0, debug, sd,
  119. "i2c i/o error: rc == %d (should be 2)\n", rc);
  120. val = be16_to_cpu(buffer);
  121. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  122. return val;
  123. }
  124. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  125. u16 value)
  126. {
  127. struct i2c_client *c = v4l2_get_subdevdata(sd);
  128. unsigned char buffer[3];
  129. int rc;
  130. buffer[0] = addr;
  131. buffer[1] = value >> 8;
  132. buffer[2] = value & 0xff;
  133. v4l2_dbg(2, debug, sd,
  134. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  135. rc = i2c_master_send(c, buffer, 3);
  136. if (rc != 3)
  137. v4l2_dbg(0, debug, sd,
  138. "i2c i/o error: rc == %d (should be 3)\n", rc);
  139. }
  140. struct i2c_reg_value {
  141. unsigned char reg;
  142. u16 value;
  143. };
  144. /*
  145. * Values used at the original driver
  146. * Some values are marked as Reserved at the datasheet
  147. */
  148. static const struct i2c_reg_value mt9v011_init_default[] = {
  149. { R0D_MT9V011_RESET, 0x0001 },
  150. { R0D_MT9V011_RESET, 0x0000 },
  151. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  152. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  153. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  154. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  155. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  156. };
  157. static void set_balance(struct v4l2_subdev *sd)
  158. {
  159. struct mt9v011 *core = to_mt9v011(sd);
  160. u16 green1_gain, green2_gain, blue_gain, red_gain;
  161. green1_gain = core->global_gain;
  162. green2_gain = core->global_gain;
  163. blue_gain = core->global_gain +
  164. core->global_gain * core->blue_bal / (1 << 9);
  165. red_gain = core->global_gain +
  166. core->global_gain * core->blue_bal / (1 << 9);
  167. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
  168. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
  169. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  170. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  171. }
  172. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  173. {
  174. struct mt9v011 *core = to_mt9v011(sd);
  175. unsigned height, width, hblank, vblank, speed;
  176. unsigned row_time, t_time;
  177. u64 frames_per_ms;
  178. unsigned tmp;
  179. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  180. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  181. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  182. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  183. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  184. row_time = (width + 113 + hblank) * (speed + 2);
  185. t_time = row_time * (height + vblank + 1);
  186. frames_per_ms = core->xtal * 1000l;
  187. do_div(frames_per_ms, t_time);
  188. tmp = frames_per_ms;
  189. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  190. tmp / 1000, tmp % 1000, t_time);
  191. if (numerator && denominator) {
  192. *numerator = 1000;
  193. *denominator = (u32)frames_per_ms;
  194. }
  195. }
  196. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  197. {
  198. struct mt9v011 *core = to_mt9v011(sd);
  199. unsigned height, width, hblank, vblank;
  200. unsigned row_time, line_time;
  201. u64 t_time, speed;
  202. /* Avoid bogus calculus */
  203. if (!numerator || !denominator)
  204. return 0;
  205. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  206. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  207. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  208. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  209. row_time = width + 113 + hblank;
  210. line_time = height + vblank + 1;
  211. t_time = core->xtal * ((u64)numerator);
  212. /* round to the closest value */
  213. t_time += denominator / 2;
  214. do_div(t_time, denominator);
  215. speed = t_time;
  216. do_div(speed, row_time * line_time);
  217. /* Avoid having a negative value for speed */
  218. if (speed < 2)
  219. speed = 0;
  220. else
  221. speed -= 2;
  222. /* Avoid speed overflow */
  223. if (speed > 15)
  224. return 15;
  225. return (u16)speed;
  226. }
  227. static void set_res(struct v4l2_subdev *sd)
  228. {
  229. struct mt9v011 *core = to_mt9v011(sd);
  230. unsigned vstart, hstart;
  231. /*
  232. * The mt9v011 doesn't have scaling. So, in order to select the desired
  233. * resolution, we're cropping at the middle of the sensor.
  234. * hblank and vblank should be adjusted, in order to warrant that
  235. * we'll preserve the line timings for 30 fps, no matter what resolution
  236. * is selected.
  237. * NOTE: datasheet says that width (and height) should be filled with
  238. * width-1. However, this doesn't work, since one pixel per line will
  239. * be missing.
  240. */
  241. hstart = 14 + (640 - core->width) / 2;
  242. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  243. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  244. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  245. vstart = 8 + (480 - core->height) / 2;
  246. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  247. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  248. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  249. calc_fps(sd, NULL, NULL);
  250. };
  251. static void set_read_mode(struct v4l2_subdev *sd)
  252. {
  253. struct mt9v011 *core = to_mt9v011(sd);
  254. unsigned mode = 0x1000;
  255. if (core->hflip)
  256. mode |= 0x4000;
  257. if (core->vflip)
  258. mode |= 0x8000;
  259. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  260. }
  261. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  262. {
  263. int i;
  264. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  265. mt9v011_write(sd, mt9v011_init_default[i].reg,
  266. mt9v011_init_default[i].value);
  267. set_balance(sd);
  268. set_res(sd);
  269. set_read_mode(sd);
  270. return 0;
  271. };
  272. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  273. {
  274. struct mt9v011 *core = to_mt9v011(sd);
  275. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  276. switch (ctrl->id) {
  277. case V4L2_CID_GAIN:
  278. ctrl->value = core->global_gain;
  279. return 0;
  280. case V4L2_CID_RED_BALANCE:
  281. ctrl->value = core->red_bal;
  282. return 0;
  283. case V4L2_CID_BLUE_BALANCE:
  284. ctrl->value = core->blue_bal;
  285. return 0;
  286. case V4L2_CID_HFLIP:
  287. ctrl->value = core->hflip ? 1 : 0;
  288. return 0;
  289. case V4L2_CID_VFLIP:
  290. ctrl->value = core->vflip ? 1 : 0;
  291. return 0;
  292. }
  293. return -EINVAL;
  294. }
  295. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  296. {
  297. int i;
  298. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  299. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  300. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  301. memcpy(qc, &(mt9v011_qctrl[i]),
  302. sizeof(*qc));
  303. return 0;
  304. }
  305. return -EINVAL;
  306. }
  307. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  308. {
  309. struct mt9v011 *core = to_mt9v011(sd);
  310. u8 i, n;
  311. n = ARRAY_SIZE(mt9v011_qctrl);
  312. for (i = 0; i < n; i++) {
  313. if (ctrl->id != mt9v011_qctrl[i].id)
  314. continue;
  315. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  316. ctrl->value > mt9v011_qctrl[i].maximum)
  317. return -ERANGE;
  318. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  319. ctrl->id, ctrl->value);
  320. break;
  321. }
  322. switch (ctrl->id) {
  323. case V4L2_CID_GAIN:
  324. core->global_gain = ctrl->value;
  325. break;
  326. case V4L2_CID_RED_BALANCE:
  327. core->red_bal = ctrl->value;
  328. break;
  329. case V4L2_CID_BLUE_BALANCE:
  330. core->blue_bal = ctrl->value;
  331. break;
  332. case V4L2_CID_HFLIP:
  333. core->hflip = ctrl->value;
  334. set_read_mode(sd);
  335. return 0;
  336. case V4L2_CID_VFLIP:
  337. core->vflip = ctrl->value;
  338. set_read_mode(sd);
  339. return 0;
  340. default:
  341. return -EINVAL;
  342. }
  343. set_balance(sd);
  344. return 0;
  345. }
  346. static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  347. enum v4l2_mbus_pixelcode *code)
  348. {
  349. if (index > 0)
  350. return -EINVAL;
  351. *code = V4L2_MBUS_FMT_SGRBG8_1X8;
  352. return 0;
  353. }
  354. static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  355. {
  356. if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
  357. return -EINVAL;
  358. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  359. &fmt->height, 32, 480, 1, 0);
  360. fmt->field = V4L2_FIELD_NONE;
  361. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  362. return 0;
  363. }
  364. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  365. {
  366. struct v4l2_captureparm *cp = &parms->parm.capture;
  367. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  368. return -EINVAL;
  369. memset(cp, 0, sizeof(struct v4l2_captureparm));
  370. cp->capability = V4L2_CAP_TIMEPERFRAME;
  371. calc_fps(sd,
  372. &cp->timeperframe.numerator,
  373. &cp->timeperframe.denominator);
  374. return 0;
  375. }
  376. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  377. {
  378. struct v4l2_captureparm *cp = &parms->parm.capture;
  379. struct v4l2_fract *tpf = &cp->timeperframe;
  380. u16 speed;
  381. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  382. return -EINVAL;
  383. if (cp->extendedmode != 0)
  384. return -EINVAL;
  385. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  386. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  387. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  388. /* Recalculate and update fps info */
  389. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  390. return 0;
  391. }
  392. static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  393. {
  394. struct mt9v011 *core = to_mt9v011(sd);
  395. int rc;
  396. rc = mt9v011_try_mbus_fmt(sd, fmt);
  397. if (rc < 0)
  398. return -EINVAL;
  399. core->width = fmt->width;
  400. core->height = fmt->height;
  401. set_res(sd);
  402. return 0;
  403. }
  404. #ifdef CONFIG_VIDEO_ADV_DEBUG
  405. static int mt9v011_g_register(struct v4l2_subdev *sd,
  406. struct v4l2_dbg_register *reg)
  407. {
  408. struct i2c_client *client = v4l2_get_subdevdata(sd);
  409. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  410. return -EINVAL;
  411. if (!capable(CAP_SYS_ADMIN))
  412. return -EPERM;
  413. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  414. reg->size = 2;
  415. return 0;
  416. }
  417. static int mt9v011_s_register(struct v4l2_subdev *sd,
  418. struct v4l2_dbg_register *reg)
  419. {
  420. struct i2c_client *client = v4l2_get_subdevdata(sd);
  421. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  422. return -EINVAL;
  423. if (!capable(CAP_SYS_ADMIN))
  424. return -EPERM;
  425. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  426. return 0;
  427. }
  428. #endif
  429. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  430. struct v4l2_dbg_chip_ident *chip)
  431. {
  432. u16 version;
  433. struct i2c_client *client = v4l2_get_subdevdata(sd);
  434. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  435. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  436. version);
  437. }
  438. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  439. .queryctrl = mt9v011_queryctrl,
  440. .g_ctrl = mt9v011_g_ctrl,
  441. .s_ctrl = mt9v011_s_ctrl,
  442. .reset = mt9v011_reset,
  443. .g_chip_ident = mt9v011_g_chip_ident,
  444. #ifdef CONFIG_VIDEO_ADV_DEBUG
  445. .g_register = mt9v011_g_register,
  446. .s_register = mt9v011_s_register,
  447. #endif
  448. };
  449. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  450. .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
  451. .try_mbus_fmt = mt9v011_try_mbus_fmt,
  452. .s_mbus_fmt = mt9v011_s_mbus_fmt,
  453. .g_parm = mt9v011_g_parm,
  454. .s_parm = mt9v011_s_parm,
  455. };
  456. static const struct v4l2_subdev_ops mt9v011_ops = {
  457. .core = &mt9v011_core_ops,
  458. .video = &mt9v011_video_ops,
  459. };
  460. /****************************************************************************
  461. I2C Client & Driver
  462. ****************************************************************************/
  463. static int mt9v011_probe(struct i2c_client *c,
  464. const struct i2c_device_id *id)
  465. {
  466. u16 version;
  467. struct mt9v011 *core;
  468. struct v4l2_subdev *sd;
  469. /* Check if the adapter supports the needed features */
  470. if (!i2c_check_functionality(c->adapter,
  471. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  472. return -EIO;
  473. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  474. if (!core)
  475. return -ENOMEM;
  476. sd = &core->sd;
  477. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  478. /* Check if the sensor is really a MT9V011 */
  479. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  480. if ((version != MT9V011_VERSION) &&
  481. (version != MT9V011_REV_B_VERSION)) {
  482. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  483. version);
  484. kfree(core);
  485. return -EINVAL;
  486. }
  487. core->global_gain = 0x0024;
  488. core->width = 640;
  489. core->height = 480;
  490. core->xtal = 27000000; /* Hz */
  491. if (c->dev.platform_data) {
  492. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  493. core->xtal = pdata->xtal;
  494. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  495. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  496. }
  497. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  498. c->addr << 1, c->adapter->name, version);
  499. return 0;
  500. }
  501. static int mt9v011_remove(struct i2c_client *c)
  502. {
  503. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  504. v4l2_dbg(1, debug, sd,
  505. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  506. c->addr << 1);
  507. v4l2_device_unregister_subdev(sd);
  508. kfree(to_mt9v011(sd));
  509. return 0;
  510. }
  511. /* ----------------------------------------------------------------------- */
  512. static const struct i2c_device_id mt9v011_id[] = {
  513. { "mt9v011", 0 },
  514. { }
  515. };
  516. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  517. static struct i2c_driver mt9v011_driver = {
  518. .driver = {
  519. .owner = THIS_MODULE,
  520. .name = "mt9v011",
  521. },
  522. .probe = mt9v011_probe,
  523. .remove = mt9v011_remove,
  524. .id_table = mt9v011_id,
  525. };
  526. static __init int init_mt9v011(void)
  527. {
  528. return i2c_add_driver(&mt9v011_driver);
  529. }
  530. static __exit void exit_mt9v011(void)
  531. {
  532. i2c_del_driver(&mt9v011_driver);
  533. }
  534. module_init(init_mt9v011);
  535. module_exit(exit_mt9v011);