cx18-streams.c 24 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  41. .unlocked_ioctl = cx18_v4l2_ioctl,
  42. .release = cx18_v4l2_close,
  43. .poll = cx18_v4l2_enc_poll,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. static void cx18_stream_init(struct cx18 *cx, int type)
  95. {
  96. struct cx18_stream *s = &cx->streams[type];
  97. struct video_device *video_dev = s->video_dev;
  98. /* we need to keep video_dev, so restore it afterwards */
  99. memset(s, 0, sizeof(*s));
  100. s->video_dev = video_dev;
  101. /* initialize cx18_stream fields */
  102. s->dvb = NULL;
  103. s->cx = cx;
  104. s->type = type;
  105. s->name = cx18_stream_info[type].name;
  106. s->handle = CX18_INVALID_TASK_HANDLE;
  107. s->dma = cx18_stream_info[type].dma;
  108. s->buffers = cx->stream_buffers[type];
  109. s->buf_size = cx->stream_buf_size[type];
  110. INIT_LIST_HEAD(&s->buf_pool);
  111. s->bufs_per_mdl = 1;
  112. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  113. init_waitqueue_head(&s->waitq);
  114. s->id = -1;
  115. spin_lock_init(&s->q_free.lock);
  116. cx18_queue_init(&s->q_free);
  117. spin_lock_init(&s->q_busy.lock);
  118. cx18_queue_init(&s->q_busy);
  119. spin_lock_init(&s->q_full.lock);
  120. cx18_queue_init(&s->q_full);
  121. spin_lock_init(&s->q_idle.lock);
  122. cx18_queue_init(&s->q_idle);
  123. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  124. }
  125. static int cx18_prep_dev(struct cx18 *cx, int type)
  126. {
  127. struct cx18_stream *s = &cx->streams[type];
  128. u32 cap = cx->v4l2_cap;
  129. int num_offset = cx18_stream_info[type].num_offset;
  130. int num = cx->instance + cx18_first_minor + num_offset;
  131. /*
  132. * These five fields are always initialized.
  133. * For analog capture related streams, if video_dev == NULL then the
  134. * stream is not in use.
  135. * For the TS stream, if dvb == NULL then the stream is not in use.
  136. * In those cases no other fields but these four can be used.
  137. */
  138. s->video_dev = NULL;
  139. s->dvb = NULL;
  140. s->cx = cx;
  141. s->type = type;
  142. s->name = cx18_stream_info[type].name;
  143. /* Check whether the radio is supported */
  144. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  145. return 0;
  146. /* Check whether VBI is supported */
  147. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  148. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  149. return 0;
  150. /* User explicitly selected 0 buffers for these streams, so don't
  151. create them. */
  152. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  153. cx->stream_buffers[type] == 0) {
  154. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  155. return 0;
  156. }
  157. cx18_stream_init(cx, type);
  158. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  159. if (type == CX18_ENC_STREAM_TYPE_TS) {
  160. if (cx->card->hw_all & CX18_HW_DVB) {
  161. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  162. if (s->dvb == NULL) {
  163. CX18_ERR("Couldn't allocate cx18_dvb structure"
  164. " for %s\n", s->name);
  165. return -ENOMEM;
  166. }
  167. } else {
  168. /* Don't need buffers for the TS, if there is no DVB */
  169. s->buffers = 0;
  170. }
  171. }
  172. if (num_offset == -1)
  173. return 0;
  174. /* allocate and initialize the v4l2 video device structure */
  175. s->video_dev = video_device_alloc();
  176. if (s->video_dev == NULL) {
  177. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  178. s->name);
  179. return -ENOMEM;
  180. }
  181. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  182. cx->v4l2_dev.name, s->name);
  183. s->video_dev->num = num;
  184. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  185. s->video_dev->fops = &cx18_v4l2_enc_fops;
  186. s->video_dev->release = video_device_release;
  187. s->video_dev->tvnorms = V4L2_STD_ALL;
  188. set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
  189. cx18_set_funcs(s->video_dev);
  190. return 0;
  191. }
  192. /* Initialize v4l2 variables and register v4l2 devices */
  193. int cx18_streams_setup(struct cx18 *cx)
  194. {
  195. int type, ret;
  196. /* Setup V4L2 Devices */
  197. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  198. /* Prepare device */
  199. ret = cx18_prep_dev(cx, type);
  200. if (ret < 0)
  201. break;
  202. /* Allocate Stream */
  203. ret = cx18_stream_alloc(&cx->streams[type]);
  204. if (ret < 0)
  205. break;
  206. }
  207. if (type == CX18_MAX_STREAMS)
  208. return 0;
  209. /* One or more streams could not be initialized. Clean 'em all up. */
  210. cx18_streams_cleanup(cx, 0);
  211. return ret;
  212. }
  213. static int cx18_reg_dev(struct cx18 *cx, int type)
  214. {
  215. struct cx18_stream *s = &cx->streams[type];
  216. int vfl_type = cx18_stream_info[type].vfl_type;
  217. const char *name;
  218. int num, ret;
  219. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  220. ret = cx18_dvb_register(s);
  221. if (ret < 0) {
  222. CX18_ERR("DVB failed to register\n");
  223. return ret;
  224. }
  225. }
  226. if (s->video_dev == NULL)
  227. return 0;
  228. num = s->video_dev->num;
  229. /* card number + user defined offset + device offset */
  230. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  231. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  232. if (s_mpg->video_dev)
  233. num = s_mpg->video_dev->num
  234. + cx18_stream_info[type].num_offset;
  235. }
  236. video_set_drvdata(s->video_dev, s);
  237. /* Register device. First try the desired minor, then any free one. */
  238. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  239. if (ret < 0) {
  240. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  241. s->name, num);
  242. video_device_release(s->video_dev);
  243. s->video_dev = NULL;
  244. return ret;
  245. }
  246. name = video_device_node_name(s->video_dev);
  247. switch (vfl_type) {
  248. case VFL_TYPE_GRABBER:
  249. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  250. name, s->name, cx->stream_buffers[type],
  251. cx->stream_buf_size[type] / 1024,
  252. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  253. break;
  254. case VFL_TYPE_RADIO:
  255. CX18_INFO("Registered device %s for %s\n", name, s->name);
  256. break;
  257. case VFL_TYPE_VBI:
  258. if (cx->stream_buffers[type])
  259. CX18_INFO("Registered device %s for %s "
  260. "(%d x %d bytes)\n",
  261. name, s->name, cx->stream_buffers[type],
  262. cx->stream_buf_size[type]);
  263. else
  264. CX18_INFO("Registered device %s for %s\n",
  265. name, s->name);
  266. break;
  267. }
  268. return 0;
  269. }
  270. /* Register v4l2 devices */
  271. int cx18_streams_register(struct cx18 *cx)
  272. {
  273. int type;
  274. int err;
  275. int ret = 0;
  276. /* Register V4L2 devices */
  277. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  278. err = cx18_reg_dev(cx, type);
  279. if (err && ret == 0)
  280. ret = err;
  281. }
  282. if (ret == 0)
  283. return 0;
  284. /* One or more streams could not be initialized. Clean 'em all up. */
  285. cx18_streams_cleanup(cx, 1);
  286. return ret;
  287. }
  288. /* Unregister v4l2 devices */
  289. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  290. {
  291. struct video_device *vdev;
  292. int type;
  293. /* Teardown all streams */
  294. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  295. /* The TS has a cx18_dvb structure, not a video_device */
  296. if (type == CX18_ENC_STREAM_TYPE_TS) {
  297. if (cx->streams[type].dvb != NULL) {
  298. if (unregister)
  299. cx18_dvb_unregister(&cx->streams[type]);
  300. kfree(cx->streams[type].dvb);
  301. cx->streams[type].dvb = NULL;
  302. cx18_stream_free(&cx->streams[type]);
  303. }
  304. continue;
  305. }
  306. /* No struct video_device, but can have buffers allocated */
  307. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  308. if (cx->stream_buffers[type] != 0) {
  309. cx->stream_buffers[type] = 0;
  310. cx18_stream_free(&cx->streams[type]);
  311. }
  312. continue;
  313. }
  314. /* If struct video_device exists, can have buffers allocated */
  315. vdev = cx->streams[type].video_dev;
  316. cx->streams[type].video_dev = NULL;
  317. if (vdev == NULL)
  318. continue;
  319. cx18_stream_free(&cx->streams[type]);
  320. /* Unregister or release device */
  321. if (unregister)
  322. video_unregister_device(vdev);
  323. else
  324. video_device_release(vdev);
  325. }
  326. }
  327. static void cx18_vbi_setup(struct cx18_stream *s)
  328. {
  329. struct cx18 *cx = s->cx;
  330. int raw = cx18_raw_vbi(cx);
  331. u32 data[CX2341X_MBOX_MAX_DATA];
  332. int lines;
  333. if (cx->is_60hz) {
  334. cx->vbi.count = 12;
  335. cx->vbi.start[0] = 10;
  336. cx->vbi.start[1] = 273;
  337. } else { /* PAL/SECAM */
  338. cx->vbi.count = 18;
  339. cx->vbi.start[0] = 6;
  340. cx->vbi.start[1] = 318;
  341. }
  342. /* setup VBI registers */
  343. if (raw)
  344. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  345. else
  346. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  347. /*
  348. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  349. * VBI when the first analog capture channel starts, as once it starts
  350. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  351. * (i.e. for the VBI capture channels). We also send it for each
  352. * analog capture channel anyway just to make sure we get the proper
  353. * behavior
  354. */
  355. if (raw) {
  356. lines = cx->vbi.count * 2;
  357. } else {
  358. /*
  359. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  360. * The EAV RP code's Field bit toggles on line 4, a few lines
  361. * after the Vertcal Blank bit has already toggled.
  362. * Tell the encoder to capture 21-4+1=18 lines per field,
  363. * since we want lines 10 through 21.
  364. *
  365. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  366. * The EAV RP code's Field bit toggles on line 1, a few lines
  367. * after the Vertcal Blank bit has already toggled.
  368. * (We've actually set the digitizer so that the Field bit
  369. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  370. * lines per field, since we want lines 6 through 23.
  371. */
  372. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  373. }
  374. data[0] = s->handle;
  375. /* Lines per field */
  376. data[1] = (lines / 2) | ((lines / 2) << 16);
  377. /* bytes per line */
  378. data[2] = (raw ? vbi_active_samples
  379. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  380. : vbi_hblank_samples_50Hz));
  381. /* Every X number of frames a VBI interrupt arrives
  382. (frames as in 25 or 30 fps) */
  383. data[3] = 1;
  384. /*
  385. * Set the SAV/EAV RP codes to look for as start/stop points
  386. * when in VIP-1.1 mode
  387. */
  388. if (raw) {
  389. /*
  390. * Start codes for beginning of "active" line in vertical blank
  391. * 0x20 ( VerticalBlank )
  392. * 0x60 ( EvenField VerticalBlank )
  393. */
  394. data[4] = 0x20602060;
  395. /*
  396. * End codes for end of "active" raw lines and regular lines
  397. * 0x30 ( VerticalBlank HorizontalBlank)
  398. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  399. * 0x90 (Task HorizontalBlank)
  400. * 0xd0 (Task EvenField HorizontalBlank)
  401. */
  402. data[5] = 0x307090d0;
  403. } else {
  404. /*
  405. * End codes for active video, we want data in the hblank region
  406. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  407. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  408. *
  409. * Since the V bit is only allowed to toggle in the EAV RP code,
  410. * just before the first active region line, these two
  411. * are problematic:
  412. * 0x90 (Task HorizontalBlank)
  413. * 0xd0 (Task EvenField HorizontalBlank)
  414. *
  415. * We have set the digitzer such that we don't have to worry
  416. * about these problem codes.
  417. */
  418. data[4] = 0xB0F0B0F0;
  419. /*
  420. * Start codes for beginning of active line in vertical blank
  421. * 0xa0 (Task VerticalBlank )
  422. * 0xe0 (Task EvenField VerticalBlank )
  423. */
  424. data[5] = 0xA0E0A0E0;
  425. }
  426. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  427. data[0], data[1], data[2], data[3], data[4], data[5]);
  428. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  429. }
  430. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  431. {
  432. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  433. struct cx18_mdl *mdl;
  434. if (!cx18_stream_enabled(s))
  435. return;
  436. /* Return if the firmware is not running low on MDLs */
  437. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  438. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  439. return;
  440. /* Return if there are no MDLs to rotate back to the firmware */
  441. if (atomic_read(&s->q_full.depth) < 2)
  442. return;
  443. /*
  444. * Take the oldest IDX MDL still holding data, and discard its index
  445. * entries by scheduling the MDL to go back to the firmware
  446. */
  447. mdl = cx18_dequeue(s, &s->q_full);
  448. if (mdl != NULL)
  449. cx18_enqueue(s, mdl, &s->q_free);
  450. }
  451. static
  452. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  453. struct cx18_mdl *mdl)
  454. {
  455. struct cx18 *cx = s->cx;
  456. struct cx18_queue *q;
  457. /* Don't give it to the firmware, if we're not running a capture */
  458. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  459. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  460. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  461. return cx18_enqueue(s, mdl, &s->q_free);
  462. q = cx18_enqueue(s, mdl, &s->q_busy);
  463. if (q != &s->q_busy)
  464. return q; /* The firmware has the max MDLs it can handle */
  465. cx18_mdl_sync_for_device(s, mdl);
  466. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  467. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  468. s->bufs_per_mdl, mdl->id, s->mdl_size);
  469. return q;
  470. }
  471. static
  472. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  473. {
  474. struct cx18_queue *q;
  475. struct cx18_mdl *mdl;
  476. if (atomic_read(&s->q_free.depth) == 0 ||
  477. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  478. return;
  479. /* Move from q_free to q_busy notifying the firmware, until the limit */
  480. do {
  481. mdl = cx18_dequeue(s, &s->q_free);
  482. if (mdl == NULL)
  483. break;
  484. q = _cx18_stream_put_mdl_fw(s, mdl);
  485. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  486. && q == &s->q_busy);
  487. }
  488. void cx18_out_work_handler(struct work_struct *work)
  489. {
  490. struct cx18_stream *s =
  491. container_of(work, struct cx18_stream, out_work_order);
  492. _cx18_stream_load_fw_queue(s);
  493. }
  494. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  495. {
  496. cx18_unload_queues(s);
  497. switch (s->type) {
  498. case CX18_ENC_STREAM_TYPE_YUV:
  499. /*
  500. * Height should be a multiple of 32 lines.
  501. * Set the MDL size to the exact size needed for one frame.
  502. * Use enough buffers per MDL to cover the MDL size
  503. */
  504. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  505. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  506. if (s->mdl_size % s->buf_size)
  507. s->bufs_per_mdl++;
  508. break;
  509. case CX18_ENC_STREAM_TYPE_VBI:
  510. s->bufs_per_mdl = 1;
  511. if (cx18_raw_vbi(s->cx)) {
  512. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  513. * 2 * vbi_active_samples;
  514. } else {
  515. /*
  516. * See comment in cx18_vbi_setup() below about the
  517. * extra lines we capture in sliced VBI mode due to
  518. * the lines on which EAV RP codes toggle.
  519. */
  520. s->mdl_size = s->cx->is_60hz
  521. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  522. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  523. }
  524. break;
  525. default:
  526. s->bufs_per_mdl = 1;
  527. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  528. break;
  529. }
  530. cx18_load_queues(s);
  531. }
  532. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  533. {
  534. u32 data[MAX_MB_ARGUMENTS];
  535. struct cx18 *cx = s->cx;
  536. int captype = 0;
  537. struct cx18_stream *s_idx;
  538. if (!cx18_stream_enabled(s))
  539. return -EINVAL;
  540. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  541. switch (s->type) {
  542. case CX18_ENC_STREAM_TYPE_MPG:
  543. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  544. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  545. cx->dualwatch_jiffies = jiffies;
  546. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  547. cx->search_pack_header = 0;
  548. break;
  549. case CX18_ENC_STREAM_TYPE_IDX:
  550. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  551. break;
  552. case CX18_ENC_STREAM_TYPE_TS:
  553. captype = CAPTURE_CHANNEL_TYPE_TS;
  554. break;
  555. case CX18_ENC_STREAM_TYPE_YUV:
  556. captype = CAPTURE_CHANNEL_TYPE_YUV;
  557. break;
  558. case CX18_ENC_STREAM_TYPE_PCM:
  559. captype = CAPTURE_CHANNEL_TYPE_PCM;
  560. break;
  561. case CX18_ENC_STREAM_TYPE_VBI:
  562. #ifdef CX18_ENCODER_PARSES_SLICED
  563. captype = cx18_raw_vbi(cx) ?
  564. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  565. #else
  566. /*
  567. * Currently we set things up so that Sliced VBI from the
  568. * digitizer is handled as Raw VBI by the encoder
  569. */
  570. captype = CAPTURE_CHANNEL_TYPE_VBI;
  571. #endif
  572. cx->vbi.frame = 0;
  573. cx->vbi.inserted_frame = 0;
  574. memset(cx->vbi.sliced_mpeg_size,
  575. 0, sizeof(cx->vbi.sliced_mpeg_size));
  576. break;
  577. default:
  578. return -EINVAL;
  579. }
  580. /* Clear Streamoff flags in case left from last capture */
  581. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  582. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  583. s->handle = data[0];
  584. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  585. /*
  586. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  587. * set up all the parameters, as it is not obvious which parameters the
  588. * firmware shares across capture channel types and which it does not.
  589. *
  590. * Some of the cx18_vapi() calls below apply to only certain capture
  591. * channel types. We're hoping there's no harm in calling most of them
  592. * anyway, as long as the values are all consistent. Setting some
  593. * shared parameters will have no effect once an analog capture channel
  594. * has started streaming.
  595. */
  596. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  597. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  598. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  599. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  600. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  601. /*
  602. * Audio related reset according to
  603. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  604. */
  605. if (atomic_read(&cx->ana_capturing) == 0)
  606. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  607. s->handle, 12);
  608. /*
  609. * Number of lines for Field 1 & Field 2 according to
  610. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  611. * Field 1 is 312 for 625 line systems in BT.656
  612. * Field 2 is 313 for 625 line systems in BT.656
  613. */
  614. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  615. s->handle, 312, 313);
  616. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  617. cx18_vbi_setup(s);
  618. /*
  619. * Select to receive I, P, and B frame index entries, if the
  620. * index stream is enabled. Otherwise disable index entry
  621. * generation.
  622. */
  623. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  624. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  625. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  626. /* Call out to the common CX2341x API setup for user controls */
  627. cx->cxhdl.priv = s;
  628. cx2341x_handler_setup(&cx->cxhdl);
  629. /*
  630. * When starting a capture and we're set for radio,
  631. * ensure the video is muted, despite the user control.
  632. */
  633. if (!cx->cxhdl.video_mute &&
  634. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  635. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  636. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  637. }
  638. if (atomic_read(&cx->tot_capturing) == 0) {
  639. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  640. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  641. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  642. }
  643. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  644. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  645. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  646. /* Init all the cpu_mdls for this stream */
  647. cx18_stream_configure_mdls(s);
  648. _cx18_stream_load_fw_queue(s);
  649. /* begin_capture */
  650. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  651. CX18_DEBUG_WARN("Error starting capture!\n");
  652. /* Ensure we're really not capturing before releasing MDLs */
  653. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  654. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  655. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  656. else
  657. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  658. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  659. /* FIXME - CX18_F_S_STREAMOFF as well? */
  660. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  661. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  662. s->handle = CX18_INVALID_TASK_HANDLE;
  663. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  664. if (atomic_read(&cx->tot_capturing) == 0) {
  665. set_bit(CX18_F_I_EOS, &cx->i_flags);
  666. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  667. }
  668. return -EINVAL;
  669. }
  670. /* you're live! sit back and await interrupts :) */
  671. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  672. atomic_inc(&cx->ana_capturing);
  673. atomic_inc(&cx->tot_capturing);
  674. return 0;
  675. }
  676. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  677. void cx18_stop_all_captures(struct cx18 *cx)
  678. {
  679. int i;
  680. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  681. struct cx18_stream *s = &cx->streams[i];
  682. if (!cx18_stream_enabled(s))
  683. continue;
  684. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  685. cx18_stop_v4l2_encode_stream(s, 0);
  686. }
  687. }
  688. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  689. {
  690. struct cx18 *cx = s->cx;
  691. unsigned long then;
  692. if (!cx18_stream_enabled(s))
  693. return -EINVAL;
  694. /* This function assumes that you are allowed to stop the capture
  695. and that we are actually capturing */
  696. CX18_DEBUG_INFO("Stop Capture\n");
  697. if (atomic_read(&cx->tot_capturing) == 0)
  698. return 0;
  699. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  700. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  701. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  702. else
  703. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  704. then = jiffies;
  705. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  706. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  707. }
  708. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  709. atomic_dec(&cx->ana_capturing);
  710. atomic_dec(&cx->tot_capturing);
  711. /* Clear capture and no-read bits */
  712. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  713. /* Tell the CX23418 it can't use our buffers anymore */
  714. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  715. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  716. s->handle = CX18_INVALID_TASK_HANDLE;
  717. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  718. if (atomic_read(&cx->tot_capturing) > 0)
  719. return 0;
  720. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  721. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  722. wake_up(&s->waitq);
  723. return 0;
  724. }
  725. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  726. u32 cx18_find_handle(struct cx18 *cx)
  727. {
  728. int i;
  729. /* find first available handle to be used for global settings */
  730. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  731. struct cx18_stream *s = &cx->streams[i];
  732. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  733. return s->handle;
  734. }
  735. return CX18_INVALID_TASK_HANDLE;
  736. }
  737. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  738. {
  739. int i;
  740. struct cx18_stream *s;
  741. if (handle == CX18_INVALID_TASK_HANDLE)
  742. return NULL;
  743. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  744. s = &cx->streams[i];
  745. if (s->handle != handle)
  746. continue;
  747. if (cx18_stream_enabled(s))
  748. return s;
  749. }
  750. return NULL;
  751. }