mantis_hif.c 6.6 KB

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  1. /*
  2. Mantis PCI bridge driver
  3. Copyright (C) Manu Abraham (abraham.manu@gmail.com)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/signal.h>
  18. #include <linux/sched.h>
  19. #include <linux/interrupt.h>
  20. #include "dmxdev.h"
  21. #include "dvbdev.h"
  22. #include "dvb_demux.h"
  23. #include "dvb_frontend.h"
  24. #include "dvb_net.h"
  25. #include "mantis_common.h"
  26. #include "mantis_hif.h"
  27. #include "mantis_link.h" /* temporary due to physical layer stuff */
  28. #include "mantis_reg.h"
  29. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  30. {
  31. struct mantis_pci *mantis = ca->ca_priv;
  32. int rc = 0;
  33. if (wait_event_timeout(ca->hif_opdone_wq,
  34. ca->hif_event & MANTIS_SBUF_OPDONE,
  35. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  36. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  37. rc = -EREMOTEIO;
  38. }
  39. dprintk(MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
  40. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  41. return rc;
  42. }
  43. static int mantis_hif_write_wait(struct mantis_ca *ca)
  44. {
  45. struct mantis_pci *mantis = ca->ca_priv;
  46. u32 opdone = 0, timeout = 0;
  47. int rc = 0;
  48. if (wait_event_timeout(ca->hif_write_wq,
  49. mantis->gpif_status & MANTIS_GPIF_WRACK,
  50. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  51. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
  52. rc = -EREMOTEIO;
  53. }
  54. dprintk(MANTIS_DEBUG, 1, "Write Acknowledged");
  55. mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
  56. while (!opdone) {
  57. opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
  58. udelay(500);
  59. timeout++;
  60. if (timeout > 100) {
  61. dprintk(MANTIS_ERROR, 1, "Adater(%d) Slot(0): Write operation timed out!", mantis->num);
  62. rc = -ETIMEDOUT;
  63. break;
  64. }
  65. }
  66. dprintk(MANTIS_DEBUG, 1, "HIF Write success");
  67. return rc;
  68. }
  69. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  70. {
  71. struct mantis_pci *mantis = ca->ca_priv;
  72. u32 hif_addr = 0, data, count = 4;
  73. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  74. mutex_lock(&ca->ca_lock);
  75. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  76. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  77. hif_addr |= MANTIS_HIF_STATUS;
  78. hif_addr |= addr;
  79. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  80. mmwrite(count, MANTIS_GPIF_BRBYTES);
  81. udelay(20);
  82. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  83. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  84. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  85. mutex_unlock(&ca->ca_lock);
  86. return -EREMOTEIO;
  87. }
  88. data = mmread(MANTIS_GPIF_DIN);
  89. mutex_unlock(&ca->ca_lock);
  90. dprintk(MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
  91. return (data >> 24) & 0xff;
  92. }
  93. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  94. {
  95. struct mantis_slot *slot = ca->slot;
  96. struct mantis_pci *mantis = ca->ca_priv;
  97. u32 hif_addr = 0;
  98. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  99. mutex_lock(&ca->ca_lock);
  100. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  101. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  102. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  103. hif_addr |= MANTIS_HIF_STATUS;
  104. hif_addr |= addr;
  105. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  106. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  107. mmwrite(data, MANTIS_GPIF_DOUT);
  108. if (mantis_hif_write_wait(ca) != 0) {
  109. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  110. mutex_unlock(&ca->ca_lock);
  111. return -EREMOTEIO;
  112. }
  113. dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
  114. mutex_unlock(&ca->ca_lock);
  115. return 0;
  116. }
  117. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  118. {
  119. struct mantis_pci *mantis = ca->ca_priv;
  120. u32 data, hif_addr = 0;
  121. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  122. mutex_lock(&ca->ca_lock);
  123. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  124. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  125. hif_addr |= MANTIS_HIF_STATUS;
  126. hif_addr |= addr;
  127. mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
  128. mmwrite(1, MANTIS_GPIF_BRBYTES);
  129. udelay(20);
  130. mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
  131. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  132. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  133. mutex_unlock(&ca->ca_lock);
  134. return -EREMOTEIO;
  135. }
  136. data = mmread(MANTIS_GPIF_DIN);
  137. dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
  138. udelay(50);
  139. mutex_unlock(&ca->ca_lock);
  140. return (u8) data;
  141. }
  142. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  143. {
  144. struct mantis_pci *mantis = ca->ca_priv;
  145. u32 hif_addr = 0;
  146. dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  147. mutex_lock(&ca->ca_lock);
  148. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  149. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  150. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  151. hif_addr |= MANTIS_HIF_STATUS;
  152. hif_addr |= addr;
  153. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  154. mmwrite(data, MANTIS_GPIF_DOUT);
  155. if (mantis_hif_write_wait(ca) != 0) {
  156. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  157. mutex_unlock(&ca->ca_lock);
  158. return -EREMOTEIO;
  159. }
  160. dprintk(MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
  161. mutex_unlock(&ca->ca_lock);
  162. udelay(50);
  163. return 0;
  164. }
  165. int mantis_hif_init(struct mantis_ca *ca)
  166. {
  167. struct mantis_slot *slot = ca->slot;
  168. struct mantis_pci *mantis = ca->ca_priv;
  169. u32 irqcfg;
  170. slot[0].slave_cfg = 0x70773028;
  171. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  172. mutex_lock(&ca->ca_lock);
  173. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  174. irqcfg = MANTIS_MASK_BRRDY |
  175. MANTIS_MASK_WRACK |
  176. MANTIS_MASK_EXTIRQ |
  177. MANTIS_MASK_WSTO |
  178. MANTIS_MASK_OTHERR |
  179. MANTIS_MASK_OVFLW;
  180. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  181. mutex_unlock(&ca->ca_lock);
  182. return 0;
  183. }
  184. void mantis_hif_exit(struct mantis_ca *ca)
  185. {
  186. struct mantis_pci *mantis = ca->ca_priv;
  187. u32 irqcfg;
  188. dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  189. mutex_lock(&ca->ca_lock);
  190. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  191. irqcfg &= ~MANTIS_MASK_BRRDY;
  192. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  193. mutex_unlock(&ca->ca_lock);
  194. }