mt2131.c 8.2 KB

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  1. /*
  2. * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/dvb/frontend.h>
  24. #include <linux/i2c.h>
  25. #include <linux/slab.h>
  26. #include "dvb_frontend.h"
  27. #include "mt2131.h"
  28. #include "mt2131_priv.h"
  29. static int debug;
  30. module_param(debug, int, 0644);
  31. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  32. #define dprintk(level,fmt, arg...) if (debug >= level) \
  33. printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
  34. static u8 mt2131_config1[] = {
  35. 0x01,
  36. 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
  37. 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
  38. 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
  39. 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
  40. };
  41. static u8 mt2131_config2[] = {
  42. 0x10,
  43. 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
  44. };
  45. static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
  46. {
  47. struct i2c_msg msg[2] = {
  48. { .addr = priv->cfg->i2c_address, .flags = 0,
  49. .buf = &reg, .len = 1 },
  50. { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
  51. .buf = val, .len = 1 },
  52. };
  53. if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  54. printk(KERN_WARNING "mt2131 I2C read failed\n");
  55. return -EREMOTEIO;
  56. }
  57. return 0;
  58. }
  59. static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
  60. {
  61. u8 buf[2] = { reg, val };
  62. struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
  63. .buf = buf, .len = 2 };
  64. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  65. printk(KERN_WARNING "mt2131 I2C write failed\n");
  66. return -EREMOTEIO;
  67. }
  68. return 0;
  69. }
  70. static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
  71. {
  72. struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
  73. .flags = 0, .buf = buf, .len = len };
  74. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  75. printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
  76. (int)len);
  77. return -EREMOTEIO;
  78. }
  79. return 0;
  80. }
  81. static int mt2131_set_params(struct dvb_frontend *fe,
  82. struct dvb_frontend_parameters *params)
  83. {
  84. struct mt2131_priv *priv;
  85. int ret=0, i;
  86. u32 freq;
  87. u8 if_band_center;
  88. u32 f_lo1, f_lo2;
  89. u32 div1, num1, div2, num2;
  90. u8 b[8];
  91. u8 lockval = 0;
  92. priv = fe->tuner_priv;
  93. if (fe->ops.info.type == FE_OFDM)
  94. priv->bandwidth = params->u.ofdm.bandwidth;
  95. else
  96. priv->bandwidth = 0;
  97. freq = params->frequency / 1000; // Hz -> kHz
  98. dprintk(1, "%s() freq=%d\n", __func__, freq);
  99. f_lo1 = freq + MT2131_IF1 * 1000;
  100. f_lo1 = (f_lo1 / 250) * 250;
  101. f_lo2 = f_lo1 - freq - MT2131_IF2;
  102. priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
  103. /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
  104. num1 = f_lo1 * 64 / (MT2131_FREF / 128);
  105. div1 = num1 / 8192;
  106. num1 &= 0x1fff;
  107. /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
  108. num2 = f_lo2 * 64 / (MT2131_FREF / 128);
  109. div2 = num2 / 8192;
  110. num2 &= 0x1fff;
  111. if (freq <= 82500) if_band_center = 0x00; else
  112. if (freq <= 137500) if_band_center = 0x01; else
  113. if (freq <= 192500) if_band_center = 0x02; else
  114. if (freq <= 247500) if_band_center = 0x03; else
  115. if (freq <= 302500) if_band_center = 0x04; else
  116. if (freq <= 357500) if_band_center = 0x05; else
  117. if (freq <= 412500) if_band_center = 0x06; else
  118. if (freq <= 467500) if_band_center = 0x07; else
  119. if (freq <= 522500) if_band_center = 0x08; else
  120. if (freq <= 577500) if_band_center = 0x09; else
  121. if (freq <= 632500) if_band_center = 0x0A; else
  122. if (freq <= 687500) if_band_center = 0x0B; else
  123. if (freq <= 742500) if_band_center = 0x0C; else
  124. if (freq <= 797500) if_band_center = 0x0D; else
  125. if (freq <= 852500) if_band_center = 0x0E; else
  126. if (freq <= 907500) if_band_center = 0x0F; else
  127. if (freq <= 962500) if_band_center = 0x10; else
  128. if (freq <= 1017500) if_band_center = 0x11; else
  129. if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
  130. b[0] = 1;
  131. b[1] = (num1 >> 5) & 0xFF;
  132. b[2] = (num1 & 0x1F);
  133. b[3] = div1;
  134. b[4] = (num2 >> 5) & 0xFF;
  135. b[5] = num2 & 0x1F;
  136. b[6] = div2;
  137. dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
  138. dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
  139. dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
  140. dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
  141. (int)div1, (int)num1, (int)div2, (int)num2);
  142. dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
  143. (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
  144. (int)b[6]);
  145. ret = mt2131_writeregs(priv,b,7);
  146. if (ret < 0)
  147. return ret;
  148. mt2131_writereg(priv, 0x0b, if_band_center);
  149. /* Wait for lock */
  150. i = 0;
  151. do {
  152. mt2131_readreg(priv, 0x08, &lockval);
  153. if ((lockval & 0x88) == 0x88)
  154. break;
  155. msleep(4);
  156. i++;
  157. } while (i < 10);
  158. return ret;
  159. }
  160. static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  161. {
  162. struct mt2131_priv *priv = fe->tuner_priv;
  163. dprintk(1, "%s()\n", __func__);
  164. *frequency = priv->frequency;
  165. return 0;
  166. }
  167. static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  168. {
  169. struct mt2131_priv *priv = fe->tuner_priv;
  170. dprintk(1, "%s()\n", __func__);
  171. *bandwidth = priv->bandwidth;
  172. return 0;
  173. }
  174. static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
  175. {
  176. struct mt2131_priv *priv = fe->tuner_priv;
  177. u8 lock_status = 0;
  178. u8 afc_status = 0;
  179. *status = 0;
  180. mt2131_readreg(priv, 0x08, &lock_status);
  181. if ((lock_status & 0x88) == 0x88)
  182. *status = TUNER_STATUS_LOCKED;
  183. mt2131_readreg(priv, 0x09, &afc_status);
  184. dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
  185. __func__, lock_status, afc_status);
  186. return 0;
  187. }
  188. static int mt2131_init(struct dvb_frontend *fe)
  189. {
  190. struct mt2131_priv *priv = fe->tuner_priv;
  191. int ret;
  192. dprintk(1, "%s()\n", __func__);
  193. if ((ret = mt2131_writeregs(priv, mt2131_config1,
  194. sizeof(mt2131_config1))) < 0)
  195. return ret;
  196. mt2131_writereg(priv, 0x0b, 0x09);
  197. mt2131_writereg(priv, 0x15, 0x47);
  198. mt2131_writereg(priv, 0x07, 0xf2);
  199. mt2131_writereg(priv, 0x0b, 0x01);
  200. if ((ret = mt2131_writeregs(priv, mt2131_config2,
  201. sizeof(mt2131_config2))) < 0)
  202. return ret;
  203. return ret;
  204. }
  205. static int mt2131_release(struct dvb_frontend *fe)
  206. {
  207. dprintk(1, "%s()\n", __func__);
  208. kfree(fe->tuner_priv);
  209. fe->tuner_priv = NULL;
  210. return 0;
  211. }
  212. static const struct dvb_tuner_ops mt2131_tuner_ops = {
  213. .info = {
  214. .name = "Microtune MT2131",
  215. .frequency_min = 48000000,
  216. .frequency_max = 860000000,
  217. .frequency_step = 50000,
  218. },
  219. .release = mt2131_release,
  220. .init = mt2131_init,
  221. .set_params = mt2131_set_params,
  222. .get_frequency = mt2131_get_frequency,
  223. .get_bandwidth = mt2131_get_bandwidth,
  224. .get_status = mt2131_get_status
  225. };
  226. struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
  227. struct i2c_adapter *i2c,
  228. struct mt2131_config *cfg, u16 if1)
  229. {
  230. struct mt2131_priv *priv = NULL;
  231. u8 id = 0;
  232. dprintk(1, "%s()\n", __func__);
  233. priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
  234. if (priv == NULL)
  235. return NULL;
  236. priv->cfg = cfg;
  237. priv->bandwidth = 6000000; /* 6MHz */
  238. priv->i2c = i2c;
  239. if (mt2131_readreg(priv, 0, &id) != 0) {
  240. kfree(priv);
  241. return NULL;
  242. }
  243. if ( (id != 0x3E) && (id != 0x3F) ) {
  244. printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
  245. cfg->i2c_address);
  246. kfree(priv);
  247. return NULL;
  248. }
  249. printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
  250. cfg->i2c_address);
  251. memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
  252. sizeof(struct dvb_tuner_ops));
  253. fe->tuner_priv = priv;
  254. return fe;
  255. }
  256. EXPORT_SYMBOL(mt2131_attach);
  257. MODULE_AUTHOR("Steven Toth");
  258. MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
  259. MODULE_LICENSE("GPL");
  260. /*
  261. * Local variables:
  262. * c-basic-offset: 8
  263. */