w83795.c 62 KB

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  1. /*
  2. * w83795.c - Linux kernel driver for hardware monitoring
  3. * Copyright (C) 2008 Nuvoton Technology Corp.
  4. * Wei Song
  5. * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation - version 2.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19. * 02110-1301 USA.
  20. *
  21. * Supports following chips:
  22. *
  23. * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
  24. * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
  25. * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/slab.h>
  31. #include <linux/i2c.h>
  32. #include <linux/hwmon.h>
  33. #include <linux/hwmon-sysfs.h>
  34. #include <linux/err.h>
  35. #include <linux/mutex.h>
  36. #include <linux/delay.h>
  37. /* Addresses to scan */
  38. static const unsigned short normal_i2c[] = {
  39. 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
  40. };
  41. static int reset;
  42. module_param(reset, bool, 0);
  43. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  44. #define W83795_REG_BANKSEL 0x00
  45. #define W83795_REG_VENDORID 0xfd
  46. #define W83795_REG_CHIPID 0xfe
  47. #define W83795_REG_DEVICEID 0xfb
  48. #define W83795_REG_DEVICEID_A 0xff
  49. #define W83795_REG_I2C_ADDR 0xfc
  50. #define W83795_REG_CONFIG 0x01
  51. #define W83795_REG_CONFIG_CONFIG48 0x04
  52. #define W83795_REG_CONFIG_START 0x01
  53. /* Multi-Function Pin Ctrl Registers */
  54. #define W83795_REG_VOLT_CTRL1 0x02
  55. #define W83795_REG_VOLT_CTRL2 0x03
  56. #define W83795_REG_TEMP_CTRL1 0x04
  57. #define W83795_REG_TEMP_CTRL2 0x05
  58. #define W83795_REG_FANIN_CTRL1 0x06
  59. #define W83795_REG_FANIN_CTRL2 0x07
  60. #define W83795_REG_VMIGB_CTRL 0x08
  61. #define TEMP_READ 0
  62. #define TEMP_CRIT 1
  63. #define TEMP_CRIT_HYST 2
  64. #define TEMP_WARN 3
  65. #define TEMP_WARN_HYST 4
  66. /* only crit and crit_hyst affect real-time alarm status
  67. * current crit crit_hyst warn warn_hyst */
  68. static const u16 W83795_REG_TEMP[][5] = {
  69. {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
  70. {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
  71. {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
  72. {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
  73. {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
  74. {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
  75. };
  76. #define IN_READ 0
  77. #define IN_MAX 1
  78. #define IN_LOW 2
  79. static const u16 W83795_REG_IN[][3] = {
  80. /* Current, HL, LL */
  81. {0x10, 0x70, 0x71}, /* VSEN1 */
  82. {0x11, 0x72, 0x73}, /* VSEN2 */
  83. {0x12, 0x74, 0x75}, /* VSEN3 */
  84. {0x13, 0x76, 0x77}, /* VSEN4 */
  85. {0x14, 0x78, 0x79}, /* VSEN5 */
  86. {0x15, 0x7a, 0x7b}, /* VSEN6 */
  87. {0x16, 0x7c, 0x7d}, /* VSEN7 */
  88. {0x17, 0x7e, 0x7f}, /* VSEN8 */
  89. {0x18, 0x80, 0x81}, /* VSEN9 */
  90. {0x19, 0x82, 0x83}, /* VSEN10 */
  91. {0x1A, 0x84, 0x85}, /* VSEN11 */
  92. {0x1B, 0x86, 0x87}, /* VTT */
  93. {0x1C, 0x88, 0x89}, /* 3VDD */
  94. {0x1D, 0x8a, 0x8b}, /* 3VSB */
  95. {0x1E, 0x8c, 0x8d}, /* VBAT */
  96. {0x1F, 0xa6, 0xa7}, /* VSEN12 */
  97. {0x20, 0xaa, 0xab}, /* VSEN13 */
  98. {0x21, 0x96, 0x97}, /* VSEN14 */
  99. {0x22, 0x9a, 0x9b}, /* VSEN15 */
  100. {0x23, 0x9e, 0x9f}, /* VSEN16 */
  101. {0x24, 0xa2, 0xa3}, /* VSEN17 */
  102. };
  103. #define W83795_REG_VRLSB 0x3C
  104. static const u8 W83795_REG_IN_HL_LSB[] = {
  105. 0x8e, /* VSEN1-4 */
  106. 0x90, /* VSEN5-8 */
  107. 0x92, /* VSEN9-11 */
  108. 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
  109. 0xa8, /* VSEN12 */
  110. 0xac, /* VSEN13 */
  111. 0x98, /* VSEN14 */
  112. 0x9c, /* VSEN15 */
  113. 0xa0, /* VSEN16 */
  114. 0xa4, /* VSEN17 */
  115. };
  116. #define IN_LSB_REG(index, type) \
  117. (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
  118. : (W83795_REG_IN_HL_LSB[(index)] + 1))
  119. #define IN_LSB_SHIFT 0
  120. #define IN_LSB_IDX 1
  121. static const u8 IN_LSB_SHIFT_IDX[][2] = {
  122. /* High/Low LSB shift, LSB No. */
  123. {0x00, 0x00}, /* VSEN1 */
  124. {0x02, 0x00}, /* VSEN2 */
  125. {0x04, 0x00}, /* VSEN3 */
  126. {0x06, 0x00}, /* VSEN4 */
  127. {0x00, 0x01}, /* VSEN5 */
  128. {0x02, 0x01}, /* VSEN6 */
  129. {0x04, 0x01}, /* VSEN7 */
  130. {0x06, 0x01}, /* VSEN8 */
  131. {0x00, 0x02}, /* VSEN9 */
  132. {0x02, 0x02}, /* VSEN10 */
  133. {0x04, 0x02}, /* VSEN11 */
  134. {0x00, 0x03}, /* VTT */
  135. {0x02, 0x03}, /* 3VDD */
  136. {0x04, 0x03}, /* 3VSB */
  137. {0x06, 0x03}, /* VBAT */
  138. {0x06, 0x04}, /* VSEN12 */
  139. {0x06, 0x05}, /* VSEN13 */
  140. {0x06, 0x06}, /* VSEN14 */
  141. {0x06, 0x07}, /* VSEN15 */
  142. {0x06, 0x08}, /* VSEN16 */
  143. {0x06, 0x09}, /* VSEN17 */
  144. };
  145. #define W83795_REG_FAN(index) (0x2E + (index))
  146. #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
  147. #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
  148. #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
  149. (((index) & 1) ? 4 : 0)
  150. #define W83795_REG_VID_CTRL 0x6A
  151. #define W83795_REG_ALARM_CTRL 0x40
  152. #define ALARM_CTRL_RTSACS (1 << 7)
  153. #define W83795_REG_ALARM(index) (0x41 + (index))
  154. #define W83795_REG_CLR_CHASSIS 0x4D
  155. #define W83795_REG_BEEP(index) (0x50 + (index))
  156. #define W83795_REG_OVT_CFG 0x58
  157. #define OVT_CFG_SEL (1 << 7)
  158. #define W83795_REG_FCMS1 0x201
  159. #define W83795_REG_FCMS2 0x208
  160. #define W83795_REG_TFMR(index) (0x202 + (index))
  161. #define W83795_REG_FOMC 0x20F
  162. #define W83795_REG_TSS(index) (0x209 + (index))
  163. #define TSS_MAP_RESERVED 0xff
  164. static const u8 tss_map[4][6] = {
  165. { 0, 1, 2, 3, 4, 5},
  166. { 6, 7, 8, 9, 0, 1},
  167. {10, 11, 12, 13, 2, 3},
  168. { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
  169. };
  170. #define PWM_OUTPUT 0
  171. #define PWM_FREQ 1
  172. #define PWM_START 2
  173. #define PWM_NONSTOP 3
  174. #define PWM_STOP_TIME 4
  175. #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
  176. #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
  177. #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
  178. #define W83795_REG_TFTS 0x250
  179. #define TEMP_PWM_TTTI 0
  180. #define TEMP_PWM_CTFS 1
  181. #define TEMP_PWM_HCT 2
  182. #define TEMP_PWM_HOT 3
  183. #define W83795_REG_TTTI(index) (0x260 + (index))
  184. #define W83795_REG_CTFS(index) (0x268 + (index))
  185. #define W83795_REG_HT(index) (0x270 + (index))
  186. #define SF4_TEMP 0
  187. #define SF4_PWM 1
  188. #define W83795_REG_SF4_TEMP(temp_num, index) \
  189. (0x280 + 0x10 * (temp_num) + (index))
  190. #define W83795_REG_SF4_PWM(temp_num, index) \
  191. (0x288 + 0x10 * (temp_num) + (index))
  192. #define W83795_REG_DTSC 0x301
  193. #define W83795_REG_DTSE 0x302
  194. #define W83795_REG_DTS(index) (0x26 + (index))
  195. #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
  196. #define DTS_CRIT 0
  197. #define DTS_CRIT_HYST 1
  198. #define DTS_WARN 2
  199. #define DTS_WARN_HYST 3
  200. #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
  201. #define SETUP_PWM_DEFAULT 0
  202. #define SETUP_PWM_UPTIME 1
  203. #define SETUP_PWM_DOWNTIME 2
  204. #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
  205. static inline u16 in_from_reg(u8 index, u16 val)
  206. {
  207. /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
  208. if (index >= 12 && index <= 14)
  209. return val * 6;
  210. else
  211. return val * 2;
  212. }
  213. static inline u16 in_to_reg(u8 index, u16 val)
  214. {
  215. if (index >= 12 && index <= 14)
  216. return val / 6;
  217. else
  218. return val / 2;
  219. }
  220. static inline unsigned long fan_from_reg(u16 val)
  221. {
  222. if ((val == 0xfff) || (val == 0))
  223. return 0;
  224. return 1350000UL / val;
  225. }
  226. static inline u16 fan_to_reg(long rpm)
  227. {
  228. if (rpm <= 0)
  229. return 0x0fff;
  230. return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  231. }
  232. static inline unsigned long time_from_reg(u8 reg)
  233. {
  234. return reg * 100;
  235. }
  236. static inline u8 time_to_reg(unsigned long val)
  237. {
  238. return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
  239. }
  240. static inline long temp_from_reg(s8 reg)
  241. {
  242. return reg * 1000;
  243. }
  244. static inline s8 temp_to_reg(long val, s8 min, s8 max)
  245. {
  246. return SENSORS_LIMIT(val / 1000, min, max);
  247. }
  248. static const u16 pwm_freq_cksel0[16] = {
  249. 1024, 512, 341, 256, 205, 171, 146, 128,
  250. 85, 64, 32, 16, 8, 4, 2, 1
  251. };
  252. static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
  253. {
  254. unsigned long base_clock;
  255. if (reg & 0x80) {
  256. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  257. return base_clock / ((reg & 0x7f) + 1);
  258. } else
  259. return pwm_freq_cksel0[reg & 0x0f];
  260. }
  261. static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
  262. {
  263. unsigned long base_clock;
  264. u8 reg0, reg1;
  265. unsigned long best0, best1;
  266. /* Best fit for cksel = 0 */
  267. for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
  268. if (val > (pwm_freq_cksel0[reg0] +
  269. pwm_freq_cksel0[reg0 + 1]) / 2)
  270. break;
  271. }
  272. if (val < 375) /* cksel = 1 can't beat this */
  273. return reg0;
  274. best0 = pwm_freq_cksel0[reg0];
  275. /* Best fit for cksel = 1 */
  276. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  277. reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
  278. best1 = base_clock / reg1;
  279. reg1 = 0x80 | (reg1 - 1);
  280. /* Choose the closest one */
  281. if (abs(val - best0) > abs(val - best1))
  282. return reg1;
  283. else
  284. return reg0;
  285. }
  286. enum chip_types {w83795g, w83795adg};
  287. struct w83795_data {
  288. struct device *hwmon_dev;
  289. struct mutex update_lock;
  290. unsigned long last_updated; /* In jiffies */
  291. enum chip_types chip_type;
  292. u8 bank;
  293. u32 has_in; /* Enable monitor VIN or not */
  294. u8 has_dyn_in; /* Only in2-0 can have this */
  295. u16 in[21][3]; /* Register value, read/high/low */
  296. u8 in_lsb[10][3]; /* LSB Register value, high/low */
  297. u8 has_gain; /* has gain: in17-20 * 8 */
  298. u16 has_fan; /* Enable fan14-1 or not */
  299. u16 fan[14]; /* Register value combine */
  300. u16 fan_min[14]; /* Register value combine */
  301. u8 has_temp; /* Enable monitor temp6-1 or not */
  302. s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
  303. u8 temp_read_vrlsb[6];
  304. u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
  305. u8 temp_src[3]; /* Register value */
  306. u8 enable_dts; /* Enable PECI and SB-TSI,
  307. * bit 0: =1 enable, =0 disable,
  308. * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
  309. u8 has_dts; /* Enable monitor DTS temp */
  310. s8 dts[8]; /* Register value */
  311. u8 dts_read_vrlsb[8]; /* Register value */
  312. s8 dts_ext[4]; /* Register value */
  313. u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
  314. * no config register, only affected by chip
  315. * type */
  316. u8 pwm[8][5]; /* Register value, output, freq, start,
  317. * non stop, stop time */
  318. u16 clkin; /* CLKIN frequency in kHz */
  319. u8 pwm_fcms[2]; /* Register value */
  320. u8 pwm_tfmr[6]; /* Register value */
  321. u8 pwm_fomc; /* Register value */
  322. u16 target_speed[8]; /* Register value, target speed for speed
  323. * cruise */
  324. u8 tol_speed; /* tolerance of target speed */
  325. u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
  326. u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
  327. u8 setup_pwm[3]; /* Register value */
  328. u8 alarms[6]; /* Register value */
  329. u8 enable_beep;
  330. u8 beeps[6]; /* Register value */
  331. char valid;
  332. char valid_limits;
  333. char valid_pwm_config;
  334. };
  335. /*
  336. * Hardware access
  337. * We assume that nobdody can change the bank outside the driver.
  338. */
  339. /* Must be called with data->update_lock held, except during initialization */
  340. static int w83795_set_bank(struct i2c_client *client, u8 bank)
  341. {
  342. struct w83795_data *data = i2c_get_clientdata(client);
  343. int err;
  344. /* If the same bank is already set, nothing to do */
  345. if ((data->bank & 0x07) == bank)
  346. return 0;
  347. /* Change to new bank, preserve all other bits */
  348. bank |= data->bank & ~0x07;
  349. err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
  350. if (err < 0) {
  351. dev_err(&client->dev,
  352. "Failed to set bank to %d, err %d\n",
  353. (int)bank, err);
  354. return err;
  355. }
  356. data->bank = bank;
  357. return 0;
  358. }
  359. /* Must be called with data->update_lock held, except during initialization */
  360. static u8 w83795_read(struct i2c_client *client, u16 reg)
  361. {
  362. int err;
  363. err = w83795_set_bank(client, reg >> 8);
  364. if (err < 0)
  365. return 0x00; /* Arbitrary */
  366. err = i2c_smbus_read_byte_data(client, reg & 0xff);
  367. if (err < 0) {
  368. dev_err(&client->dev,
  369. "Failed to read from register 0x%03x, err %d\n",
  370. (int)reg, err);
  371. return 0x00; /* Arbitrary */
  372. }
  373. return err;
  374. }
  375. /* Must be called with data->update_lock held, except during initialization */
  376. static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
  377. {
  378. int err;
  379. err = w83795_set_bank(client, reg >> 8);
  380. if (err < 0)
  381. return err;
  382. err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  383. if (err < 0)
  384. dev_err(&client->dev,
  385. "Failed to write to register 0x%03x, err %d\n",
  386. (int)reg, err);
  387. return err;
  388. }
  389. static void w83795_update_limits(struct i2c_client *client)
  390. {
  391. struct w83795_data *data = i2c_get_clientdata(client);
  392. int i, limit;
  393. u8 lsb;
  394. /* Read the voltage limits */
  395. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  396. if (!(data->has_in & (1 << i)))
  397. continue;
  398. data->in[i][IN_MAX] =
  399. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  400. data->in[i][IN_LOW] =
  401. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  402. }
  403. for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
  404. if ((i == 2 && data->chip_type == w83795adg) ||
  405. (i >= 4 && !(data->has_in & (1 << (i + 11)))))
  406. continue;
  407. data->in_lsb[i][IN_MAX] =
  408. w83795_read(client, IN_LSB_REG(i, IN_MAX));
  409. data->in_lsb[i][IN_LOW] =
  410. w83795_read(client, IN_LSB_REG(i, IN_LOW));
  411. }
  412. /* Read the fan limits */
  413. lsb = 0; /* Silent false gcc warning */
  414. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  415. /* Each register contains LSB for 2 fans, but we want to
  416. * read it only once to save time */
  417. if ((i & 1) == 0 && (data->has_fan & (3 << i)))
  418. lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
  419. if (!(data->has_fan & (1 << i)))
  420. continue;
  421. data->fan_min[i] =
  422. w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
  423. data->fan_min[i] |=
  424. (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
  425. }
  426. /* Read the temperature limits */
  427. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  428. if (!(data->has_temp & (1 << i)))
  429. continue;
  430. for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
  431. data->temp[i][limit] =
  432. w83795_read(client, W83795_REG_TEMP[i][limit]);
  433. }
  434. /* Read the DTS limits */
  435. if (data->enable_dts) {
  436. for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
  437. data->dts_ext[limit] =
  438. w83795_read(client, W83795_REG_DTS_EXT(limit));
  439. }
  440. /* Read beep settings */
  441. if (data->enable_beep) {
  442. for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
  443. data->beeps[i] =
  444. w83795_read(client, W83795_REG_BEEP(i));
  445. }
  446. data->valid_limits = 1;
  447. }
  448. static struct w83795_data *w83795_update_pwm_config(struct device *dev)
  449. {
  450. struct i2c_client *client = to_i2c_client(dev);
  451. struct w83795_data *data = i2c_get_clientdata(client);
  452. int i, tmp;
  453. mutex_lock(&data->update_lock);
  454. if (data->valid_pwm_config)
  455. goto END;
  456. /* Read temperature source selection */
  457. for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
  458. data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
  459. /* Read automatic fan speed control settings */
  460. data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
  461. data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
  462. for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
  463. data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
  464. data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
  465. for (i = 0; i < data->has_pwm; i++) {
  466. for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
  467. data->pwm[i][tmp] =
  468. w83795_read(client, W83795_REG_PWM(i, tmp));
  469. }
  470. for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
  471. data->target_speed[i] =
  472. w83795_read(client, W83795_REG_FTSH(i)) << 4;
  473. data->target_speed[i] |=
  474. w83795_read(client, W83795_REG_FTSL(i)) >> 4;
  475. }
  476. data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
  477. for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
  478. data->pwm_temp[i][TEMP_PWM_TTTI] =
  479. w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
  480. data->pwm_temp[i][TEMP_PWM_CTFS] =
  481. w83795_read(client, W83795_REG_CTFS(i));
  482. tmp = w83795_read(client, W83795_REG_HT(i));
  483. data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
  484. data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
  485. }
  486. /* Read SmartFanIV trip points */
  487. for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
  488. for (tmp = 0; tmp < 7; tmp++) {
  489. data->sf4_reg[i][SF4_TEMP][tmp] =
  490. w83795_read(client,
  491. W83795_REG_SF4_TEMP(i, tmp));
  492. data->sf4_reg[i][SF4_PWM][tmp] =
  493. w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
  494. }
  495. }
  496. /* Read setup PWM */
  497. for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
  498. data->setup_pwm[i] =
  499. w83795_read(client, W83795_REG_SETUP_PWM(i));
  500. data->valid_pwm_config = 1;
  501. END:
  502. mutex_unlock(&data->update_lock);
  503. return data;
  504. }
  505. static struct w83795_data *w83795_update_device(struct device *dev)
  506. {
  507. struct i2c_client *client = to_i2c_client(dev);
  508. struct w83795_data *data = i2c_get_clientdata(client);
  509. u16 tmp;
  510. u8 intrusion;
  511. int i;
  512. mutex_lock(&data->update_lock);
  513. if (!data->valid_limits)
  514. w83795_update_limits(client);
  515. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  516. || !data->valid))
  517. goto END;
  518. /* Update the voltages value */
  519. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  520. if (!(data->has_in & (1 << i)))
  521. continue;
  522. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  523. tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
  524. data->in[i][IN_READ] = tmp;
  525. }
  526. /* in0-2 can have dynamic limits (W83795G only) */
  527. if (data->has_dyn_in) {
  528. u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
  529. u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
  530. for (i = 0; i < 3; i++) {
  531. if (!(data->has_dyn_in & (1 << i)))
  532. continue;
  533. data->in[i][IN_MAX] =
  534. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  535. data->in[i][IN_LOW] =
  536. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  537. data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
  538. data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
  539. }
  540. }
  541. /* Update fan */
  542. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  543. if (!(data->has_fan & (1 << i)))
  544. continue;
  545. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  546. data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
  547. }
  548. /* Update temperature */
  549. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  550. data->temp[i][TEMP_READ] =
  551. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  552. data->temp_read_vrlsb[i] =
  553. w83795_read(client, W83795_REG_VRLSB);
  554. }
  555. /* Update dts temperature */
  556. if (data->enable_dts) {
  557. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  558. if (!(data->has_dts & (1 << i)))
  559. continue;
  560. data->dts[i] =
  561. w83795_read(client, W83795_REG_DTS(i));
  562. data->dts_read_vrlsb[i] =
  563. w83795_read(client, W83795_REG_VRLSB);
  564. }
  565. }
  566. /* Update pwm output */
  567. for (i = 0; i < data->has_pwm; i++) {
  568. data->pwm[i][PWM_OUTPUT] =
  569. w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
  570. }
  571. /* Update intrusion and alarms
  572. * It is important to read intrusion first, because reading from
  573. * register SMI STS6 clears the interrupt status temporarily. */
  574. tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
  575. /* Switch to interrupt status for intrusion if needed */
  576. if (tmp & ALARM_CTRL_RTSACS)
  577. w83795_write(client, W83795_REG_ALARM_CTRL,
  578. tmp & ~ALARM_CTRL_RTSACS);
  579. intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
  580. /* Switch to real-time alarms */
  581. w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
  582. for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
  583. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  584. data->alarms[5] |= intrusion;
  585. /* Restore original configuration if needed */
  586. if (!(tmp & ALARM_CTRL_RTSACS))
  587. w83795_write(client, W83795_REG_ALARM_CTRL,
  588. tmp & ~ALARM_CTRL_RTSACS);
  589. data->last_updated = jiffies;
  590. data->valid = 1;
  591. END:
  592. mutex_unlock(&data->update_lock);
  593. return data;
  594. }
  595. /*
  596. * Sysfs attributes
  597. */
  598. #define ALARM_STATUS 0
  599. #define BEEP_ENABLE 1
  600. static ssize_t
  601. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  602. {
  603. struct w83795_data *data = w83795_update_device(dev);
  604. struct sensor_device_attribute_2 *sensor_attr =
  605. to_sensor_dev_attr_2(attr);
  606. int nr = sensor_attr->nr;
  607. int index = sensor_attr->index >> 3;
  608. int bit = sensor_attr->index & 0x07;
  609. u8 val;
  610. if (nr == ALARM_STATUS)
  611. val = (data->alarms[index] >> bit) & 1;
  612. else /* BEEP_ENABLE */
  613. val = (data->beeps[index] >> bit) & 1;
  614. return sprintf(buf, "%u\n", val);
  615. }
  616. static ssize_t
  617. store_beep(struct device *dev, struct device_attribute *attr,
  618. const char *buf, size_t count)
  619. {
  620. struct i2c_client *client = to_i2c_client(dev);
  621. struct w83795_data *data = i2c_get_clientdata(client);
  622. struct sensor_device_attribute_2 *sensor_attr =
  623. to_sensor_dev_attr_2(attr);
  624. int index = sensor_attr->index >> 3;
  625. int shift = sensor_attr->index & 0x07;
  626. u8 beep_bit = 1 << shift;
  627. unsigned long val;
  628. if (strict_strtoul(buf, 10, &val) < 0)
  629. return -EINVAL;
  630. if (val != 0 && val != 1)
  631. return -EINVAL;
  632. mutex_lock(&data->update_lock);
  633. data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
  634. data->beeps[index] &= ~beep_bit;
  635. data->beeps[index] |= val << shift;
  636. w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
  637. mutex_unlock(&data->update_lock);
  638. return count;
  639. }
  640. /* Write 0 to clear chassis alarm */
  641. static ssize_t
  642. store_chassis_clear(struct device *dev,
  643. struct device_attribute *attr, const char *buf,
  644. size_t count)
  645. {
  646. struct i2c_client *client = to_i2c_client(dev);
  647. struct w83795_data *data = i2c_get_clientdata(client);
  648. unsigned long val;
  649. if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
  650. return -EINVAL;
  651. mutex_lock(&data->update_lock);
  652. val = w83795_read(client, W83795_REG_CLR_CHASSIS);
  653. val |= 0x80;
  654. w83795_write(client, W83795_REG_CLR_CHASSIS, val);
  655. /* Clear status and force cache refresh */
  656. w83795_read(client, W83795_REG_ALARM(5));
  657. data->valid = 0;
  658. mutex_unlock(&data->update_lock);
  659. return count;
  660. }
  661. #define FAN_INPUT 0
  662. #define FAN_MIN 1
  663. static ssize_t
  664. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  665. {
  666. struct sensor_device_attribute_2 *sensor_attr =
  667. to_sensor_dev_attr_2(attr);
  668. int nr = sensor_attr->nr;
  669. int index = sensor_attr->index;
  670. struct w83795_data *data = w83795_update_device(dev);
  671. u16 val;
  672. if (nr == FAN_INPUT)
  673. val = data->fan[index] & 0x0fff;
  674. else
  675. val = data->fan_min[index] & 0x0fff;
  676. return sprintf(buf, "%lu\n", fan_from_reg(val));
  677. }
  678. static ssize_t
  679. store_fan_min(struct device *dev, struct device_attribute *attr,
  680. const char *buf, size_t count)
  681. {
  682. struct sensor_device_attribute_2 *sensor_attr =
  683. to_sensor_dev_attr_2(attr);
  684. int index = sensor_attr->index;
  685. struct i2c_client *client = to_i2c_client(dev);
  686. struct w83795_data *data = i2c_get_clientdata(client);
  687. unsigned long val;
  688. if (strict_strtoul(buf, 10, &val))
  689. return -EINVAL;
  690. val = fan_to_reg(val);
  691. mutex_lock(&data->update_lock);
  692. data->fan_min[index] = val;
  693. w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
  694. val &= 0x0f;
  695. if (index & 1) {
  696. val <<= 4;
  697. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  698. & 0x0f;
  699. } else {
  700. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  701. & 0xf0;
  702. }
  703. w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
  704. mutex_unlock(&data->update_lock);
  705. return count;
  706. }
  707. static ssize_t
  708. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  709. {
  710. struct w83795_data *data;
  711. struct sensor_device_attribute_2 *sensor_attr =
  712. to_sensor_dev_attr_2(attr);
  713. int nr = sensor_attr->nr;
  714. int index = sensor_attr->index;
  715. unsigned int val;
  716. data = nr == PWM_OUTPUT ? w83795_update_device(dev)
  717. : w83795_update_pwm_config(dev);
  718. switch (nr) {
  719. case PWM_STOP_TIME:
  720. val = time_from_reg(data->pwm[index][nr]);
  721. break;
  722. case PWM_FREQ:
  723. val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
  724. break;
  725. default:
  726. val = data->pwm[index][nr];
  727. break;
  728. }
  729. return sprintf(buf, "%u\n", val);
  730. }
  731. static ssize_t
  732. store_pwm(struct device *dev, struct device_attribute *attr,
  733. const char *buf, size_t count)
  734. {
  735. struct i2c_client *client = to_i2c_client(dev);
  736. struct w83795_data *data = i2c_get_clientdata(client);
  737. struct sensor_device_attribute_2 *sensor_attr =
  738. to_sensor_dev_attr_2(attr);
  739. int nr = sensor_attr->nr;
  740. int index = sensor_attr->index;
  741. unsigned long val;
  742. if (strict_strtoul(buf, 10, &val) < 0)
  743. return -EINVAL;
  744. mutex_lock(&data->update_lock);
  745. switch (nr) {
  746. case PWM_STOP_TIME:
  747. val = time_to_reg(val);
  748. break;
  749. case PWM_FREQ:
  750. val = pwm_freq_to_reg(val, data->clkin);
  751. break;
  752. default:
  753. val = SENSORS_LIMIT(val, 0, 0xff);
  754. break;
  755. }
  756. w83795_write(client, W83795_REG_PWM(index, nr), val);
  757. data->pwm[index][nr] = val;
  758. mutex_unlock(&data->update_lock);
  759. return count;
  760. }
  761. static ssize_t
  762. show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
  763. {
  764. struct sensor_device_attribute_2 *sensor_attr =
  765. to_sensor_dev_attr_2(attr);
  766. struct w83795_data *data = w83795_update_pwm_config(dev);
  767. int index = sensor_attr->index;
  768. u8 tmp;
  769. /* Speed cruise mode */
  770. if (data->pwm_fcms[0] & (1 << index)) {
  771. tmp = 2;
  772. goto out;
  773. }
  774. /* Thermal cruise or SmartFan IV mode */
  775. for (tmp = 0; tmp < 6; tmp++) {
  776. if (data->pwm_tfmr[tmp] & (1 << index)) {
  777. tmp = 3;
  778. goto out;
  779. }
  780. }
  781. /* Manual mode */
  782. tmp = 1;
  783. out:
  784. return sprintf(buf, "%u\n", tmp);
  785. }
  786. static ssize_t
  787. store_pwm_enable(struct device *dev, struct device_attribute *attr,
  788. const char *buf, size_t count)
  789. {
  790. struct i2c_client *client = to_i2c_client(dev);
  791. struct w83795_data *data = w83795_update_pwm_config(dev);
  792. struct sensor_device_attribute_2 *sensor_attr =
  793. to_sensor_dev_attr_2(attr);
  794. int index = sensor_attr->index;
  795. unsigned long val;
  796. int i;
  797. if (strict_strtoul(buf, 10, &val) < 0)
  798. return -EINVAL;
  799. if (val < 1 || val > 2)
  800. return -EINVAL;
  801. mutex_lock(&data->update_lock);
  802. switch (val) {
  803. case 1:
  804. /* Clear speed cruise mode bits */
  805. data->pwm_fcms[0] &= ~(1 << index);
  806. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  807. /* Clear thermal cruise mode bits */
  808. for (i = 0; i < 6; i++) {
  809. data->pwm_tfmr[i] &= ~(1 << index);
  810. w83795_write(client, W83795_REG_TFMR(i),
  811. data->pwm_tfmr[i]);
  812. }
  813. break;
  814. case 2:
  815. data->pwm_fcms[0] |= (1 << index);
  816. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  817. break;
  818. }
  819. mutex_unlock(&data->update_lock);
  820. return count;
  821. }
  822. static ssize_t
  823. show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
  824. {
  825. struct w83795_data *data = w83795_update_pwm_config(dev);
  826. int index = to_sensor_dev_attr_2(attr)->index;
  827. unsigned int mode;
  828. if (data->pwm_fomc & (1 << index))
  829. mode = 0; /* DC */
  830. else
  831. mode = 1; /* PWM */
  832. return sprintf(buf, "%u\n", mode);
  833. }
  834. /*
  835. * Check whether a given temperature source can ever be useful.
  836. * Returns the number of selectable temperature channels which are
  837. * enabled.
  838. */
  839. static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
  840. {
  841. int useful = 0, i;
  842. for (i = 0; i < 4; i++) {
  843. if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
  844. continue;
  845. if (tss_map[i][tsrc] < 6) /* Analog */
  846. useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
  847. else /* Digital */
  848. useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
  849. }
  850. return useful;
  851. }
  852. static ssize_t
  853. show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
  854. {
  855. struct sensor_device_attribute_2 *sensor_attr =
  856. to_sensor_dev_attr_2(attr);
  857. struct w83795_data *data = w83795_update_pwm_config(dev);
  858. int index = sensor_attr->index;
  859. u8 tmp = data->temp_src[index / 2];
  860. if (index & 1)
  861. tmp >>= 4; /* Pick high nibble */
  862. else
  863. tmp &= 0x0f; /* Pick low nibble */
  864. /* Look-up the actual temperature channel number */
  865. if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
  866. return -EINVAL; /* Shouldn't happen */
  867. return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
  868. }
  869. static ssize_t
  870. store_temp_src(struct device *dev, struct device_attribute *attr,
  871. const char *buf, size_t count)
  872. {
  873. struct i2c_client *client = to_i2c_client(dev);
  874. struct w83795_data *data = w83795_update_pwm_config(dev);
  875. struct sensor_device_attribute_2 *sensor_attr =
  876. to_sensor_dev_attr_2(attr);
  877. int index = sensor_attr->index;
  878. int tmp;
  879. unsigned long channel;
  880. u8 val = index / 2;
  881. if (strict_strtoul(buf, 10, &channel) < 0 ||
  882. channel < 1 || channel > 14)
  883. return -EINVAL;
  884. /* Check if request can be fulfilled */
  885. for (tmp = 0; tmp < 4; tmp++) {
  886. if (tss_map[tmp][index] == channel - 1)
  887. break;
  888. }
  889. if (tmp == 4) /* No match */
  890. return -EINVAL;
  891. mutex_lock(&data->update_lock);
  892. if (index & 1) {
  893. tmp <<= 4;
  894. data->temp_src[val] &= 0x0f;
  895. } else {
  896. data->temp_src[val] &= 0xf0;
  897. }
  898. data->temp_src[val] |= tmp;
  899. w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
  900. mutex_unlock(&data->update_lock);
  901. return count;
  902. }
  903. #define TEMP_PWM_ENABLE 0
  904. #define TEMP_PWM_FAN_MAP 1
  905. static ssize_t
  906. show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  907. char *buf)
  908. {
  909. struct w83795_data *data = w83795_update_pwm_config(dev);
  910. struct sensor_device_attribute_2 *sensor_attr =
  911. to_sensor_dev_attr_2(attr);
  912. int nr = sensor_attr->nr;
  913. int index = sensor_attr->index;
  914. u8 tmp = 0xff;
  915. switch (nr) {
  916. case TEMP_PWM_ENABLE:
  917. tmp = (data->pwm_fcms[1] >> index) & 1;
  918. if (tmp)
  919. tmp = 4;
  920. else
  921. tmp = 3;
  922. break;
  923. case TEMP_PWM_FAN_MAP:
  924. tmp = data->pwm_tfmr[index];
  925. break;
  926. }
  927. return sprintf(buf, "%u\n", tmp);
  928. }
  929. static ssize_t
  930. store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  931. const char *buf, size_t count)
  932. {
  933. struct i2c_client *client = to_i2c_client(dev);
  934. struct w83795_data *data = w83795_update_pwm_config(dev);
  935. struct sensor_device_attribute_2 *sensor_attr =
  936. to_sensor_dev_attr_2(attr);
  937. int nr = sensor_attr->nr;
  938. int index = sensor_attr->index;
  939. unsigned long tmp;
  940. if (strict_strtoul(buf, 10, &tmp) < 0)
  941. return -EINVAL;
  942. switch (nr) {
  943. case TEMP_PWM_ENABLE:
  944. if (tmp != 3 && tmp != 4)
  945. return -EINVAL;
  946. tmp -= 3;
  947. mutex_lock(&data->update_lock);
  948. data->pwm_fcms[1] &= ~(1 << index);
  949. data->pwm_fcms[1] |= tmp << index;
  950. w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
  951. mutex_unlock(&data->update_lock);
  952. break;
  953. case TEMP_PWM_FAN_MAP:
  954. mutex_lock(&data->update_lock);
  955. tmp = SENSORS_LIMIT(tmp, 0, 0xff);
  956. w83795_write(client, W83795_REG_TFMR(index), tmp);
  957. data->pwm_tfmr[index] = tmp;
  958. mutex_unlock(&data->update_lock);
  959. break;
  960. }
  961. return count;
  962. }
  963. #define FANIN_TARGET 0
  964. #define FANIN_TOL 1
  965. static ssize_t
  966. show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
  967. {
  968. struct w83795_data *data = w83795_update_pwm_config(dev);
  969. struct sensor_device_attribute_2 *sensor_attr =
  970. to_sensor_dev_attr_2(attr);
  971. int nr = sensor_attr->nr;
  972. int index = sensor_attr->index;
  973. u16 tmp = 0;
  974. switch (nr) {
  975. case FANIN_TARGET:
  976. tmp = fan_from_reg(data->target_speed[index]);
  977. break;
  978. case FANIN_TOL:
  979. tmp = data->tol_speed;
  980. break;
  981. }
  982. return sprintf(buf, "%u\n", tmp);
  983. }
  984. static ssize_t
  985. store_fanin(struct device *dev, struct device_attribute *attr,
  986. const char *buf, size_t count)
  987. {
  988. struct i2c_client *client = to_i2c_client(dev);
  989. struct w83795_data *data = i2c_get_clientdata(client);
  990. struct sensor_device_attribute_2 *sensor_attr =
  991. to_sensor_dev_attr_2(attr);
  992. int nr = sensor_attr->nr;
  993. int index = sensor_attr->index;
  994. unsigned long val;
  995. if (strict_strtoul(buf, 10, &val) < 0)
  996. return -EINVAL;
  997. mutex_lock(&data->update_lock);
  998. switch (nr) {
  999. case FANIN_TARGET:
  1000. val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
  1001. w83795_write(client, W83795_REG_FTSH(index), val >> 4);
  1002. w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
  1003. data->target_speed[index] = val;
  1004. break;
  1005. case FANIN_TOL:
  1006. val = SENSORS_LIMIT(val, 0, 0x3f);
  1007. w83795_write(client, W83795_REG_TFTS, val);
  1008. data->tol_speed = val;
  1009. break;
  1010. }
  1011. mutex_unlock(&data->update_lock);
  1012. return count;
  1013. }
  1014. static ssize_t
  1015. show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1016. {
  1017. struct w83795_data *data = w83795_update_pwm_config(dev);
  1018. struct sensor_device_attribute_2 *sensor_attr =
  1019. to_sensor_dev_attr_2(attr);
  1020. int nr = sensor_attr->nr;
  1021. int index = sensor_attr->index;
  1022. long tmp = temp_from_reg(data->pwm_temp[index][nr]);
  1023. return sprintf(buf, "%ld\n", tmp);
  1024. }
  1025. static ssize_t
  1026. store_temp_pwm(struct device *dev, struct device_attribute *attr,
  1027. const char *buf, size_t count)
  1028. {
  1029. struct i2c_client *client = to_i2c_client(dev);
  1030. struct w83795_data *data = i2c_get_clientdata(client);
  1031. struct sensor_device_attribute_2 *sensor_attr =
  1032. to_sensor_dev_attr_2(attr);
  1033. int nr = sensor_attr->nr;
  1034. int index = sensor_attr->index;
  1035. unsigned long val;
  1036. u8 tmp;
  1037. if (strict_strtoul(buf, 10, &val) < 0)
  1038. return -EINVAL;
  1039. val /= 1000;
  1040. mutex_lock(&data->update_lock);
  1041. switch (nr) {
  1042. case TEMP_PWM_TTTI:
  1043. val = SENSORS_LIMIT(val, 0, 0x7f);
  1044. w83795_write(client, W83795_REG_TTTI(index), val);
  1045. break;
  1046. case TEMP_PWM_CTFS:
  1047. val = SENSORS_LIMIT(val, 0, 0x7f);
  1048. w83795_write(client, W83795_REG_CTFS(index), val);
  1049. break;
  1050. case TEMP_PWM_HCT:
  1051. val = SENSORS_LIMIT(val, 0, 0x0f);
  1052. tmp = w83795_read(client, W83795_REG_HT(index));
  1053. tmp &= 0x0f;
  1054. tmp |= (val << 4) & 0xf0;
  1055. w83795_write(client, W83795_REG_HT(index), tmp);
  1056. break;
  1057. case TEMP_PWM_HOT:
  1058. val = SENSORS_LIMIT(val, 0, 0x0f);
  1059. tmp = w83795_read(client, W83795_REG_HT(index));
  1060. tmp &= 0xf0;
  1061. tmp |= val & 0x0f;
  1062. w83795_write(client, W83795_REG_HT(index), tmp);
  1063. break;
  1064. }
  1065. data->pwm_temp[index][nr] = val;
  1066. mutex_unlock(&data->update_lock);
  1067. return count;
  1068. }
  1069. static ssize_t
  1070. show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1071. {
  1072. struct w83795_data *data = w83795_update_pwm_config(dev);
  1073. struct sensor_device_attribute_2 *sensor_attr =
  1074. to_sensor_dev_attr_2(attr);
  1075. int nr = sensor_attr->nr;
  1076. int index = sensor_attr->index;
  1077. return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
  1078. }
  1079. static ssize_t
  1080. store_sf4_pwm(struct device *dev, struct device_attribute *attr,
  1081. const char *buf, size_t count)
  1082. {
  1083. struct i2c_client *client = to_i2c_client(dev);
  1084. struct w83795_data *data = i2c_get_clientdata(client);
  1085. struct sensor_device_attribute_2 *sensor_attr =
  1086. to_sensor_dev_attr_2(attr);
  1087. int nr = sensor_attr->nr;
  1088. int index = sensor_attr->index;
  1089. unsigned long val;
  1090. if (strict_strtoul(buf, 10, &val) < 0)
  1091. return -EINVAL;
  1092. mutex_lock(&data->update_lock);
  1093. w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
  1094. data->sf4_reg[index][SF4_PWM][nr] = val;
  1095. mutex_unlock(&data->update_lock);
  1096. return count;
  1097. }
  1098. static ssize_t
  1099. show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1100. {
  1101. struct w83795_data *data = w83795_update_pwm_config(dev);
  1102. struct sensor_device_attribute_2 *sensor_attr =
  1103. to_sensor_dev_attr_2(attr);
  1104. int nr = sensor_attr->nr;
  1105. int index = sensor_attr->index;
  1106. return sprintf(buf, "%u\n",
  1107. (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
  1108. }
  1109. static ssize_t
  1110. store_sf4_temp(struct device *dev, struct device_attribute *attr,
  1111. const char *buf, size_t count)
  1112. {
  1113. struct i2c_client *client = to_i2c_client(dev);
  1114. struct w83795_data *data = i2c_get_clientdata(client);
  1115. struct sensor_device_attribute_2 *sensor_attr =
  1116. to_sensor_dev_attr_2(attr);
  1117. int nr = sensor_attr->nr;
  1118. int index = sensor_attr->index;
  1119. unsigned long val;
  1120. if (strict_strtoul(buf, 10, &val) < 0)
  1121. return -EINVAL;
  1122. val /= 1000;
  1123. mutex_lock(&data->update_lock);
  1124. w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
  1125. data->sf4_reg[index][SF4_TEMP][nr] = val;
  1126. mutex_unlock(&data->update_lock);
  1127. return count;
  1128. }
  1129. static ssize_t
  1130. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1131. {
  1132. struct sensor_device_attribute_2 *sensor_attr =
  1133. to_sensor_dev_attr_2(attr);
  1134. int nr = sensor_attr->nr;
  1135. int index = sensor_attr->index;
  1136. struct w83795_data *data = w83795_update_device(dev);
  1137. long temp = temp_from_reg(data->temp[index][nr]);
  1138. if (nr == TEMP_READ)
  1139. temp += (data->temp_read_vrlsb[index] >> 6) * 250;
  1140. return sprintf(buf, "%ld\n", temp);
  1141. }
  1142. static ssize_t
  1143. store_temp(struct device *dev, struct device_attribute *attr,
  1144. const char *buf, size_t count)
  1145. {
  1146. struct sensor_device_attribute_2 *sensor_attr =
  1147. to_sensor_dev_attr_2(attr);
  1148. int nr = sensor_attr->nr;
  1149. int index = sensor_attr->index;
  1150. struct i2c_client *client = to_i2c_client(dev);
  1151. struct w83795_data *data = i2c_get_clientdata(client);
  1152. long tmp;
  1153. if (strict_strtol(buf, 10, &tmp) < 0)
  1154. return -EINVAL;
  1155. mutex_lock(&data->update_lock);
  1156. data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
  1157. w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
  1158. mutex_unlock(&data->update_lock);
  1159. return count;
  1160. }
  1161. static ssize_t
  1162. show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1163. {
  1164. struct w83795_data *data = dev_get_drvdata(dev);
  1165. int tmp;
  1166. if (data->enable_dts & 2)
  1167. tmp = 5;
  1168. else
  1169. tmp = 6;
  1170. return sprintf(buf, "%d\n", tmp);
  1171. }
  1172. static ssize_t
  1173. show_dts(struct device *dev, struct device_attribute *attr, char *buf)
  1174. {
  1175. struct sensor_device_attribute_2 *sensor_attr =
  1176. to_sensor_dev_attr_2(attr);
  1177. int index = sensor_attr->index;
  1178. struct w83795_data *data = w83795_update_device(dev);
  1179. long temp = temp_from_reg(data->dts[index]);
  1180. temp += (data->dts_read_vrlsb[index] >> 6) * 250;
  1181. return sprintf(buf, "%ld\n", temp);
  1182. }
  1183. static ssize_t
  1184. show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
  1185. {
  1186. struct sensor_device_attribute_2 *sensor_attr =
  1187. to_sensor_dev_attr_2(attr);
  1188. int nr = sensor_attr->nr;
  1189. struct w83795_data *data = dev_get_drvdata(dev);
  1190. long temp = temp_from_reg(data->dts_ext[nr]);
  1191. return sprintf(buf, "%ld\n", temp);
  1192. }
  1193. static ssize_t
  1194. store_dts_ext(struct device *dev, struct device_attribute *attr,
  1195. const char *buf, size_t count)
  1196. {
  1197. struct sensor_device_attribute_2 *sensor_attr =
  1198. to_sensor_dev_attr_2(attr);
  1199. int nr = sensor_attr->nr;
  1200. struct i2c_client *client = to_i2c_client(dev);
  1201. struct w83795_data *data = i2c_get_clientdata(client);
  1202. long tmp;
  1203. if (strict_strtol(buf, 10, &tmp) < 0)
  1204. return -EINVAL;
  1205. mutex_lock(&data->update_lock);
  1206. data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
  1207. w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
  1208. mutex_unlock(&data->update_lock);
  1209. return count;
  1210. }
  1211. static ssize_t
  1212. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1213. {
  1214. struct w83795_data *data = dev_get_drvdata(dev);
  1215. struct sensor_device_attribute_2 *sensor_attr =
  1216. to_sensor_dev_attr_2(attr);
  1217. int index = sensor_attr->index;
  1218. int tmp;
  1219. if (data->temp_mode & (1 << index))
  1220. tmp = 3; /* Thermal diode */
  1221. else
  1222. tmp = 4; /* Thermistor */
  1223. return sprintf(buf, "%d\n", tmp);
  1224. }
  1225. /* Only for temp1-4 (temp5-6 can only be thermistor) */
  1226. static ssize_t
  1227. store_temp_mode(struct device *dev, struct device_attribute *attr,
  1228. const char *buf, size_t count)
  1229. {
  1230. struct i2c_client *client = to_i2c_client(dev);
  1231. struct w83795_data *data = i2c_get_clientdata(client);
  1232. struct sensor_device_attribute_2 *sensor_attr =
  1233. to_sensor_dev_attr_2(attr);
  1234. int index = sensor_attr->index;
  1235. int reg_shift;
  1236. unsigned long val;
  1237. u8 tmp;
  1238. if (strict_strtoul(buf, 10, &val) < 0)
  1239. return -EINVAL;
  1240. if ((val != 4) && (val != 3))
  1241. return -EINVAL;
  1242. mutex_lock(&data->update_lock);
  1243. if (val == 3) {
  1244. /* Thermal diode */
  1245. val = 0x01;
  1246. data->temp_mode |= 1 << index;
  1247. } else if (val == 4) {
  1248. /* Thermistor */
  1249. val = 0x03;
  1250. data->temp_mode &= ~(1 << index);
  1251. }
  1252. reg_shift = 2 * index;
  1253. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1254. tmp &= ~(0x03 << reg_shift);
  1255. tmp |= val << reg_shift;
  1256. w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
  1257. mutex_unlock(&data->update_lock);
  1258. return count;
  1259. }
  1260. /* show/store VIN */
  1261. static ssize_t
  1262. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  1263. {
  1264. struct sensor_device_attribute_2 *sensor_attr =
  1265. to_sensor_dev_attr_2(attr);
  1266. int nr = sensor_attr->nr;
  1267. int index = sensor_attr->index;
  1268. struct w83795_data *data = w83795_update_device(dev);
  1269. u16 val = data->in[index][nr];
  1270. u8 lsb_idx;
  1271. switch (nr) {
  1272. case IN_READ:
  1273. /* calculate this value again by sensors as sensors3.conf */
  1274. if ((index >= 17) &&
  1275. !((data->has_gain >> (index - 17)) & 1))
  1276. val *= 8;
  1277. break;
  1278. case IN_MAX:
  1279. case IN_LOW:
  1280. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1281. val <<= 2;
  1282. val |= (data->in_lsb[lsb_idx][nr] >>
  1283. IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
  1284. if ((index >= 17) &&
  1285. !((data->has_gain >> (index - 17)) & 1))
  1286. val *= 8;
  1287. break;
  1288. }
  1289. val = in_from_reg(index, val);
  1290. return sprintf(buf, "%d\n", val);
  1291. }
  1292. static ssize_t
  1293. store_in(struct device *dev, struct device_attribute *attr,
  1294. const char *buf, size_t count)
  1295. {
  1296. struct sensor_device_attribute_2 *sensor_attr =
  1297. to_sensor_dev_attr_2(attr);
  1298. int nr = sensor_attr->nr;
  1299. int index = sensor_attr->index;
  1300. struct i2c_client *client = to_i2c_client(dev);
  1301. struct w83795_data *data = i2c_get_clientdata(client);
  1302. unsigned long val;
  1303. u8 tmp;
  1304. u8 lsb_idx;
  1305. if (strict_strtoul(buf, 10, &val) < 0)
  1306. return -EINVAL;
  1307. val = in_to_reg(index, val);
  1308. if ((index >= 17) &&
  1309. !((data->has_gain >> (index - 17)) & 1))
  1310. val /= 8;
  1311. val = SENSORS_LIMIT(val, 0, 0x3FF);
  1312. mutex_lock(&data->update_lock);
  1313. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1314. tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
  1315. tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
  1316. tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
  1317. w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
  1318. data->in_lsb[lsb_idx][nr] = tmp;
  1319. tmp = (val >> 2) & 0xff;
  1320. w83795_write(client, W83795_REG_IN[index][nr], tmp);
  1321. data->in[index][nr] = tmp;
  1322. mutex_unlock(&data->update_lock);
  1323. return count;
  1324. }
  1325. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1326. static ssize_t
  1327. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  1328. {
  1329. struct sensor_device_attribute_2 *sensor_attr =
  1330. to_sensor_dev_attr_2(attr);
  1331. int nr = sensor_attr->nr;
  1332. struct w83795_data *data = w83795_update_pwm_config(dev);
  1333. u16 val = data->setup_pwm[nr];
  1334. switch (nr) {
  1335. case SETUP_PWM_UPTIME:
  1336. case SETUP_PWM_DOWNTIME:
  1337. val = time_from_reg(val);
  1338. break;
  1339. }
  1340. return sprintf(buf, "%d\n", val);
  1341. }
  1342. static ssize_t
  1343. store_sf_setup(struct device *dev, struct device_attribute *attr,
  1344. const char *buf, size_t count)
  1345. {
  1346. struct sensor_device_attribute_2 *sensor_attr =
  1347. to_sensor_dev_attr_2(attr);
  1348. int nr = sensor_attr->nr;
  1349. struct i2c_client *client = to_i2c_client(dev);
  1350. struct w83795_data *data = i2c_get_clientdata(client);
  1351. unsigned long val;
  1352. if (strict_strtoul(buf, 10, &val) < 0)
  1353. return -EINVAL;
  1354. switch (nr) {
  1355. case SETUP_PWM_DEFAULT:
  1356. val = SENSORS_LIMIT(val, 0, 0xff);
  1357. break;
  1358. case SETUP_PWM_UPTIME:
  1359. case SETUP_PWM_DOWNTIME:
  1360. val = time_to_reg(val);
  1361. if (val == 0)
  1362. return -EINVAL;
  1363. break;
  1364. }
  1365. mutex_lock(&data->update_lock);
  1366. data->setup_pwm[nr] = val;
  1367. w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
  1368. mutex_unlock(&data->update_lock);
  1369. return count;
  1370. }
  1371. #endif
  1372. #define NOT_USED -1
  1373. /* Don't change the attribute order, _max, _min and _beep are accessed by index
  1374. * somewhere else in the code */
  1375. #define SENSOR_ATTR_IN(index) { \
  1376. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  1377. IN_READ, index), \
  1378. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  1379. store_in, IN_MAX, index), \
  1380. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  1381. store_in, IN_LOW, index), \
  1382. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  1383. NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
  1384. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  1385. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1386. index + ((index > 14) ? 1 : 0)) }
  1387. /* Don't change the attribute order, _beep is accessed by index
  1388. * somewhere else in the code */
  1389. #define SENSOR_ATTR_FAN(index) { \
  1390. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  1391. NULL, FAN_INPUT, index - 1), \
  1392. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  1393. show_fan, store_fan_min, FAN_MIN, index - 1), \
  1394. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  1395. NULL, ALARM_STATUS, index + 31), \
  1396. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  1397. show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
  1398. #define SENSOR_ATTR_PWM(index) { \
  1399. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  1400. store_pwm, PWM_OUTPUT, index - 1), \
  1401. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  1402. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  1403. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  1404. show_pwm, store_pwm, PWM_START, index - 1), \
  1405. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  1406. show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
  1407. SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
  1408. show_pwm, store_pwm, PWM_FREQ, index - 1), \
  1409. SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
  1410. show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
  1411. SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
  1412. show_pwm_mode, NULL, NOT_USED, index - 1), \
  1413. SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
  1414. show_fanin, store_fanin, FANIN_TARGET, index - 1) }
  1415. /* Don't change the attribute order, _beep is accessed by index
  1416. * somewhere else in the code */
  1417. #define SENSOR_ATTR_DTS(index) { \
  1418. SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
  1419. show_dts_mode, NULL, NOT_USED, index - 7), \
  1420. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
  1421. NULL, NOT_USED, index - 7), \
  1422. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
  1423. store_dts_ext, DTS_CRIT, NOT_USED), \
  1424. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1425. show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
  1426. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
  1427. store_dts_ext, DTS_WARN, NOT_USED), \
  1428. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1429. show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
  1430. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1431. show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
  1432. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1433. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
  1434. /* Don't change the attribute order, _beep is accessed by index
  1435. * somewhere else in the code */
  1436. #define SENSOR_ATTR_TEMP(index) { \
  1437. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
  1438. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  1439. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  1440. NULL, TEMP_READ, index - 1), \
  1441. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
  1442. store_temp, TEMP_CRIT, index - 1), \
  1443. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1444. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  1445. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  1446. store_temp, TEMP_WARN, index - 1), \
  1447. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1448. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  1449. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1450. show_alarm_beep, NULL, ALARM_STATUS, \
  1451. index + (index > 4 ? 11 : 17)), \
  1452. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1453. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1454. index + (index > 4 ? 11 : 17)), \
  1455. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  1456. show_temp_pwm_enable, store_temp_pwm_enable, \
  1457. TEMP_PWM_ENABLE, index - 1), \
  1458. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
  1459. show_temp_pwm_enable, store_temp_pwm_enable, \
  1460. TEMP_PWM_FAN_MAP, index - 1), \
  1461. SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
  1462. show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
  1463. SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
  1464. show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
  1465. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
  1466. show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
  1467. SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
  1468. show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
  1469. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  1470. show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
  1471. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  1472. show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
  1473. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  1474. show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
  1475. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  1476. show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
  1477. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  1478. show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
  1479. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  1480. show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
  1481. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  1482. show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
  1483. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  1484. show_sf4_temp, store_sf4_temp, 0, index - 1), \
  1485. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  1486. show_sf4_temp, store_sf4_temp, 1, index - 1), \
  1487. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  1488. show_sf4_temp, store_sf4_temp, 2, index - 1), \
  1489. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  1490. show_sf4_temp, store_sf4_temp, 3, index - 1), \
  1491. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  1492. show_sf4_temp, store_sf4_temp, 4, index - 1), \
  1493. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  1494. show_sf4_temp, store_sf4_temp, 5, index - 1), \
  1495. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  1496. show_sf4_temp, store_sf4_temp, 6, index - 1) }
  1497. static struct sensor_device_attribute_2 w83795_in[][5] = {
  1498. SENSOR_ATTR_IN(0),
  1499. SENSOR_ATTR_IN(1),
  1500. SENSOR_ATTR_IN(2),
  1501. SENSOR_ATTR_IN(3),
  1502. SENSOR_ATTR_IN(4),
  1503. SENSOR_ATTR_IN(5),
  1504. SENSOR_ATTR_IN(6),
  1505. SENSOR_ATTR_IN(7),
  1506. SENSOR_ATTR_IN(8),
  1507. SENSOR_ATTR_IN(9),
  1508. SENSOR_ATTR_IN(10),
  1509. SENSOR_ATTR_IN(11),
  1510. SENSOR_ATTR_IN(12),
  1511. SENSOR_ATTR_IN(13),
  1512. SENSOR_ATTR_IN(14),
  1513. SENSOR_ATTR_IN(15),
  1514. SENSOR_ATTR_IN(16),
  1515. SENSOR_ATTR_IN(17),
  1516. SENSOR_ATTR_IN(18),
  1517. SENSOR_ATTR_IN(19),
  1518. SENSOR_ATTR_IN(20),
  1519. };
  1520. static const struct sensor_device_attribute_2 w83795_fan[][4] = {
  1521. SENSOR_ATTR_FAN(1),
  1522. SENSOR_ATTR_FAN(2),
  1523. SENSOR_ATTR_FAN(3),
  1524. SENSOR_ATTR_FAN(4),
  1525. SENSOR_ATTR_FAN(5),
  1526. SENSOR_ATTR_FAN(6),
  1527. SENSOR_ATTR_FAN(7),
  1528. SENSOR_ATTR_FAN(8),
  1529. SENSOR_ATTR_FAN(9),
  1530. SENSOR_ATTR_FAN(10),
  1531. SENSOR_ATTR_FAN(11),
  1532. SENSOR_ATTR_FAN(12),
  1533. SENSOR_ATTR_FAN(13),
  1534. SENSOR_ATTR_FAN(14),
  1535. };
  1536. static const struct sensor_device_attribute_2 w83795_temp[][28] = {
  1537. SENSOR_ATTR_TEMP(1),
  1538. SENSOR_ATTR_TEMP(2),
  1539. SENSOR_ATTR_TEMP(3),
  1540. SENSOR_ATTR_TEMP(4),
  1541. SENSOR_ATTR_TEMP(5),
  1542. SENSOR_ATTR_TEMP(6),
  1543. };
  1544. static const struct sensor_device_attribute_2 w83795_dts[][8] = {
  1545. SENSOR_ATTR_DTS(7),
  1546. SENSOR_ATTR_DTS(8),
  1547. SENSOR_ATTR_DTS(9),
  1548. SENSOR_ATTR_DTS(10),
  1549. SENSOR_ATTR_DTS(11),
  1550. SENSOR_ATTR_DTS(12),
  1551. SENSOR_ATTR_DTS(13),
  1552. SENSOR_ATTR_DTS(14),
  1553. };
  1554. static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
  1555. SENSOR_ATTR_PWM(1),
  1556. SENSOR_ATTR_PWM(2),
  1557. SENSOR_ATTR_PWM(3),
  1558. SENSOR_ATTR_PWM(4),
  1559. SENSOR_ATTR_PWM(5),
  1560. SENSOR_ATTR_PWM(6),
  1561. SENSOR_ATTR_PWM(7),
  1562. SENSOR_ATTR_PWM(8),
  1563. };
  1564. static const struct sensor_device_attribute_2 w83795_tss[6] = {
  1565. SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
  1566. show_temp_src, store_temp_src, NOT_USED, 0),
  1567. SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
  1568. show_temp_src, store_temp_src, NOT_USED, 1),
  1569. SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
  1570. show_temp_src, store_temp_src, NOT_USED, 2),
  1571. SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
  1572. show_temp_src, store_temp_src, NOT_USED, 3),
  1573. SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
  1574. show_temp_src, store_temp_src, NOT_USED, 4),
  1575. SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
  1576. show_temp_src, store_temp_src, NOT_USED, 5),
  1577. };
  1578. static const struct sensor_device_attribute_2 sda_single_files[] = {
  1579. SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
  1580. store_chassis_clear, ALARM_STATUS, 46),
  1581. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1582. SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
  1583. store_fanin, FANIN_TOL, NOT_USED),
  1584. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  1585. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  1586. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  1587. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  1588. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  1589. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  1590. #endif
  1591. };
  1592. static const struct sensor_device_attribute_2 sda_beep_files[] = {
  1593. SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
  1594. store_beep, BEEP_ENABLE, 46),
  1595. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
  1596. store_beep, BEEP_ENABLE, 47),
  1597. };
  1598. /*
  1599. * Driver interface
  1600. */
  1601. static void w83795_init_client(struct i2c_client *client)
  1602. {
  1603. struct w83795_data *data = i2c_get_clientdata(client);
  1604. static const u16 clkin[4] = { /* in kHz */
  1605. 14318, 24000, 33333, 48000
  1606. };
  1607. u8 config;
  1608. if (reset)
  1609. w83795_write(client, W83795_REG_CONFIG, 0x80);
  1610. /* Start monitoring if needed */
  1611. config = w83795_read(client, W83795_REG_CONFIG);
  1612. if (!(config & W83795_REG_CONFIG_START)) {
  1613. dev_info(&client->dev, "Enabling monitoring operations\n");
  1614. w83795_write(client, W83795_REG_CONFIG,
  1615. config | W83795_REG_CONFIG_START);
  1616. }
  1617. data->clkin = clkin[(config >> 3) & 0x3];
  1618. dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
  1619. }
  1620. static int w83795_get_device_id(struct i2c_client *client)
  1621. {
  1622. int device_id;
  1623. device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
  1624. /* Special case for rev. A chips; can't be checked first because later
  1625. revisions emulate this for compatibility */
  1626. if (device_id < 0 || (device_id & 0xf0) != 0x50) {
  1627. int alt_id;
  1628. alt_id = i2c_smbus_read_byte_data(client,
  1629. W83795_REG_DEVICEID_A);
  1630. if (alt_id == 0x50)
  1631. device_id = alt_id;
  1632. }
  1633. return device_id;
  1634. }
  1635. /* Return 0 if detection is successful, -ENODEV otherwise */
  1636. static int w83795_detect(struct i2c_client *client,
  1637. struct i2c_board_info *info)
  1638. {
  1639. int bank, vendor_id, device_id, expected, i2c_addr, config;
  1640. struct i2c_adapter *adapter = client->adapter;
  1641. unsigned short address = client->addr;
  1642. const char *chip_name;
  1643. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1644. return -ENODEV;
  1645. bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1646. if (bank < 0 || (bank & 0x7c)) {
  1647. dev_dbg(&adapter->dev,
  1648. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1649. address, "bank");
  1650. return -ENODEV;
  1651. }
  1652. /* Check Nuvoton vendor ID */
  1653. vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
  1654. expected = bank & 0x80 ? 0x5c : 0xa3;
  1655. if (vendor_id != expected) {
  1656. dev_dbg(&adapter->dev,
  1657. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1658. address, "vendor id");
  1659. return -ENODEV;
  1660. }
  1661. /* Check device ID */
  1662. device_id = w83795_get_device_id(client) |
  1663. (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
  1664. if ((device_id >> 4) != 0x795) {
  1665. dev_dbg(&adapter->dev,
  1666. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1667. address, "device id\n");
  1668. return -ENODEV;
  1669. }
  1670. /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
  1671. should match */
  1672. if ((bank & 0x07) == 0) {
  1673. i2c_addr = i2c_smbus_read_byte_data(client,
  1674. W83795_REG_I2C_ADDR);
  1675. if ((i2c_addr & 0x7f) != address) {
  1676. dev_dbg(&adapter->dev,
  1677. "w83795: Detection failed at addr 0x%02hx, "
  1678. "check %s\n", address, "i2c addr");
  1679. return -ENODEV;
  1680. }
  1681. }
  1682. /* Check 795 chip type: 795G or 795ADG
  1683. Usually we don't write to chips during detection, but here we don't
  1684. quite have the choice; hopefully it's OK, we are about to return
  1685. success anyway */
  1686. if ((bank & 0x07) != 0)
  1687. i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
  1688. bank & ~0x07);
  1689. config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
  1690. if (config & W83795_REG_CONFIG_CONFIG48)
  1691. chip_name = "w83795adg";
  1692. else
  1693. chip_name = "w83795g";
  1694. strlcpy(info->type, chip_name, I2C_NAME_SIZE);
  1695. dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
  1696. 'A' + (device_id & 0xf), address);
  1697. return 0;
  1698. }
  1699. static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
  1700. const struct device_attribute *))
  1701. {
  1702. struct w83795_data *data = dev_get_drvdata(dev);
  1703. int err, i, j;
  1704. for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
  1705. if (!(data->has_in & (1 << i)))
  1706. continue;
  1707. for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
  1708. if (j == 4 && !data->enable_beep)
  1709. continue;
  1710. err = fn(dev, &w83795_in[i][j].dev_attr);
  1711. if (err)
  1712. return err;
  1713. }
  1714. }
  1715. for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
  1716. if (!(data->has_fan & (1 << i)))
  1717. continue;
  1718. for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
  1719. if (j == 3 && !data->enable_beep)
  1720. continue;
  1721. err = fn(dev, &w83795_fan[i][j].dev_attr);
  1722. if (err)
  1723. return err;
  1724. }
  1725. }
  1726. for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
  1727. j = w83795_tss_useful(data, i);
  1728. if (!j)
  1729. continue;
  1730. err = fn(dev, &w83795_tss[i].dev_attr);
  1731. if (err)
  1732. return err;
  1733. }
  1734. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1735. err = fn(dev, &sda_single_files[i].dev_attr);
  1736. if (err)
  1737. return err;
  1738. }
  1739. if (data->enable_beep) {
  1740. for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
  1741. err = fn(dev, &sda_beep_files[i].dev_attr);
  1742. if (err)
  1743. return err;
  1744. }
  1745. }
  1746. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1747. for (i = 0; i < data->has_pwm; i++) {
  1748. for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
  1749. err = fn(dev, &w83795_pwm[i][j].dev_attr);
  1750. if (err)
  1751. return err;
  1752. }
  1753. }
  1754. #endif
  1755. for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
  1756. if (!(data->has_temp & (1 << i)))
  1757. continue;
  1758. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1759. for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
  1760. #else
  1761. for (j = 0; j < 8; j++) {
  1762. #endif
  1763. if (j == 7 && !data->enable_beep)
  1764. continue;
  1765. err = fn(dev, &w83795_temp[i][j].dev_attr);
  1766. if (err)
  1767. return err;
  1768. }
  1769. }
  1770. if (data->enable_dts) {
  1771. for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
  1772. if (!(data->has_dts & (1 << i)))
  1773. continue;
  1774. for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
  1775. if (j == 7 && !data->enable_beep)
  1776. continue;
  1777. err = fn(dev, &w83795_dts[i][j].dev_attr);
  1778. if (err)
  1779. return err;
  1780. }
  1781. }
  1782. }
  1783. return 0;
  1784. }
  1785. /* We need a wrapper that fits in w83795_handle_files */
  1786. static int device_remove_file_wrapper(struct device *dev,
  1787. const struct device_attribute *attr)
  1788. {
  1789. device_remove_file(dev, attr);
  1790. return 0;
  1791. }
  1792. static void w83795_check_dynamic_in_limits(struct i2c_client *client)
  1793. {
  1794. struct w83795_data *data = i2c_get_clientdata(client);
  1795. u8 vid_ctl;
  1796. int i, err_max, err_min;
  1797. vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
  1798. /* Return immediately if VRM isn't configured */
  1799. if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
  1800. return;
  1801. data->has_dyn_in = (vid_ctl >> 3) & 0x07;
  1802. for (i = 0; i < 2; i++) {
  1803. if (!(data->has_dyn_in & (1 << i)))
  1804. continue;
  1805. /* Voltage limits in dynamic mode, switch to read-only */
  1806. err_max = sysfs_chmod_file(&client->dev.kobj,
  1807. &w83795_in[i][2].dev_attr.attr,
  1808. S_IRUGO);
  1809. err_min = sysfs_chmod_file(&client->dev.kobj,
  1810. &w83795_in[i][3].dev_attr.attr,
  1811. S_IRUGO);
  1812. if (err_max || err_min)
  1813. dev_warn(&client->dev, "Failed to set in%d limits "
  1814. "read-only (%d, %d)\n", i, err_max, err_min);
  1815. else
  1816. dev_info(&client->dev, "in%d limits set dynamically "
  1817. "from VID\n", i);
  1818. }
  1819. }
  1820. /* Check pins that can be used for either temperature or voltage monitoring */
  1821. static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
  1822. int temp_chan, int in_chan)
  1823. {
  1824. /* config is a 2-bit value */
  1825. switch (config) {
  1826. case 0x2: /* Voltage monitoring */
  1827. data->has_in |= 1 << in_chan;
  1828. break;
  1829. case 0x1: /* Thermal diode */
  1830. if (temp_chan >= 4)
  1831. break;
  1832. data->temp_mode |= 1 << temp_chan;
  1833. /* fall through */
  1834. case 0x3: /* Thermistor */
  1835. data->has_temp |= 1 << temp_chan;
  1836. break;
  1837. }
  1838. }
  1839. static int w83795_probe(struct i2c_client *client,
  1840. const struct i2c_device_id *id)
  1841. {
  1842. int i;
  1843. u8 tmp;
  1844. struct device *dev = &client->dev;
  1845. struct w83795_data *data;
  1846. int err;
  1847. data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
  1848. if (!data) {
  1849. err = -ENOMEM;
  1850. goto exit;
  1851. }
  1852. i2c_set_clientdata(client, data);
  1853. data->chip_type = id->driver_data;
  1854. data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1855. mutex_init(&data->update_lock);
  1856. /* Initialize the chip */
  1857. w83795_init_client(client);
  1858. /* Check which voltages and fans are present */
  1859. data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
  1860. | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
  1861. data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
  1862. | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
  1863. /* Check which analog temperatures and extra voltages are present */
  1864. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1865. if (tmp & 0x20)
  1866. data->enable_dts = 1;
  1867. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
  1868. w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
  1869. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1870. w83795_apply_temp_config(data, tmp >> 6, 3, 20);
  1871. w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
  1872. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
  1873. w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
  1874. /* Check DTS enable status */
  1875. if (data->enable_dts) {
  1876. if (1 & w83795_read(client, W83795_REG_DTSC))
  1877. data->enable_dts |= 2;
  1878. data->has_dts = w83795_read(client, W83795_REG_DTSE);
  1879. }
  1880. /* Report PECI Tbase values */
  1881. if (data->enable_dts == 1) {
  1882. for (i = 0; i < 8; i++) {
  1883. if (!(data->has_dts & (1 << i)))
  1884. continue;
  1885. tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
  1886. dev_info(&client->dev,
  1887. "PECI agent %d Tbase temperature: %u\n",
  1888. i + 1, (unsigned int)tmp & 0x7f);
  1889. }
  1890. }
  1891. data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
  1892. /* pwm and smart fan */
  1893. if (data->chip_type == w83795g)
  1894. data->has_pwm = 8;
  1895. else
  1896. data->has_pwm = 2;
  1897. /* Check if BEEP pin is available */
  1898. if (data->chip_type == w83795g) {
  1899. /* The W83795G has a dedicated BEEP pin */
  1900. data->enable_beep = 1;
  1901. } else {
  1902. /* The W83795ADG has a shared pin for OVT# and BEEP, so you
  1903. * can't have both */
  1904. tmp = w83795_read(client, W83795_REG_OVT_CFG);
  1905. if ((tmp & OVT_CFG_SEL) == 0)
  1906. data->enable_beep = 1;
  1907. }
  1908. err = w83795_handle_files(dev, device_create_file);
  1909. if (err)
  1910. goto exit_remove;
  1911. if (data->chip_type == w83795g)
  1912. w83795_check_dynamic_in_limits(client);
  1913. data->hwmon_dev = hwmon_device_register(dev);
  1914. if (IS_ERR(data->hwmon_dev)) {
  1915. err = PTR_ERR(data->hwmon_dev);
  1916. goto exit_remove;
  1917. }
  1918. return 0;
  1919. exit_remove:
  1920. w83795_handle_files(dev, device_remove_file_wrapper);
  1921. kfree(data);
  1922. exit:
  1923. return err;
  1924. }
  1925. static int w83795_remove(struct i2c_client *client)
  1926. {
  1927. struct w83795_data *data = i2c_get_clientdata(client);
  1928. hwmon_device_unregister(data->hwmon_dev);
  1929. w83795_handle_files(&client->dev, device_remove_file_wrapper);
  1930. kfree(data);
  1931. return 0;
  1932. }
  1933. static const struct i2c_device_id w83795_id[] = {
  1934. { "w83795g", w83795g },
  1935. { "w83795adg", w83795adg },
  1936. { }
  1937. };
  1938. MODULE_DEVICE_TABLE(i2c, w83795_id);
  1939. static struct i2c_driver w83795_driver = {
  1940. .driver = {
  1941. .name = "w83795",
  1942. },
  1943. .probe = w83795_probe,
  1944. .remove = w83795_remove,
  1945. .id_table = w83795_id,
  1946. .class = I2C_CLASS_HWMON,
  1947. .detect = w83795_detect,
  1948. .address_list = normal_i2c,
  1949. };
  1950. static int __init sensors_w83795_init(void)
  1951. {
  1952. return i2c_add_driver(&w83795_driver);
  1953. }
  1954. static void __exit sensors_w83795_exit(void)
  1955. {
  1956. i2c_del_driver(&w83795_driver);
  1957. }
  1958. MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
  1959. MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
  1960. MODULE_LICENSE("GPL");
  1961. module_init(sensors_w83795_init);
  1962. module_exit(sensors_w83795_exit);