nv50_display.h 2.8 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #ifndef __NV50_DISPLAY_H__
  27. #define __NV50_DISPLAY_H__
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "nouveau_drv.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_reg.h"
  33. #include "nouveau_crtc.h"
  34. #include "nv50_evo.h"
  35. struct nv50_display_crtc {
  36. struct nouveau_channel *sync;
  37. struct {
  38. struct nouveau_bo *bo;
  39. u32 offset;
  40. u16 value;
  41. } sem;
  42. };
  43. struct nv50_display {
  44. struct nouveau_channel *master;
  45. struct nouveau_gpuobj *ntfy;
  46. struct nv50_display_crtc crtc[2];
  47. struct tasklet_struct tasklet;
  48. struct {
  49. struct dcb_entry *dcb;
  50. u16 script;
  51. u32 pclk;
  52. } irq;
  53. };
  54. static inline struct nv50_display *
  55. nv50_display(struct drm_device *dev)
  56. {
  57. struct drm_nouveau_private *dev_priv = dev->dev_private;
  58. return dev_priv->engine.display.priv;
  59. }
  60. int nv50_display_early_init(struct drm_device *dev);
  61. void nv50_display_late_takedown(struct drm_device *dev);
  62. int nv50_display_create(struct drm_device *dev);
  63. int nv50_display_init(struct drm_device *dev);
  64. void nv50_display_destroy(struct drm_device *dev);
  65. int nv50_crtc_blank(struct nouveau_crtc *, bool blank);
  66. int nv50_crtc_set_clock(struct drm_device *, int head, int pclk);
  67. int nv50_display_flip_next(struct drm_crtc *, struct drm_framebuffer *,
  68. struct nouveau_channel *chan);
  69. void nv50_display_flip_stop(struct drm_crtc *);
  70. int nv50_evo_init(struct drm_device *dev);
  71. void nv50_evo_fini(struct drm_device *dev);
  72. void nv50_evo_dmaobj_init(struct nouveau_gpuobj *, u32 memtype, u64 base,
  73. u64 size);
  74. int nv50_evo_dmaobj_new(struct nouveau_channel *, u32 handle, u32 memtype,
  75. u64 base, u64 size, struct nouveau_gpuobj **);
  76. #endif /* __NV50_DISPLAY_H__ */