intel_lvds.c 30 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  64. {
  65. struct drm_device *dev = intel_lvds->base.base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. u32 ctl_reg, lvds_reg;
  68. if (HAS_PCH_SPLIT(dev)) {
  69. ctl_reg = PCH_PP_CONTROL;
  70. lvds_reg = PCH_LVDS;
  71. } else {
  72. ctl_reg = PP_CONTROL;
  73. lvds_reg = LVDS;
  74. }
  75. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  76. if (intel_lvds->pfit_dirty) {
  77. /*
  78. * Enable automatic panel scaling so that non-native modes
  79. * fill the screen. The panel fitter should only be
  80. * adjusted whilst the pipe is disabled, according to
  81. * register description and PRM.
  82. */
  83. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  84. intel_lvds->pfit_control,
  85. intel_lvds->pfit_pgm_ratios);
  86. if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
  87. DRM_ERROR("timed out waiting for panel to power off\n");
  88. } else {
  89. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  90. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  91. intel_lvds->pfit_dirty = false;
  92. }
  93. }
  94. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  95. POSTING_READ(lvds_reg);
  96. intel_panel_enable_backlight(dev);
  97. }
  98. static void intel_lvds_disable(struct intel_lvds *intel_lvds)
  99. {
  100. struct drm_device *dev = intel_lvds->base.base.dev;
  101. struct drm_i915_private *dev_priv = dev->dev_private;
  102. u32 ctl_reg, lvds_reg;
  103. if (HAS_PCH_SPLIT(dev)) {
  104. ctl_reg = PCH_PP_CONTROL;
  105. lvds_reg = PCH_LVDS;
  106. } else {
  107. ctl_reg = PP_CONTROL;
  108. lvds_reg = LVDS;
  109. }
  110. intel_panel_disable_backlight(dev);
  111. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  112. if (intel_lvds->pfit_control) {
  113. if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
  114. DRM_ERROR("timed out waiting for panel to power off\n");
  115. I915_WRITE(PFIT_CONTROL, 0);
  116. intel_lvds->pfit_dirty = true;
  117. }
  118. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  119. POSTING_READ(lvds_reg);
  120. }
  121. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  122. {
  123. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  124. if (mode == DRM_MODE_DPMS_ON)
  125. intel_lvds_enable(intel_lvds);
  126. else
  127. intel_lvds_disable(intel_lvds);
  128. /* XXX: We never power down the LVDS pairs. */
  129. }
  130. static int intel_lvds_mode_valid(struct drm_connector *connector,
  131. struct drm_display_mode *mode)
  132. {
  133. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  134. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  135. if (mode->hdisplay > fixed_mode->hdisplay)
  136. return MODE_PANEL;
  137. if (mode->vdisplay > fixed_mode->vdisplay)
  138. return MODE_PANEL;
  139. return MODE_OK;
  140. }
  141. static void
  142. centre_horizontally(struct drm_display_mode *mode,
  143. int width)
  144. {
  145. u32 border, sync_pos, blank_width, sync_width;
  146. /* keep the hsync and hblank widths constant */
  147. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  148. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  149. sync_pos = (blank_width - sync_width + 1) / 2;
  150. border = (mode->hdisplay - width + 1) / 2;
  151. border += border & 1; /* make the border even */
  152. mode->crtc_hdisplay = width;
  153. mode->crtc_hblank_start = width + border;
  154. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  155. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  156. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  157. }
  158. static void
  159. centre_vertically(struct drm_display_mode *mode,
  160. int height)
  161. {
  162. u32 border, sync_pos, blank_width, sync_width;
  163. /* keep the vsync and vblank widths constant */
  164. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  165. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  166. sync_pos = (blank_width - sync_width + 1) / 2;
  167. border = (mode->vdisplay - height + 1) / 2;
  168. mode->crtc_vdisplay = height;
  169. mode->crtc_vblank_start = height + border;
  170. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  171. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  172. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  173. }
  174. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  175. {
  176. /*
  177. * Floating point operation is not supported. So the FACTOR
  178. * is defined, which can avoid the floating point computation
  179. * when calculating the panel ratio.
  180. */
  181. #define ACCURACY 12
  182. #define FACTOR (1 << ACCURACY)
  183. u32 ratio = source * FACTOR / target;
  184. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  185. }
  186. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  187. struct drm_display_mode *mode,
  188. struct drm_display_mode *adjusted_mode)
  189. {
  190. struct drm_device *dev = encoder->dev;
  191. struct drm_i915_private *dev_priv = dev->dev_private;
  192. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  193. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  194. struct drm_encoder *tmp_encoder;
  195. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  196. int pipe;
  197. /* Should never happen!! */
  198. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  199. DRM_ERROR("Can't support LVDS on pipe A\n");
  200. return false;
  201. }
  202. /* Should never happen!! */
  203. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  204. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  205. DRM_ERROR("Can't enable LVDS and another "
  206. "encoder on the same pipe\n");
  207. return false;
  208. }
  209. }
  210. /*
  211. * We have timings from the BIOS for the panel, put them in
  212. * to the adjusted mode. The CRTC will be set up for this mode,
  213. * with the panel scaling set up to source from the H/VDisplay
  214. * of the original mode.
  215. */
  216. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  217. if (HAS_PCH_SPLIT(dev)) {
  218. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  219. mode, adjusted_mode);
  220. return true;
  221. }
  222. /* Native modes don't need fitting */
  223. if (adjusted_mode->hdisplay == mode->hdisplay &&
  224. adjusted_mode->vdisplay == mode->vdisplay)
  225. goto out;
  226. /* 965+ wants fuzzy fitting */
  227. if (INTEL_INFO(dev)->gen >= 4)
  228. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  229. PFIT_FILTER_FUZZY);
  230. /*
  231. * Enable automatic panel scaling for non-native modes so that they fill
  232. * the screen. Should be enabled before the pipe is enabled, according
  233. * to register description and PRM.
  234. * Change the value here to see the borders for debugging
  235. */
  236. for_each_pipe(pipe)
  237. I915_WRITE(BCLRPAT(pipe), 0);
  238. switch (intel_lvds->fitting_mode) {
  239. case DRM_MODE_SCALE_CENTER:
  240. /*
  241. * For centered modes, we have to calculate border widths &
  242. * heights and modify the values programmed into the CRTC.
  243. */
  244. centre_horizontally(adjusted_mode, mode->hdisplay);
  245. centre_vertically(adjusted_mode, mode->vdisplay);
  246. border = LVDS_BORDER_ENABLE;
  247. break;
  248. case DRM_MODE_SCALE_ASPECT:
  249. /* Scale but preserve the aspect ratio */
  250. if (INTEL_INFO(dev)->gen >= 4) {
  251. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  252. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  253. /* 965+ is easy, it does everything in hw */
  254. if (scaled_width > scaled_height)
  255. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  256. else if (scaled_width < scaled_height)
  257. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  258. else if (adjusted_mode->hdisplay != mode->hdisplay)
  259. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  260. } else {
  261. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  262. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  263. /*
  264. * For earlier chips we have to calculate the scaling
  265. * ratio by hand and program it into the
  266. * PFIT_PGM_RATIO register
  267. */
  268. if (scaled_width > scaled_height) { /* pillar */
  269. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  270. border = LVDS_BORDER_ENABLE;
  271. if (mode->vdisplay != adjusted_mode->vdisplay) {
  272. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  273. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  274. bits << PFIT_VERT_SCALE_SHIFT);
  275. pfit_control |= (PFIT_ENABLE |
  276. VERT_INTERP_BILINEAR |
  277. HORIZ_INTERP_BILINEAR);
  278. }
  279. } else if (scaled_width < scaled_height) { /* letter */
  280. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  281. border = LVDS_BORDER_ENABLE;
  282. if (mode->hdisplay != adjusted_mode->hdisplay) {
  283. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  284. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  285. bits << PFIT_VERT_SCALE_SHIFT);
  286. pfit_control |= (PFIT_ENABLE |
  287. VERT_INTERP_BILINEAR |
  288. HORIZ_INTERP_BILINEAR);
  289. }
  290. } else
  291. /* Aspects match, Let hw scale both directions */
  292. pfit_control |= (PFIT_ENABLE |
  293. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  294. VERT_INTERP_BILINEAR |
  295. HORIZ_INTERP_BILINEAR);
  296. }
  297. break;
  298. case DRM_MODE_SCALE_FULLSCREEN:
  299. /*
  300. * Full scaling, even if it changes the aspect ratio.
  301. * Fortunately this is all done for us in hw.
  302. */
  303. if (mode->vdisplay != adjusted_mode->vdisplay ||
  304. mode->hdisplay != adjusted_mode->hdisplay) {
  305. pfit_control |= PFIT_ENABLE;
  306. if (INTEL_INFO(dev)->gen >= 4)
  307. pfit_control |= PFIT_SCALING_AUTO;
  308. else
  309. pfit_control |= (VERT_AUTO_SCALE |
  310. VERT_INTERP_BILINEAR |
  311. HORIZ_AUTO_SCALE |
  312. HORIZ_INTERP_BILINEAR);
  313. }
  314. break;
  315. default:
  316. break;
  317. }
  318. out:
  319. /* If not enabling scaling, be consistent and always use 0. */
  320. if ((pfit_control & PFIT_ENABLE) == 0) {
  321. pfit_control = 0;
  322. pfit_pgm_ratios = 0;
  323. }
  324. /* Make sure pre-965 set dither correctly */
  325. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  326. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  327. if (pfit_control != intel_lvds->pfit_control ||
  328. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  329. intel_lvds->pfit_control = pfit_control;
  330. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  331. intel_lvds->pfit_dirty = true;
  332. }
  333. dev_priv->lvds_border_bits = border;
  334. /*
  335. * XXX: It would be nice to support lower refresh rates on the
  336. * panels to reduce power consumption, and perhaps match the
  337. * user's requested refresh rate.
  338. */
  339. return true;
  340. }
  341. static void intel_lvds_prepare(struct drm_encoder *encoder)
  342. {
  343. struct drm_device *dev = encoder->dev;
  344. struct drm_i915_private *dev_priv = dev->dev_private;
  345. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  346. /* We try to do the minimum that is necessary in order to unlock
  347. * the registers for mode setting.
  348. *
  349. * On Ironlake, this is quite simple as we just set the unlock key
  350. * and ignore all subtleties. (This may cause some issues...)
  351. *
  352. * Prior to Ironlake, we must disable the pipe if we want to adjust
  353. * the panel fitter. However at all other times we can just reset
  354. * the registers regardless.
  355. */
  356. if (HAS_PCH_SPLIT(dev)) {
  357. I915_WRITE(PCH_PP_CONTROL,
  358. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  359. } else if (intel_lvds->pfit_dirty) {
  360. I915_WRITE(PP_CONTROL,
  361. (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
  362. & ~POWER_TARGET_ON);
  363. } else {
  364. I915_WRITE(PP_CONTROL,
  365. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  366. }
  367. }
  368. static void intel_lvds_commit(struct drm_encoder *encoder)
  369. {
  370. struct drm_device *dev = encoder->dev;
  371. struct drm_i915_private *dev_priv = dev->dev_private;
  372. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  373. /* Undo any unlocking done in prepare to prevent accidental
  374. * adjustment of the registers.
  375. */
  376. if (HAS_PCH_SPLIT(dev)) {
  377. u32 val = I915_READ(PCH_PP_CONTROL);
  378. if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
  379. I915_WRITE(PCH_PP_CONTROL, val & 0x3);
  380. } else {
  381. u32 val = I915_READ(PP_CONTROL);
  382. if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
  383. I915_WRITE(PP_CONTROL, val & 0x3);
  384. }
  385. /* Always do a full power on as we do not know what state
  386. * we were left in.
  387. */
  388. intel_lvds_enable(intel_lvds);
  389. }
  390. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  391. struct drm_display_mode *mode,
  392. struct drm_display_mode *adjusted_mode)
  393. {
  394. /*
  395. * The LVDS pin pair will already have been turned on in the
  396. * intel_crtc_mode_set since it has a large impact on the DPLL
  397. * settings.
  398. */
  399. }
  400. /**
  401. * Detect the LVDS connection.
  402. *
  403. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  404. * connected and closed means disconnected. We also send hotplug events as
  405. * needed, using lid status notification from the input layer.
  406. */
  407. static enum drm_connector_status
  408. intel_lvds_detect(struct drm_connector *connector, bool force)
  409. {
  410. struct drm_device *dev = connector->dev;
  411. enum drm_connector_status status = connector_status_connected;
  412. status = intel_panel_detect(dev);
  413. if (status != connector_status_unknown)
  414. return status;
  415. /* ACPI lid methods were generally unreliable in this generation, so
  416. * don't even bother.
  417. */
  418. if (IS_GEN2(dev) || IS_GEN3(dev))
  419. return connector_status_connected;
  420. return status;
  421. }
  422. /**
  423. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  424. */
  425. static int intel_lvds_get_modes(struct drm_connector *connector)
  426. {
  427. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  428. struct drm_device *dev = connector->dev;
  429. struct drm_display_mode *mode;
  430. if (intel_lvds->edid)
  431. return drm_add_edid_modes(connector, intel_lvds->edid);
  432. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  433. if (mode == NULL)
  434. return 0;
  435. drm_mode_probed_add(connector, mode);
  436. return 1;
  437. }
  438. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  439. {
  440. DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
  441. return 1;
  442. }
  443. /* The GPU hangs up on these systems if modeset is performed on LID open */
  444. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  445. {
  446. .callback = intel_no_modeset_on_lid_dmi_callback,
  447. .ident = "Toshiba Tecra A11",
  448. .matches = {
  449. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  450. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  451. },
  452. },
  453. { } /* terminating entry */
  454. };
  455. /*
  456. * Lid events. Note the use of 'modeset_on_lid':
  457. * - we set it on lid close, and reset it on open
  458. * - we use it as a "only once" bit (ie we ignore
  459. * duplicate events where it was already properly
  460. * set/reset)
  461. * - the suspend/resume paths will also set it to
  462. * zero, since they restore the mode ("lid open").
  463. */
  464. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  465. void *unused)
  466. {
  467. struct drm_i915_private *dev_priv =
  468. container_of(nb, struct drm_i915_private, lid_notifier);
  469. struct drm_device *dev = dev_priv->dev;
  470. struct drm_connector *connector = dev_priv->int_lvds_connector;
  471. /*
  472. * check and update the status of LVDS connector after receiving
  473. * the LID nofication event.
  474. */
  475. if (connector)
  476. connector->status = connector->funcs->detect(connector,
  477. false);
  478. /* Don't force modeset on machines where it causes a GPU lockup */
  479. if (dmi_check_system(intel_no_modeset_on_lid))
  480. return NOTIFY_OK;
  481. if (!acpi_lid_open()) {
  482. dev_priv->modeset_on_lid = 1;
  483. return NOTIFY_OK;
  484. }
  485. if (!dev_priv->modeset_on_lid)
  486. return NOTIFY_OK;
  487. dev_priv->modeset_on_lid = 0;
  488. mutex_lock(&dev->mode_config.mutex);
  489. drm_helper_resume_force_mode(dev);
  490. mutex_unlock(&dev->mode_config.mutex);
  491. return NOTIFY_OK;
  492. }
  493. /**
  494. * intel_lvds_destroy - unregister and free LVDS structures
  495. * @connector: connector to free
  496. *
  497. * Unregister the DDC bus for this connector then free the driver private
  498. * structure.
  499. */
  500. static void intel_lvds_destroy(struct drm_connector *connector)
  501. {
  502. struct drm_device *dev = connector->dev;
  503. struct drm_i915_private *dev_priv = dev->dev_private;
  504. if (dev_priv->lid_notifier.notifier_call)
  505. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  506. drm_sysfs_connector_remove(connector);
  507. drm_connector_cleanup(connector);
  508. kfree(connector);
  509. }
  510. static int intel_lvds_set_property(struct drm_connector *connector,
  511. struct drm_property *property,
  512. uint64_t value)
  513. {
  514. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  515. struct drm_device *dev = connector->dev;
  516. if (property == dev->mode_config.scaling_mode_property) {
  517. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  518. if (value == DRM_MODE_SCALE_NONE) {
  519. DRM_DEBUG_KMS("no scaling not supported\n");
  520. return -EINVAL;
  521. }
  522. if (intel_lvds->fitting_mode == value) {
  523. /* the LVDS scaling property is not changed */
  524. return 0;
  525. }
  526. intel_lvds->fitting_mode = value;
  527. if (crtc && crtc->enabled) {
  528. /*
  529. * If the CRTC is enabled, the display will be changed
  530. * according to the new panel fitting mode.
  531. */
  532. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  533. crtc->x, crtc->y, crtc->fb);
  534. }
  535. }
  536. return 0;
  537. }
  538. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  539. .dpms = intel_lvds_dpms,
  540. .mode_fixup = intel_lvds_mode_fixup,
  541. .prepare = intel_lvds_prepare,
  542. .mode_set = intel_lvds_mode_set,
  543. .commit = intel_lvds_commit,
  544. };
  545. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  546. .get_modes = intel_lvds_get_modes,
  547. .mode_valid = intel_lvds_mode_valid,
  548. .best_encoder = intel_best_encoder,
  549. };
  550. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  551. .dpms = drm_helper_connector_dpms,
  552. .detect = intel_lvds_detect,
  553. .fill_modes = drm_helper_probe_single_connector_modes,
  554. .set_property = intel_lvds_set_property,
  555. .destroy = intel_lvds_destroy,
  556. };
  557. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  558. .destroy = intel_encoder_destroy,
  559. };
  560. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  561. {
  562. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  563. return 1;
  564. }
  565. /* These systems claim to have LVDS, but really don't */
  566. static const struct dmi_system_id intel_no_lvds[] = {
  567. {
  568. .callback = intel_no_lvds_dmi_callback,
  569. .ident = "Apple Mac Mini (Core series)",
  570. .matches = {
  571. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  572. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  573. },
  574. },
  575. {
  576. .callback = intel_no_lvds_dmi_callback,
  577. .ident = "Apple Mac Mini (Core 2 series)",
  578. .matches = {
  579. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  580. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  581. },
  582. },
  583. {
  584. .callback = intel_no_lvds_dmi_callback,
  585. .ident = "MSI IM-945GSE-A",
  586. .matches = {
  587. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  588. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  589. },
  590. },
  591. {
  592. .callback = intel_no_lvds_dmi_callback,
  593. .ident = "Dell Studio Hybrid",
  594. .matches = {
  595. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  596. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  597. },
  598. },
  599. {
  600. .callback = intel_no_lvds_dmi_callback,
  601. .ident = "AOpen Mini PC",
  602. .matches = {
  603. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  604. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "AOpen Mini PC MP915",
  610. .matches = {
  611. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  612. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  613. },
  614. },
  615. {
  616. .callback = intel_no_lvds_dmi_callback,
  617. .ident = "AOpen i915GMm-HFS",
  618. .matches = {
  619. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  620. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  621. },
  622. },
  623. {
  624. .callback = intel_no_lvds_dmi_callback,
  625. .ident = "Aopen i945GTt-VFA",
  626. .matches = {
  627. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  628. },
  629. },
  630. {
  631. .callback = intel_no_lvds_dmi_callback,
  632. .ident = "Clientron U800",
  633. .matches = {
  634. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  635. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  636. },
  637. },
  638. { } /* terminating entry */
  639. };
  640. /**
  641. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  642. * @dev: drm device
  643. * @connector: LVDS connector
  644. *
  645. * Find the reduced downclock for LVDS in EDID.
  646. */
  647. static void intel_find_lvds_downclock(struct drm_device *dev,
  648. struct drm_display_mode *fixed_mode,
  649. struct drm_connector *connector)
  650. {
  651. struct drm_i915_private *dev_priv = dev->dev_private;
  652. struct drm_display_mode *scan;
  653. int temp_downclock;
  654. temp_downclock = fixed_mode->clock;
  655. list_for_each_entry(scan, &connector->probed_modes, head) {
  656. /*
  657. * If one mode has the same resolution with the fixed_panel
  658. * mode while they have the different refresh rate, it means
  659. * that the reduced downclock is found for the LVDS. In such
  660. * case we can set the different FPx0/1 to dynamically select
  661. * between low and high frequency.
  662. */
  663. if (scan->hdisplay == fixed_mode->hdisplay &&
  664. scan->hsync_start == fixed_mode->hsync_start &&
  665. scan->hsync_end == fixed_mode->hsync_end &&
  666. scan->htotal == fixed_mode->htotal &&
  667. scan->vdisplay == fixed_mode->vdisplay &&
  668. scan->vsync_start == fixed_mode->vsync_start &&
  669. scan->vsync_end == fixed_mode->vsync_end &&
  670. scan->vtotal == fixed_mode->vtotal) {
  671. if (scan->clock < temp_downclock) {
  672. /*
  673. * The downclock is already found. But we
  674. * expect to find the lower downclock.
  675. */
  676. temp_downclock = scan->clock;
  677. }
  678. }
  679. }
  680. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  681. /* We found the downclock for LVDS. */
  682. dev_priv->lvds_downclock_avail = 1;
  683. dev_priv->lvds_downclock = temp_downclock;
  684. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  685. "Normal clock %dKhz, downclock %dKhz\n",
  686. fixed_mode->clock, temp_downclock);
  687. }
  688. }
  689. /*
  690. * Enumerate the child dev array parsed from VBT to check whether
  691. * the LVDS is present.
  692. * If it is present, return 1.
  693. * If it is not present, return false.
  694. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  695. */
  696. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  697. u8 *i2c_pin)
  698. {
  699. struct drm_i915_private *dev_priv = dev->dev_private;
  700. int i;
  701. if (!dev_priv->child_dev_num)
  702. return true;
  703. for (i = 0; i < dev_priv->child_dev_num; i++) {
  704. struct child_device_config *child = dev_priv->child_dev + i;
  705. /* If the device type is not LFP, continue.
  706. * We have to check both the new identifiers as well as the
  707. * old for compatibility with some BIOSes.
  708. */
  709. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  710. child->device_type != DEVICE_TYPE_LFP)
  711. continue;
  712. if (child->i2c_pin)
  713. *i2c_pin = child->i2c_pin;
  714. /* However, we cannot trust the BIOS writers to populate
  715. * the VBT correctly. Since LVDS requires additional
  716. * information from AIM blocks, a non-zero addin offset is
  717. * a good indicator that the LVDS is actually present.
  718. */
  719. if (child->addin_offset)
  720. return true;
  721. /* But even then some BIOS writers perform some black magic
  722. * and instantiate the device without reference to any
  723. * additional data. Trust that if the VBT was written into
  724. * the OpRegion then they have validated the LVDS's existence.
  725. */
  726. if (dev_priv->opregion.vbt)
  727. return true;
  728. }
  729. return false;
  730. }
  731. static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
  732. {
  733. struct drm_i915_private *dev_priv = dev->dev_private;
  734. u8 buf = 0;
  735. struct i2c_msg msgs[] = {
  736. {
  737. .addr = 0xA0,
  738. .flags = 0,
  739. .len = 1,
  740. .buf = &buf,
  741. },
  742. };
  743. struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
  744. /* XXX this only appears to work when using GMBUS */
  745. if (intel_gmbus_is_forced_bit(i2c))
  746. return true;
  747. return i2c_transfer(i2c, msgs, 1) == 1;
  748. }
  749. /**
  750. * intel_lvds_init - setup LVDS connectors on this device
  751. * @dev: drm device
  752. *
  753. * Create the connector, register the LVDS DDC bus, and try to figure out what
  754. * modes we can display on the LVDS panel (if present).
  755. */
  756. bool intel_lvds_init(struct drm_device *dev)
  757. {
  758. struct drm_i915_private *dev_priv = dev->dev_private;
  759. struct intel_lvds *intel_lvds;
  760. struct intel_encoder *intel_encoder;
  761. struct intel_connector *intel_connector;
  762. struct drm_connector *connector;
  763. struct drm_encoder *encoder;
  764. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  765. struct drm_crtc *crtc;
  766. u32 lvds;
  767. int pipe;
  768. u8 pin;
  769. /* Skip init on machines we know falsely report LVDS */
  770. if (dmi_check_system(intel_no_lvds))
  771. return false;
  772. pin = GMBUS_PORT_PANEL;
  773. if (!lvds_is_present_in_vbt(dev, &pin)) {
  774. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  775. return false;
  776. }
  777. if (HAS_PCH_SPLIT(dev)) {
  778. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  779. return false;
  780. if (dev_priv->edp.support) {
  781. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  782. return false;
  783. }
  784. }
  785. if (!intel_lvds_ddc_probe(dev, pin)) {
  786. DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
  787. return false;
  788. }
  789. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  790. if (!intel_lvds) {
  791. return false;
  792. }
  793. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  794. if (!intel_connector) {
  795. kfree(intel_lvds);
  796. return false;
  797. }
  798. if (!HAS_PCH_SPLIT(dev)) {
  799. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  800. }
  801. intel_encoder = &intel_lvds->base;
  802. encoder = &intel_encoder->base;
  803. connector = &intel_connector->base;
  804. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  805. DRM_MODE_CONNECTOR_LVDS);
  806. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  807. DRM_MODE_ENCODER_LVDS);
  808. intel_connector_attach_encoder(intel_connector, intel_encoder);
  809. intel_encoder->type = INTEL_OUTPUT_LVDS;
  810. intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  811. intel_encoder->crtc_mask = (1 << 1);
  812. if (INTEL_INFO(dev)->gen >= 5)
  813. intel_encoder->crtc_mask |= (1 << 0);
  814. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  815. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  816. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  817. connector->interlace_allowed = false;
  818. connector->doublescan_allowed = false;
  819. /* create the scaling mode property */
  820. drm_mode_create_scaling_mode_property(dev);
  821. /*
  822. * the initial panel fitting mode will be FULL_SCREEN.
  823. */
  824. drm_connector_attach_property(&intel_connector->base,
  825. dev->mode_config.scaling_mode_property,
  826. DRM_MODE_SCALE_ASPECT);
  827. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  828. /*
  829. * LVDS discovery:
  830. * 1) check for EDID on DDC
  831. * 2) check for VBT data
  832. * 3) check to see if LVDS is already on
  833. * if none of the above, no panel
  834. * 4) make sure lid is open
  835. * if closed, act like it's not there for now
  836. */
  837. /*
  838. * Attempt to get the fixed panel mode from DDC. Assume that the
  839. * preferred mode is the right one.
  840. */
  841. intel_lvds->edid = drm_get_edid(connector,
  842. &dev_priv->gmbus[pin].adapter);
  843. if (intel_lvds->edid) {
  844. if (drm_add_edid_modes(connector,
  845. intel_lvds->edid)) {
  846. drm_mode_connector_update_edid_property(connector,
  847. intel_lvds->edid);
  848. } else {
  849. kfree(intel_lvds->edid);
  850. intel_lvds->edid = NULL;
  851. }
  852. }
  853. if (!intel_lvds->edid) {
  854. /* Didn't get an EDID, so
  855. * Set wide sync ranges so we get all modes
  856. * handed to valid_mode for checking
  857. */
  858. connector->display_info.min_vfreq = 0;
  859. connector->display_info.max_vfreq = 200;
  860. connector->display_info.min_hfreq = 0;
  861. connector->display_info.max_hfreq = 200;
  862. }
  863. list_for_each_entry(scan, &connector->probed_modes, head) {
  864. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  865. intel_lvds->fixed_mode =
  866. drm_mode_duplicate(dev, scan);
  867. intel_find_lvds_downclock(dev,
  868. intel_lvds->fixed_mode,
  869. connector);
  870. goto out;
  871. }
  872. }
  873. /* Failed to get EDID, what about VBT? */
  874. if (dev_priv->lfp_lvds_vbt_mode) {
  875. intel_lvds->fixed_mode =
  876. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  877. if (intel_lvds->fixed_mode) {
  878. intel_lvds->fixed_mode->type |=
  879. DRM_MODE_TYPE_PREFERRED;
  880. goto out;
  881. }
  882. }
  883. /*
  884. * If we didn't get EDID, try checking if the panel is already turned
  885. * on. If so, assume that whatever is currently programmed is the
  886. * correct mode.
  887. */
  888. /* Ironlake: FIXME if still fail, not try pipe mode now */
  889. if (HAS_PCH_SPLIT(dev))
  890. goto failed;
  891. lvds = I915_READ(LVDS);
  892. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  893. crtc = intel_get_crtc_for_pipe(dev, pipe);
  894. if (crtc && (lvds & LVDS_PORT_EN)) {
  895. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  896. if (intel_lvds->fixed_mode) {
  897. intel_lvds->fixed_mode->type |=
  898. DRM_MODE_TYPE_PREFERRED;
  899. goto out;
  900. }
  901. }
  902. /* If we still don't have a mode after all that, give up. */
  903. if (!intel_lvds->fixed_mode)
  904. goto failed;
  905. out:
  906. if (HAS_PCH_SPLIT(dev)) {
  907. u32 pwm;
  908. pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
  909. /* make sure PWM is enabled and locked to the LVDS pipe */
  910. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  911. if (pipe == 0 && (pwm & PWM_PIPE_B))
  912. I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
  913. if (pipe)
  914. pwm |= PWM_PIPE_B;
  915. else
  916. pwm &= ~PWM_PIPE_B;
  917. I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
  918. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  919. pwm |= PWM_PCH_ENABLE;
  920. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  921. }
  922. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  923. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  924. DRM_DEBUG_KMS("lid notifier registration failed\n");
  925. dev_priv->lid_notifier.notifier_call = NULL;
  926. }
  927. /* keep the LVDS connector */
  928. dev_priv->int_lvds_connector = connector;
  929. drm_sysfs_connector_add(connector);
  930. return true;
  931. failed:
  932. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  933. drm_connector_cleanup(connector);
  934. drm_encoder_cleanup(encoder);
  935. kfree(intel_lvds);
  936. kfree(intel_connector);
  937. return false;
  938. }