Kconfig 8.2 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for PCI-attached cryptographic adapters"
  52. depends on S390
  53. select ZCRYPT_MONOLITHIC if ZCRYPT="y"
  54. select HW_RANDOM
  55. help
  56. Select this option if you want to use a PCI-attached cryptographic
  57. adapter like:
  58. + PCI Cryptographic Accelerator (PCICA)
  59. + PCI Cryptographic Coprocessor (PCICC)
  60. + PCI-X Cryptographic Coprocessor (PCIXCC)
  61. + Crypto Express2 Coprocessor (CEX2C)
  62. + Crypto Express2 Accelerator (CEX2A)
  63. config ZCRYPT_MONOLITHIC
  64. bool "Monolithic zcrypt module"
  65. depends on ZCRYPT
  66. help
  67. Select this option if you want to have a single module z90crypt,
  68. that contains all parts of the crypto device driver (ap bus,
  69. request router and all the card drivers).
  70. config CRYPTO_SHA1_S390
  71. tristate "SHA1 digest algorithm"
  72. depends on S390
  73. select CRYPTO_HASH
  74. help
  75. This is the s390 hardware accelerated implementation of the
  76. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  77. config CRYPTO_SHA256_S390
  78. tristate "SHA256 digest algorithm"
  79. depends on S390
  80. select CRYPTO_HASH
  81. help
  82. This is the s390 hardware accelerated implementation of the
  83. SHA256 secure hash standard (DFIPS 180-2).
  84. This version of SHA implements a 256 bit hash with 128 bits of
  85. security against collision attacks.
  86. config CRYPTO_SHA512_S390
  87. tristate "SHA384 and SHA512 digest algorithm"
  88. depends on S390
  89. select CRYPTO_HASH
  90. help
  91. This is the s390 hardware accelerated implementation of the
  92. SHA512 secure hash standard.
  93. This version of SHA implements a 512 bit hash with 256 bits of
  94. security against collision attacks. The code also includes SHA-384,
  95. a 384 bit hash with 192 bits of security against collision attacks.
  96. config CRYPTO_DES_S390
  97. tristate "DES and Triple DES cipher algorithms"
  98. depends on S390
  99. select CRYPTO_ALGAPI
  100. select CRYPTO_BLKCIPHER
  101. help
  102. This us the s390 hardware accelerated implementation of the
  103. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  104. config CRYPTO_AES_S390
  105. tristate "AES cipher algorithms"
  106. depends on S390
  107. select CRYPTO_ALGAPI
  108. select CRYPTO_BLKCIPHER
  109. help
  110. This is the s390 hardware accelerated implementation of the
  111. AES cipher algorithms (FIPS-197). AES uses the Rijndael
  112. algorithm.
  113. Rijndael appears to be consistently a very good performer in
  114. both hardware and software across a wide range of computing
  115. environments regardless of its use in feedback or non-feedback
  116. modes. Its key setup time is excellent, and its key agility is
  117. good. Rijndael's very low memory requirements make it very well
  118. suited for restricted-space environments, in which it also
  119. demonstrates excellent performance. Rijndael's operations are
  120. among the easiest to defend against power and timing attacks.
  121. On s390 the System z9-109 currently only supports the key size
  122. of 128 bit.
  123. config S390_PRNG
  124. tristate "Pseudo random number generator device driver"
  125. depends on S390
  126. default "m"
  127. help
  128. Select this option if you want to use the s390 pseudo random number
  129. generator. The PRNG is part of the cryptographic processor functions
  130. and uses triple-DES to generate secure random numbers like the
  131. ANSI X9.17 standard. The PRNG is usable via the char device
  132. /dev/prandom.
  133. config CRYPTO_DEV_MV_CESA
  134. tristate "Marvell's Cryptographic Engine"
  135. depends on PLAT_ORION
  136. select CRYPTO_ALGAPI
  137. select CRYPTO_AES
  138. select CRYPTO_BLKCIPHER2
  139. help
  140. This driver allows you to utilize the Cryptographic Engines and
  141. Security Accelerator (CESA) which can be found on the Marvell Orion
  142. and Kirkwood SoCs, such as QNAP's TS-209.
  143. Currently the driver supports AES in ECB and CBC mode without DMA.
  144. config CRYPTO_DEV_NIAGARA2
  145. tristate "Niagara2 Stream Processing Unit driver"
  146. select CRYPTO_DES
  147. select CRYPTO_ALGAPI
  148. depends on SPARC64
  149. help
  150. Each core of a Niagara2 processor contains a Stream
  151. Processing Unit, which itself contains several cryptographic
  152. sub-units. One set provides the Modular Arithmetic Unit,
  153. used for SSL offload. The other set provides the Cipher
  154. Group, which can perform encryption, decryption, hashing,
  155. checksumming, and raw copies.
  156. config CRYPTO_DEV_HIFN_795X
  157. tristate "Driver HIFN 795x crypto accelerator chips"
  158. select CRYPTO_DES
  159. select CRYPTO_ALGAPI
  160. select CRYPTO_BLKCIPHER
  161. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  162. depends on PCI
  163. help
  164. This option allows you to have support for HIFN 795x crypto adapters.
  165. config CRYPTO_DEV_HIFN_795X_RNG
  166. bool "HIFN 795x random number generator"
  167. depends on CRYPTO_DEV_HIFN_795X
  168. help
  169. Select this option if you want to enable the random number generator
  170. on the HIFN 795x crypto adapters.
  171. config CRYPTO_DEV_TALITOS
  172. tristate "Talitos Freescale Security Engine (SEC)"
  173. select CRYPTO_ALGAPI
  174. select CRYPTO_AUTHENC
  175. select HW_RANDOM
  176. depends on FSL_SOC
  177. help
  178. Say 'Y' here to use the Freescale Security Engine (SEC)
  179. to offload cryptographic algorithm computation.
  180. The Freescale SEC is present on PowerQUICC 'E' processors, such
  181. as the MPC8349E and MPC8548E.
  182. To compile this driver as a module, choose M here: the module
  183. will be called talitos.
  184. config CRYPTO_DEV_IXP4XX
  185. tristate "Driver for IXP4xx crypto hardware acceleration"
  186. depends on ARCH_IXP4XX
  187. select CRYPTO_DES
  188. select CRYPTO_ALGAPI
  189. select CRYPTO_AUTHENC
  190. select CRYPTO_BLKCIPHER
  191. help
  192. Driver for the IXP4xx NPE crypto engine.
  193. config CRYPTO_DEV_PPC4XX
  194. tristate "Driver AMCC PPC4xx crypto accelerator"
  195. depends on PPC && 4xx
  196. select CRYPTO_HASH
  197. select CRYPTO_ALGAPI
  198. select CRYPTO_BLKCIPHER
  199. help
  200. This option allows you to have support for AMCC crypto acceleration.
  201. config CRYPTO_DEV_OMAP_SHAM
  202. tristate "Support for OMAP SHA1/MD5 hw accelerator"
  203. depends on ARCH_OMAP2 || ARCH_OMAP3
  204. select CRYPTO_SHA1
  205. select CRYPTO_MD5
  206. help
  207. OMAP processors have SHA1/MD5 hw accelerator. Select this if you
  208. want to use the OMAP module for SHA1/MD5 algorithms.
  209. config CRYPTO_DEV_OMAP_AES
  210. tristate "Support for OMAP AES hw engine"
  211. depends on ARCH_OMAP2 || ARCH_OMAP3
  212. select CRYPTO_AES
  213. help
  214. OMAP processors have AES module accelerator. Select this if you
  215. want to use the OMAP module for AES algorithms.
  216. config CRYPTO_DEV_PICOXCELL
  217. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  218. depends on ARCH_PICOXCELL
  219. select CRYPTO_AES
  220. select CRYPTO_AUTHENC
  221. select CRYPTO_ALGAPI
  222. select CRYPTO_DES
  223. select CRYPTO_CBC
  224. select CRYPTO_ECB
  225. select CRYPTO_SEQIV
  226. help
  227. This option enables support for the hardware offload engines in the
  228. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  229. and for 3gpp Layer 2 ciphering support.
  230. Saying m here will build a module named pipcoxcell_crypto.
  231. endif # CRYPTO_HW