cciss.c 138 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981
  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/major.h>
  30. #include <linux/fs.h>
  31. #include <linux/bio.h>
  32. #include <linux/blkpg.h>
  33. #include <linux/timer.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/init.h>
  37. #include <linux/jiffies.h>
  38. #include <linux/hdreg.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/compat.h>
  41. #include <linux/mutex.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/genhd.h>
  47. #include <linux/completion.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/sg.h>
  50. #include <scsi/scsi_ioctl.h>
  51. #include <linux/cdrom.h>
  52. #include <linux/scatterlist.h>
  53. #include <linux/kthread.h>
  54. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  55. #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  56. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  57. /* Embedded module documentation macros - see modules.h */
  58. MODULE_AUTHOR("Hewlett-Packard Company");
  59. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  60. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  61. MODULE_VERSION("3.6.26");
  62. MODULE_LICENSE("GPL");
  63. static DEFINE_MUTEX(cciss_mutex);
  64. static struct proc_dir_entry *proc_cciss;
  65. #include "cciss_cmd.h"
  66. #include "cciss.h"
  67. #include <linux/cciss_ioctl.h>
  68. /* define the PCI info for the cards we can control */
  69. static const struct pci_device_id cciss_pci_device_id[] = {
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  93. /* board_id = Subsystem Device ID & Vendor ID
  94. * product = Marketing Name for the board
  95. * access = Address of the struct of function pointers
  96. */
  97. static struct board_type products[] = {
  98. {0x40700E11, "Smart Array 5300", &SA5_access},
  99. {0x40800E11, "Smart Array 5i", &SA5B_access},
  100. {0x40820E11, "Smart Array 532", &SA5B_access},
  101. {0x40830E11, "Smart Array 5312", &SA5B_access},
  102. {0x409A0E11, "Smart Array 641", &SA5_access},
  103. {0x409B0E11, "Smart Array 642", &SA5_access},
  104. {0x409C0E11, "Smart Array 6400", &SA5_access},
  105. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  106. {0x40910E11, "Smart Array 6i", &SA5_access},
  107. {0x3225103C, "Smart Array P600", &SA5_access},
  108. {0x3223103C, "Smart Array P800", &SA5_access},
  109. {0x3234103C, "Smart Array P400", &SA5_access},
  110. {0x3235103C, "Smart Array P400i", &SA5_access},
  111. {0x3211103C, "Smart Array E200i", &SA5_access},
  112. {0x3212103C, "Smart Array E200", &SA5_access},
  113. {0x3213103C, "Smart Array E200i", &SA5_access},
  114. {0x3214103C, "Smart Array E200i", &SA5_access},
  115. {0x3215103C, "Smart Array E200i", &SA5_access},
  116. {0x3237103C, "Smart Array E500", &SA5_access},
  117. {0x3223103C, "Smart Array P800", &SA5_access},
  118. {0x3234103C, "Smart Array P400", &SA5_access},
  119. {0x323D103C, "Smart Array P700m", &SA5_access},
  120. };
  121. /* How long to wait (in milliseconds) for board to go into simple mode */
  122. #define MAX_CONFIG_WAIT 30000
  123. #define MAX_IOCTL_CONFIG_WAIT 1000
  124. /*define how many times we will try a command because of bus resets */
  125. #define MAX_CMD_RETRIES 3
  126. #define MAX_CTLR 32
  127. /* Originally cciss driver only supports 8 major numbers */
  128. #define MAX_CTLR_ORIG 8
  129. static ctlr_info_t *hba[MAX_CTLR];
  130. static struct task_struct *cciss_scan_thread;
  131. static DEFINE_MUTEX(scan_mutex);
  132. static LIST_HEAD(scan_q);
  133. static void do_cciss_request(struct request_queue *q);
  134. static irqreturn_t do_cciss_intx(int irq, void *dev_id);
  135. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
  136. static int cciss_open(struct block_device *bdev, fmode_t mode);
  137. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
  138. static int cciss_release(struct gendisk *disk, fmode_t mode);
  139. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  140. unsigned int cmd, unsigned long arg);
  141. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  142. unsigned int cmd, unsigned long arg);
  143. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  144. static int cciss_revalidate(struct gendisk *disk);
  145. static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
  146. static int deregister_disk(ctlr_info_t *h, int drv_index,
  147. int clear_all, int via_ioctl);
  148. static void cciss_read_capacity(ctlr_info_t *h, int logvol,
  149. sector_t *total_size, unsigned int *block_size);
  150. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  151. sector_t *total_size, unsigned int *block_size);
  152. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  153. sector_t total_size,
  154. unsigned int block_size, InquiryData_struct *inq_buff,
  155. drive_info_struct *drv);
  156. static void __devinit cciss_interrupt_mode(ctlr_info_t *);
  157. static void start_io(ctlr_info_t *h);
  158. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  159. __u8 page_code, unsigned char scsi3addr[],
  160. int cmd_type);
  161. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  162. int attempt_retry);
  163. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  164. static int add_to_scan_list(struct ctlr_info *h);
  165. static int scan_thread(void *data);
  166. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  167. static void cciss_hba_release(struct device *dev);
  168. static void cciss_device_release(struct device *dev);
  169. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
  170. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
  171. static inline u32 next_command(ctlr_info_t *h);
  172. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  173. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  174. u64 *cfg_offset);
  175. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  176. unsigned long *memory_bar);
  177. static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
  178. /* performant mode helper functions */
  179. static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
  180. int *bucket_map);
  181. static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
  182. #ifdef CONFIG_PROC_FS
  183. static void cciss_procinit(ctlr_info_t *h);
  184. #else
  185. static void cciss_procinit(ctlr_info_t *h)
  186. {
  187. }
  188. #endif /* CONFIG_PROC_FS */
  189. #ifdef CONFIG_COMPAT
  190. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  191. unsigned, unsigned long);
  192. #endif
  193. static const struct block_device_operations cciss_fops = {
  194. .owner = THIS_MODULE,
  195. .open = cciss_unlocked_open,
  196. .release = cciss_release,
  197. .ioctl = do_ioctl,
  198. .getgeo = cciss_getgeo,
  199. #ifdef CONFIG_COMPAT
  200. .compat_ioctl = cciss_compat_ioctl,
  201. #endif
  202. .revalidate_disk = cciss_revalidate,
  203. };
  204. /* set_performant_mode: Modify the tag for cciss performant
  205. * set bit 0 for pull model, bits 3-1 for block fetch
  206. * register number
  207. */
  208. static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
  209. {
  210. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  211. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  212. }
  213. /*
  214. * Enqueuing and dequeuing functions for cmdlists.
  215. */
  216. static inline void addQ(struct list_head *list, CommandList_struct *c)
  217. {
  218. list_add_tail(&c->list, list);
  219. }
  220. static inline void removeQ(CommandList_struct *c)
  221. {
  222. /*
  223. * After kexec/dump some commands might still
  224. * be in flight, which the firmware will try
  225. * to complete. Resetting the firmware doesn't work
  226. * with old fw revisions, so we have to mark
  227. * them off as 'stale' to prevent the driver from
  228. * falling over.
  229. */
  230. if (WARN_ON(list_empty(&c->list))) {
  231. c->cmd_type = CMD_MSG_STALE;
  232. return;
  233. }
  234. list_del_init(&c->list);
  235. }
  236. static void enqueue_cmd_and_start_io(ctlr_info_t *h,
  237. CommandList_struct *c)
  238. {
  239. unsigned long flags;
  240. set_performant_mode(h, c);
  241. spin_lock_irqsave(&h->lock, flags);
  242. addQ(&h->reqQ, c);
  243. h->Qdepth++;
  244. if (h->Qdepth > h->maxQsinceinit)
  245. h->maxQsinceinit = h->Qdepth;
  246. start_io(h);
  247. spin_unlock_irqrestore(&h->lock, flags);
  248. }
  249. static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
  250. int nr_cmds)
  251. {
  252. int i;
  253. if (!cmd_sg_list)
  254. return;
  255. for (i = 0; i < nr_cmds; i++) {
  256. kfree(cmd_sg_list[i]);
  257. cmd_sg_list[i] = NULL;
  258. }
  259. kfree(cmd_sg_list);
  260. }
  261. static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
  262. ctlr_info_t *h, int chainsize, int nr_cmds)
  263. {
  264. int j;
  265. SGDescriptor_struct **cmd_sg_list;
  266. if (chainsize <= 0)
  267. return NULL;
  268. cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
  269. if (!cmd_sg_list)
  270. return NULL;
  271. /* Build up chain blocks for each command */
  272. for (j = 0; j < nr_cmds; j++) {
  273. /* Need a block of chainsized s/g elements. */
  274. cmd_sg_list[j] = kmalloc((chainsize *
  275. sizeof(*cmd_sg_list[j])), GFP_KERNEL);
  276. if (!cmd_sg_list[j]) {
  277. dev_err(&h->pdev->dev, "Cannot get memory "
  278. "for s/g chains.\n");
  279. goto clean;
  280. }
  281. }
  282. return cmd_sg_list;
  283. clean:
  284. cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
  285. return NULL;
  286. }
  287. static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
  288. {
  289. SGDescriptor_struct *chain_sg;
  290. u64bit temp64;
  291. if (c->Header.SGTotal <= h->max_cmd_sgentries)
  292. return;
  293. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  294. temp64.val32.lower = chain_sg->Addr.lower;
  295. temp64.val32.upper = chain_sg->Addr.upper;
  296. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  297. }
  298. static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
  299. SGDescriptor_struct *chain_block, int len)
  300. {
  301. SGDescriptor_struct *chain_sg;
  302. u64bit temp64;
  303. chain_sg = &c->SG[h->max_cmd_sgentries - 1];
  304. chain_sg->Ext = CCISS_SG_CHAIN;
  305. chain_sg->Len = len;
  306. temp64.val = pci_map_single(h->pdev, chain_block, len,
  307. PCI_DMA_TODEVICE);
  308. chain_sg->Addr.lower = temp64.val32.lower;
  309. chain_sg->Addr.upper = temp64.val32.upper;
  310. }
  311. #include "cciss_scsi.c" /* For SCSI tape support */
  312. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  313. "UNKNOWN"
  314. };
  315. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
  316. #ifdef CONFIG_PROC_FS
  317. /*
  318. * Report information about this controller.
  319. */
  320. #define ENG_GIG 1000000000
  321. #define ENG_GIG_FACTOR (ENG_GIG/512)
  322. #define ENGAGE_SCSI "engage scsi"
  323. static void cciss_seq_show_header(struct seq_file *seq)
  324. {
  325. ctlr_info_t *h = seq->private;
  326. seq_printf(seq, "%s: HP %s Controller\n"
  327. "Board ID: 0x%08lx\n"
  328. "Firmware Version: %c%c%c%c\n"
  329. "IRQ: %d\n"
  330. "Logical drives: %d\n"
  331. "Current Q depth: %d\n"
  332. "Current # commands on controller: %d\n"
  333. "Max Q depth since init: %d\n"
  334. "Max # commands on controller since init: %d\n"
  335. "Max SG entries since init: %d\n",
  336. h->devname,
  337. h->product_name,
  338. (unsigned long)h->board_id,
  339. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  340. h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
  341. h->num_luns,
  342. h->Qdepth, h->commands_outstanding,
  343. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  344. #ifdef CONFIG_CISS_SCSI_TAPE
  345. cciss_seq_tape_report(seq, h);
  346. #endif /* CONFIG_CISS_SCSI_TAPE */
  347. }
  348. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  349. {
  350. ctlr_info_t *h = seq->private;
  351. unsigned long flags;
  352. /* prevent displaying bogus info during configuration
  353. * or deconfiguration of a logical volume
  354. */
  355. spin_lock_irqsave(&h->lock, flags);
  356. if (h->busy_configuring) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return ERR_PTR(-EBUSY);
  359. }
  360. h->busy_configuring = 1;
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. if (*pos == 0)
  363. cciss_seq_show_header(seq);
  364. return pos;
  365. }
  366. static int cciss_seq_show(struct seq_file *seq, void *v)
  367. {
  368. sector_t vol_sz, vol_sz_frac;
  369. ctlr_info_t *h = seq->private;
  370. unsigned ctlr = h->ctlr;
  371. loff_t *pos = v;
  372. drive_info_struct *drv = h->drv[*pos];
  373. if (*pos > h->highest_lun)
  374. return 0;
  375. if (drv == NULL) /* it's possible for h->drv[] to have holes. */
  376. return 0;
  377. if (drv->heads == 0)
  378. return 0;
  379. vol_sz = drv->nr_blocks;
  380. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  381. vol_sz_frac *= 100;
  382. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  383. if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
  384. drv->raid_level = RAID_UNKNOWN;
  385. seq_printf(seq, "cciss/c%dd%d:"
  386. "\t%4u.%02uGB\tRAID %s\n",
  387. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  388. raid_label[drv->raid_level]);
  389. return 0;
  390. }
  391. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  392. {
  393. ctlr_info_t *h = seq->private;
  394. if (*pos > h->highest_lun)
  395. return NULL;
  396. *pos += 1;
  397. return pos;
  398. }
  399. static void cciss_seq_stop(struct seq_file *seq, void *v)
  400. {
  401. ctlr_info_t *h = seq->private;
  402. /* Only reset h->busy_configuring if we succeeded in setting
  403. * it during cciss_seq_start. */
  404. if (v == ERR_PTR(-EBUSY))
  405. return;
  406. h->busy_configuring = 0;
  407. }
  408. static const struct seq_operations cciss_seq_ops = {
  409. .start = cciss_seq_start,
  410. .show = cciss_seq_show,
  411. .next = cciss_seq_next,
  412. .stop = cciss_seq_stop,
  413. };
  414. static int cciss_seq_open(struct inode *inode, struct file *file)
  415. {
  416. int ret = seq_open(file, &cciss_seq_ops);
  417. struct seq_file *seq = file->private_data;
  418. if (!ret)
  419. seq->private = PDE(inode)->data;
  420. return ret;
  421. }
  422. static ssize_t
  423. cciss_proc_write(struct file *file, const char __user *buf,
  424. size_t length, loff_t *ppos)
  425. {
  426. int err;
  427. char *buffer;
  428. #ifndef CONFIG_CISS_SCSI_TAPE
  429. return -EINVAL;
  430. #endif
  431. if (!buf || length > PAGE_SIZE - 1)
  432. return -EINVAL;
  433. buffer = (char *)__get_free_page(GFP_KERNEL);
  434. if (!buffer)
  435. return -ENOMEM;
  436. err = -EFAULT;
  437. if (copy_from_user(buffer, buf, length))
  438. goto out;
  439. buffer[length] = '\0';
  440. #ifdef CONFIG_CISS_SCSI_TAPE
  441. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  442. struct seq_file *seq = file->private_data;
  443. ctlr_info_t *h = seq->private;
  444. err = cciss_engage_scsi(h);
  445. if (err == 0)
  446. err = length;
  447. } else
  448. #endif /* CONFIG_CISS_SCSI_TAPE */
  449. err = -EINVAL;
  450. /* might be nice to have "disengage" too, but it's not
  451. safely possible. (only 1 module use count, lock issues.) */
  452. out:
  453. free_page((unsigned long)buffer);
  454. return err;
  455. }
  456. static const struct file_operations cciss_proc_fops = {
  457. .owner = THIS_MODULE,
  458. .open = cciss_seq_open,
  459. .read = seq_read,
  460. .llseek = seq_lseek,
  461. .release = seq_release,
  462. .write = cciss_proc_write,
  463. };
  464. static void __devinit cciss_procinit(ctlr_info_t *h)
  465. {
  466. struct proc_dir_entry *pde;
  467. if (proc_cciss == NULL)
  468. proc_cciss = proc_mkdir("driver/cciss", NULL);
  469. if (!proc_cciss)
  470. return;
  471. pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  472. S_IROTH, proc_cciss,
  473. &cciss_proc_fops, h);
  474. }
  475. #endif /* CONFIG_PROC_FS */
  476. #define MAX_PRODUCT_NAME_LEN 19
  477. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  478. #define to_drv(n) container_of(n, drive_info_struct, dev)
  479. /* List of controllers which cannot be reset on kexec with reset_devices */
  480. static u32 unresettable_controller[] = {
  481. 0x324a103C, /* Smart Array P712m */
  482. 0x324b103C, /* SmartArray P711m */
  483. 0x3223103C, /* Smart Array P800 */
  484. 0x3234103C, /* Smart Array P400 */
  485. 0x3235103C, /* Smart Array P400i */
  486. 0x3211103C, /* Smart Array E200i */
  487. 0x3212103C, /* Smart Array E200 */
  488. 0x3213103C, /* Smart Array E200i */
  489. 0x3214103C, /* Smart Array E200i */
  490. 0x3215103C, /* Smart Array E200i */
  491. 0x3237103C, /* Smart Array E500 */
  492. 0x323D103C, /* Smart Array P700m */
  493. 0x409C0E11, /* Smart Array 6400 */
  494. 0x409D0E11, /* Smart Array 6400 EM */
  495. };
  496. static int ctlr_is_resettable(struct ctlr_info *h)
  497. {
  498. int i;
  499. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  500. if (unresettable_controller[i] == h->board_id)
  501. return 0;
  502. return 1;
  503. }
  504. static ssize_t host_show_resettable(struct device *dev,
  505. struct device_attribute *attr,
  506. char *buf)
  507. {
  508. struct ctlr_info *h = to_hba(dev);
  509. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
  510. }
  511. static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
  512. static ssize_t host_store_rescan(struct device *dev,
  513. struct device_attribute *attr,
  514. const char *buf, size_t count)
  515. {
  516. struct ctlr_info *h = to_hba(dev);
  517. add_to_scan_list(h);
  518. wake_up_process(cciss_scan_thread);
  519. wait_for_completion_interruptible(&h->scan_wait);
  520. return count;
  521. }
  522. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  523. static ssize_t dev_show_unique_id(struct device *dev,
  524. struct device_attribute *attr,
  525. char *buf)
  526. {
  527. drive_info_struct *drv = to_drv(dev);
  528. struct ctlr_info *h = to_hba(drv->dev.parent);
  529. __u8 sn[16];
  530. unsigned long flags;
  531. int ret = 0;
  532. spin_lock_irqsave(&h->lock, flags);
  533. if (h->busy_configuring)
  534. ret = -EBUSY;
  535. else
  536. memcpy(sn, drv->serial_no, sizeof(sn));
  537. spin_unlock_irqrestore(&h->lock, flags);
  538. if (ret)
  539. return ret;
  540. else
  541. return snprintf(buf, 16 * 2 + 2,
  542. "%02X%02X%02X%02X%02X%02X%02X%02X"
  543. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  544. sn[0], sn[1], sn[2], sn[3],
  545. sn[4], sn[5], sn[6], sn[7],
  546. sn[8], sn[9], sn[10], sn[11],
  547. sn[12], sn[13], sn[14], sn[15]);
  548. }
  549. static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  550. static ssize_t dev_show_vendor(struct device *dev,
  551. struct device_attribute *attr,
  552. char *buf)
  553. {
  554. drive_info_struct *drv = to_drv(dev);
  555. struct ctlr_info *h = to_hba(drv->dev.parent);
  556. char vendor[VENDOR_LEN + 1];
  557. unsigned long flags;
  558. int ret = 0;
  559. spin_lock_irqsave(&h->lock, flags);
  560. if (h->busy_configuring)
  561. ret = -EBUSY;
  562. else
  563. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  564. spin_unlock_irqrestore(&h->lock, flags);
  565. if (ret)
  566. return ret;
  567. else
  568. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  569. }
  570. static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  571. static ssize_t dev_show_model(struct device *dev,
  572. struct device_attribute *attr,
  573. char *buf)
  574. {
  575. drive_info_struct *drv = to_drv(dev);
  576. struct ctlr_info *h = to_hba(drv->dev.parent);
  577. char model[MODEL_LEN + 1];
  578. unsigned long flags;
  579. int ret = 0;
  580. spin_lock_irqsave(&h->lock, flags);
  581. if (h->busy_configuring)
  582. ret = -EBUSY;
  583. else
  584. memcpy(model, drv->model, MODEL_LEN + 1);
  585. spin_unlock_irqrestore(&h->lock, flags);
  586. if (ret)
  587. return ret;
  588. else
  589. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  590. }
  591. static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  592. static ssize_t dev_show_rev(struct device *dev,
  593. struct device_attribute *attr,
  594. char *buf)
  595. {
  596. drive_info_struct *drv = to_drv(dev);
  597. struct ctlr_info *h = to_hba(drv->dev.parent);
  598. char rev[REV_LEN + 1];
  599. unsigned long flags;
  600. int ret = 0;
  601. spin_lock_irqsave(&h->lock, flags);
  602. if (h->busy_configuring)
  603. ret = -EBUSY;
  604. else
  605. memcpy(rev, drv->rev, REV_LEN + 1);
  606. spin_unlock_irqrestore(&h->lock, flags);
  607. if (ret)
  608. return ret;
  609. else
  610. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  611. }
  612. static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  613. static ssize_t cciss_show_lunid(struct device *dev,
  614. struct device_attribute *attr, char *buf)
  615. {
  616. drive_info_struct *drv = to_drv(dev);
  617. struct ctlr_info *h = to_hba(drv->dev.parent);
  618. unsigned long flags;
  619. unsigned char lunid[8];
  620. spin_lock_irqsave(&h->lock, flags);
  621. if (h->busy_configuring) {
  622. spin_unlock_irqrestore(&h->lock, flags);
  623. return -EBUSY;
  624. }
  625. if (!drv->heads) {
  626. spin_unlock_irqrestore(&h->lock, flags);
  627. return -ENOTTY;
  628. }
  629. memcpy(lunid, drv->LunID, sizeof(lunid));
  630. spin_unlock_irqrestore(&h->lock, flags);
  631. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  632. lunid[0], lunid[1], lunid[2], lunid[3],
  633. lunid[4], lunid[5], lunid[6], lunid[7]);
  634. }
  635. static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
  636. static ssize_t cciss_show_raid_level(struct device *dev,
  637. struct device_attribute *attr, char *buf)
  638. {
  639. drive_info_struct *drv = to_drv(dev);
  640. struct ctlr_info *h = to_hba(drv->dev.parent);
  641. int raid;
  642. unsigned long flags;
  643. spin_lock_irqsave(&h->lock, flags);
  644. if (h->busy_configuring) {
  645. spin_unlock_irqrestore(&h->lock, flags);
  646. return -EBUSY;
  647. }
  648. raid = drv->raid_level;
  649. spin_unlock_irqrestore(&h->lock, flags);
  650. if (raid < 0 || raid > RAID_UNKNOWN)
  651. raid = RAID_UNKNOWN;
  652. return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
  653. raid_label[raid]);
  654. }
  655. static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
  656. static ssize_t cciss_show_usage_count(struct device *dev,
  657. struct device_attribute *attr, char *buf)
  658. {
  659. drive_info_struct *drv = to_drv(dev);
  660. struct ctlr_info *h = to_hba(drv->dev.parent);
  661. unsigned long flags;
  662. int count;
  663. spin_lock_irqsave(&h->lock, flags);
  664. if (h->busy_configuring) {
  665. spin_unlock_irqrestore(&h->lock, flags);
  666. return -EBUSY;
  667. }
  668. count = drv->usage_count;
  669. spin_unlock_irqrestore(&h->lock, flags);
  670. return snprintf(buf, 20, "%d\n", count);
  671. }
  672. static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
  673. static struct attribute *cciss_host_attrs[] = {
  674. &dev_attr_rescan.attr,
  675. &dev_attr_resettable.attr,
  676. NULL
  677. };
  678. static struct attribute_group cciss_host_attr_group = {
  679. .attrs = cciss_host_attrs,
  680. };
  681. static const struct attribute_group *cciss_host_attr_groups[] = {
  682. &cciss_host_attr_group,
  683. NULL
  684. };
  685. static struct device_type cciss_host_type = {
  686. .name = "cciss_host",
  687. .groups = cciss_host_attr_groups,
  688. .release = cciss_hba_release,
  689. };
  690. static struct attribute *cciss_dev_attrs[] = {
  691. &dev_attr_unique_id.attr,
  692. &dev_attr_model.attr,
  693. &dev_attr_vendor.attr,
  694. &dev_attr_rev.attr,
  695. &dev_attr_lunid.attr,
  696. &dev_attr_raid_level.attr,
  697. &dev_attr_usage_count.attr,
  698. NULL
  699. };
  700. static struct attribute_group cciss_dev_attr_group = {
  701. .attrs = cciss_dev_attrs,
  702. };
  703. static const struct attribute_group *cciss_dev_attr_groups[] = {
  704. &cciss_dev_attr_group,
  705. NULL
  706. };
  707. static struct device_type cciss_dev_type = {
  708. .name = "cciss_device",
  709. .groups = cciss_dev_attr_groups,
  710. .release = cciss_device_release,
  711. };
  712. static struct bus_type cciss_bus_type = {
  713. .name = "cciss",
  714. };
  715. /*
  716. * cciss_hba_release is called when the reference count
  717. * of h->dev goes to zero.
  718. */
  719. static void cciss_hba_release(struct device *dev)
  720. {
  721. /*
  722. * nothing to do, but need this to avoid a warning
  723. * about not having a release handler from lib/kref.c.
  724. */
  725. }
  726. /*
  727. * Initialize sysfs entry for each controller. This sets up and registers
  728. * the 'cciss#' directory for each individual controller under
  729. * /sys/bus/pci/devices/<dev>/.
  730. */
  731. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  732. {
  733. device_initialize(&h->dev);
  734. h->dev.type = &cciss_host_type;
  735. h->dev.bus = &cciss_bus_type;
  736. dev_set_name(&h->dev, "%s", h->devname);
  737. h->dev.parent = &h->pdev->dev;
  738. return device_add(&h->dev);
  739. }
  740. /*
  741. * Remove sysfs entries for an hba.
  742. */
  743. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  744. {
  745. device_del(&h->dev);
  746. put_device(&h->dev); /* final put. */
  747. }
  748. /* cciss_device_release is called when the reference count
  749. * of h->drv[x]dev goes to zero.
  750. */
  751. static void cciss_device_release(struct device *dev)
  752. {
  753. drive_info_struct *drv = to_drv(dev);
  754. kfree(drv);
  755. }
  756. /*
  757. * Initialize sysfs for each logical drive. This sets up and registers
  758. * the 'c#d#' directory for each individual logical drive under
  759. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  760. * /sys/block/cciss!c#d# to this entry.
  761. */
  762. static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  763. int drv_index)
  764. {
  765. struct device *dev;
  766. if (h->drv[drv_index]->device_initialized)
  767. return 0;
  768. dev = &h->drv[drv_index]->dev;
  769. device_initialize(dev);
  770. dev->type = &cciss_dev_type;
  771. dev->bus = &cciss_bus_type;
  772. dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
  773. dev->parent = &h->dev;
  774. h->drv[drv_index]->device_initialized = 1;
  775. return device_add(dev);
  776. }
  777. /*
  778. * Remove sysfs entries for a logical drive.
  779. */
  780. static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
  781. int ctlr_exiting)
  782. {
  783. struct device *dev = &h->drv[drv_index]->dev;
  784. /* special case for c*d0, we only destroy it on controller exit */
  785. if (drv_index == 0 && !ctlr_exiting)
  786. return;
  787. device_del(dev);
  788. put_device(dev); /* the "final" put. */
  789. h->drv[drv_index] = NULL;
  790. }
  791. /*
  792. * For operations that cannot sleep, a command block is allocated at init,
  793. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  794. * which ones are free or in use.
  795. */
  796. static CommandList_struct *cmd_alloc(ctlr_info_t *h)
  797. {
  798. CommandList_struct *c;
  799. int i;
  800. u64bit temp64;
  801. dma_addr_t cmd_dma_handle, err_dma_handle;
  802. do {
  803. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  804. if (i == h->nr_cmds)
  805. return NULL;
  806. } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
  807. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  808. c = h->cmd_pool + i;
  809. memset(c, 0, sizeof(CommandList_struct));
  810. cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
  811. c->err_info = h->errinfo_pool + i;
  812. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  813. err_dma_handle = h->errinfo_pool_dhandle
  814. + i * sizeof(ErrorInfo_struct);
  815. h->nr_allocs++;
  816. c->cmdindex = i;
  817. INIT_LIST_HEAD(&c->list);
  818. c->busaddr = (__u32) cmd_dma_handle;
  819. temp64.val = (__u64) err_dma_handle;
  820. c->ErrDesc.Addr.lower = temp64.val32.lower;
  821. c->ErrDesc.Addr.upper = temp64.val32.upper;
  822. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  823. c->ctlr = h->ctlr;
  824. return c;
  825. }
  826. /* allocate a command using pci_alloc_consistent, used for ioctls,
  827. * etc., not for the main i/o path.
  828. */
  829. static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
  830. {
  831. CommandList_struct *c;
  832. u64bit temp64;
  833. dma_addr_t cmd_dma_handle, err_dma_handle;
  834. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  835. sizeof(CommandList_struct), &cmd_dma_handle);
  836. if (c == NULL)
  837. return NULL;
  838. memset(c, 0, sizeof(CommandList_struct));
  839. c->cmdindex = -1;
  840. c->err_info = (ErrorInfo_struct *)
  841. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  842. &err_dma_handle);
  843. if (c->err_info == NULL) {
  844. pci_free_consistent(h->pdev,
  845. sizeof(CommandList_struct), c, cmd_dma_handle);
  846. return NULL;
  847. }
  848. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  849. INIT_LIST_HEAD(&c->list);
  850. c->busaddr = (__u32) cmd_dma_handle;
  851. temp64.val = (__u64) err_dma_handle;
  852. c->ErrDesc.Addr.lower = temp64.val32.lower;
  853. c->ErrDesc.Addr.upper = temp64.val32.upper;
  854. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  855. c->ctlr = h->ctlr;
  856. return c;
  857. }
  858. static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
  859. {
  860. int i;
  861. i = c - h->cmd_pool;
  862. clear_bit(i & (BITS_PER_LONG - 1),
  863. h->cmd_pool_bits + (i / BITS_PER_LONG));
  864. h->nr_frees++;
  865. }
  866. static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
  867. {
  868. u64bit temp64;
  869. temp64.val32.lower = c->ErrDesc.Addr.lower;
  870. temp64.val32.upper = c->ErrDesc.Addr.upper;
  871. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  872. c->err_info, (dma_addr_t) temp64.val);
  873. pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
  874. (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
  875. }
  876. static inline ctlr_info_t *get_host(struct gendisk *disk)
  877. {
  878. return disk->queue->queuedata;
  879. }
  880. static inline drive_info_struct *get_drv(struct gendisk *disk)
  881. {
  882. return disk->private_data;
  883. }
  884. /*
  885. * Open. Make sure the device is really there.
  886. */
  887. static int cciss_open(struct block_device *bdev, fmode_t mode)
  888. {
  889. ctlr_info_t *h = get_host(bdev->bd_disk);
  890. drive_info_struct *drv = get_drv(bdev->bd_disk);
  891. dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
  892. if (drv->busy_configuring)
  893. return -EBUSY;
  894. /*
  895. * Root is allowed to open raw volume zero even if it's not configured
  896. * so array config can still work. Root is also allowed to open any
  897. * volume that has a LUN ID, so it can issue IOCTL to reread the
  898. * disk information. I don't think I really like this
  899. * but I'm already using way to many device nodes to claim another one
  900. * for "raw controller".
  901. */
  902. if (drv->heads == 0) {
  903. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  904. /* if not node 0 make sure it is a partition = 0 */
  905. if (MINOR(bdev->bd_dev) & 0x0f) {
  906. return -ENXIO;
  907. /* if it is, make sure we have a LUN ID */
  908. } else if (memcmp(drv->LunID, CTLR_LUNID,
  909. sizeof(drv->LunID))) {
  910. return -ENXIO;
  911. }
  912. }
  913. if (!capable(CAP_SYS_ADMIN))
  914. return -EPERM;
  915. }
  916. drv->usage_count++;
  917. h->usage_count++;
  918. return 0;
  919. }
  920. static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
  921. {
  922. int ret;
  923. mutex_lock(&cciss_mutex);
  924. ret = cciss_open(bdev, mode);
  925. mutex_unlock(&cciss_mutex);
  926. return ret;
  927. }
  928. /*
  929. * Close. Sync first.
  930. */
  931. static int cciss_release(struct gendisk *disk, fmode_t mode)
  932. {
  933. ctlr_info_t *h;
  934. drive_info_struct *drv;
  935. mutex_lock(&cciss_mutex);
  936. h = get_host(disk);
  937. drv = get_drv(disk);
  938. dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
  939. drv->usage_count--;
  940. h->usage_count--;
  941. mutex_unlock(&cciss_mutex);
  942. return 0;
  943. }
  944. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  945. unsigned cmd, unsigned long arg)
  946. {
  947. int ret;
  948. mutex_lock(&cciss_mutex);
  949. ret = cciss_ioctl(bdev, mode, cmd, arg);
  950. mutex_unlock(&cciss_mutex);
  951. return ret;
  952. }
  953. #ifdef CONFIG_COMPAT
  954. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  955. unsigned cmd, unsigned long arg);
  956. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  957. unsigned cmd, unsigned long arg);
  958. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  959. unsigned cmd, unsigned long arg)
  960. {
  961. switch (cmd) {
  962. case CCISS_GETPCIINFO:
  963. case CCISS_GETINTINFO:
  964. case CCISS_SETINTINFO:
  965. case CCISS_GETNODENAME:
  966. case CCISS_SETNODENAME:
  967. case CCISS_GETHEARTBEAT:
  968. case CCISS_GETBUSTYPES:
  969. case CCISS_GETFIRMVER:
  970. case CCISS_GETDRIVVER:
  971. case CCISS_REVALIDVOLS:
  972. case CCISS_DEREGDISK:
  973. case CCISS_REGNEWDISK:
  974. case CCISS_REGNEWD:
  975. case CCISS_RESCANDISK:
  976. case CCISS_GETLUNINFO:
  977. return do_ioctl(bdev, mode, cmd, arg);
  978. case CCISS_PASSTHRU32:
  979. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  980. case CCISS_BIG_PASSTHRU32:
  981. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  982. default:
  983. return -ENOIOCTLCMD;
  984. }
  985. }
  986. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  987. unsigned cmd, unsigned long arg)
  988. {
  989. IOCTL32_Command_struct __user *arg32 =
  990. (IOCTL32_Command_struct __user *) arg;
  991. IOCTL_Command_struct arg64;
  992. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  993. int err;
  994. u32 cp;
  995. err = 0;
  996. err |=
  997. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  998. sizeof(arg64.LUN_info));
  999. err |=
  1000. copy_from_user(&arg64.Request, &arg32->Request,
  1001. sizeof(arg64.Request));
  1002. err |=
  1003. copy_from_user(&arg64.error_info, &arg32->error_info,
  1004. sizeof(arg64.error_info));
  1005. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1006. err |= get_user(cp, &arg32->buf);
  1007. arg64.buf = compat_ptr(cp);
  1008. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1009. if (err)
  1010. return -EFAULT;
  1011. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  1012. if (err)
  1013. return err;
  1014. err |=
  1015. copy_in_user(&arg32->error_info, &p->error_info,
  1016. sizeof(arg32->error_info));
  1017. if (err)
  1018. return -EFAULT;
  1019. return err;
  1020. }
  1021. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  1022. unsigned cmd, unsigned long arg)
  1023. {
  1024. BIG_IOCTL32_Command_struct __user *arg32 =
  1025. (BIG_IOCTL32_Command_struct __user *) arg;
  1026. BIG_IOCTL_Command_struct arg64;
  1027. BIG_IOCTL_Command_struct __user *p =
  1028. compat_alloc_user_space(sizeof(arg64));
  1029. int err;
  1030. u32 cp;
  1031. memset(&arg64, 0, sizeof(arg64));
  1032. err = 0;
  1033. err |=
  1034. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  1035. sizeof(arg64.LUN_info));
  1036. err |=
  1037. copy_from_user(&arg64.Request, &arg32->Request,
  1038. sizeof(arg64.Request));
  1039. err |=
  1040. copy_from_user(&arg64.error_info, &arg32->error_info,
  1041. sizeof(arg64.error_info));
  1042. err |= get_user(arg64.buf_size, &arg32->buf_size);
  1043. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  1044. err |= get_user(cp, &arg32->buf);
  1045. arg64.buf = compat_ptr(cp);
  1046. err |= copy_to_user(p, &arg64, sizeof(arg64));
  1047. if (err)
  1048. return -EFAULT;
  1049. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  1050. if (err)
  1051. return err;
  1052. err |=
  1053. copy_in_user(&arg32->error_info, &p->error_info,
  1054. sizeof(arg32->error_info));
  1055. if (err)
  1056. return -EFAULT;
  1057. return err;
  1058. }
  1059. #endif
  1060. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  1061. {
  1062. drive_info_struct *drv = get_drv(bdev->bd_disk);
  1063. if (!drv->cylinders)
  1064. return -ENXIO;
  1065. geo->heads = drv->heads;
  1066. geo->sectors = drv->sectors;
  1067. geo->cylinders = drv->cylinders;
  1068. return 0;
  1069. }
  1070. static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  1071. {
  1072. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1073. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  1074. (void)check_for_unit_attention(h, c);
  1075. }
  1076. static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
  1077. {
  1078. cciss_pci_info_struct pciinfo;
  1079. if (!argp)
  1080. return -EINVAL;
  1081. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  1082. pciinfo.bus = h->pdev->bus->number;
  1083. pciinfo.dev_fn = h->pdev->devfn;
  1084. pciinfo.board_id = h->board_id;
  1085. if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  1086. return -EFAULT;
  1087. return 0;
  1088. }
  1089. static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
  1090. {
  1091. cciss_coalint_struct intinfo;
  1092. if (!argp)
  1093. return -EINVAL;
  1094. intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
  1095. intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
  1096. if (copy_to_user
  1097. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  1098. return -EFAULT;
  1099. return 0;
  1100. }
  1101. static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
  1102. {
  1103. cciss_coalint_struct intinfo;
  1104. unsigned long flags;
  1105. int i;
  1106. if (!argp)
  1107. return -EINVAL;
  1108. if (!capable(CAP_SYS_ADMIN))
  1109. return -EPERM;
  1110. if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
  1111. return -EFAULT;
  1112. if ((intinfo.delay == 0) && (intinfo.count == 0))
  1113. return -EINVAL;
  1114. spin_lock_irqsave(&h->lock, flags);
  1115. /* Update the field, and then ring the doorbell */
  1116. writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
  1117. writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
  1118. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1119. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1120. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1121. break;
  1122. udelay(1000); /* delay and try again */
  1123. }
  1124. spin_unlock_irqrestore(&h->lock, flags);
  1125. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1126. return -EAGAIN;
  1127. return 0;
  1128. }
  1129. static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
  1130. {
  1131. NodeName_type NodeName;
  1132. int i;
  1133. if (!argp)
  1134. return -EINVAL;
  1135. for (i = 0; i < 16; i++)
  1136. NodeName[i] = readb(&h->cfgtable->ServerName[i]);
  1137. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  1138. return -EFAULT;
  1139. return 0;
  1140. }
  1141. static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
  1142. {
  1143. NodeName_type NodeName;
  1144. unsigned long flags;
  1145. int i;
  1146. if (!argp)
  1147. return -EINVAL;
  1148. if (!capable(CAP_SYS_ADMIN))
  1149. return -EPERM;
  1150. if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
  1151. return -EFAULT;
  1152. spin_lock_irqsave(&h->lock, flags);
  1153. /* Update the field, and then ring the doorbell */
  1154. for (i = 0; i < 16; i++)
  1155. writeb(NodeName[i], &h->cfgtable->ServerName[i]);
  1156. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  1157. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  1158. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  1159. break;
  1160. udelay(1000); /* delay and try again */
  1161. }
  1162. spin_unlock_irqrestore(&h->lock, flags);
  1163. if (i >= MAX_IOCTL_CONFIG_WAIT)
  1164. return -EAGAIN;
  1165. return 0;
  1166. }
  1167. static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
  1168. {
  1169. Heartbeat_type heartbeat;
  1170. if (!argp)
  1171. return -EINVAL;
  1172. heartbeat = readl(&h->cfgtable->HeartBeat);
  1173. if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
  1174. return -EFAULT;
  1175. return 0;
  1176. }
  1177. static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
  1178. {
  1179. BusTypes_type BusTypes;
  1180. if (!argp)
  1181. return -EINVAL;
  1182. BusTypes = readl(&h->cfgtable->BusTypes);
  1183. if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
  1184. return -EFAULT;
  1185. return 0;
  1186. }
  1187. static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
  1188. {
  1189. FirmwareVer_type firmware;
  1190. if (!argp)
  1191. return -EINVAL;
  1192. memcpy(firmware, h->firm_ver, 4);
  1193. if (copy_to_user
  1194. (argp, firmware, sizeof(FirmwareVer_type)))
  1195. return -EFAULT;
  1196. return 0;
  1197. }
  1198. static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
  1199. {
  1200. DriverVer_type DriverVer = DRIVER_VERSION;
  1201. if (!argp)
  1202. return -EINVAL;
  1203. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  1204. return -EFAULT;
  1205. return 0;
  1206. }
  1207. static int cciss_getluninfo(ctlr_info_t *h,
  1208. struct gendisk *disk, void __user *argp)
  1209. {
  1210. LogvolInfo_struct luninfo;
  1211. drive_info_struct *drv = get_drv(disk);
  1212. if (!argp)
  1213. return -EINVAL;
  1214. memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
  1215. luninfo.num_opens = drv->usage_count;
  1216. luninfo.num_parts = 0;
  1217. if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
  1218. return -EFAULT;
  1219. return 0;
  1220. }
  1221. static int cciss_passthru(ctlr_info_t *h, void __user *argp)
  1222. {
  1223. IOCTL_Command_struct iocommand;
  1224. CommandList_struct *c;
  1225. char *buff = NULL;
  1226. u64bit temp64;
  1227. DECLARE_COMPLETION_ONSTACK(wait);
  1228. if (!argp)
  1229. return -EINVAL;
  1230. if (!capable(CAP_SYS_RAWIO))
  1231. return -EPERM;
  1232. if (copy_from_user
  1233. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1234. return -EFAULT;
  1235. if ((iocommand.buf_size < 1) &&
  1236. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1237. return -EINVAL;
  1238. }
  1239. if (iocommand.buf_size > 0) {
  1240. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1241. if (buff == NULL)
  1242. return -EFAULT;
  1243. }
  1244. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1245. /* Copy the data into the buffer we created */
  1246. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  1247. kfree(buff);
  1248. return -EFAULT;
  1249. }
  1250. } else {
  1251. memset(buff, 0, iocommand.buf_size);
  1252. }
  1253. c = cmd_special_alloc(h);
  1254. if (!c) {
  1255. kfree(buff);
  1256. return -ENOMEM;
  1257. }
  1258. /* Fill in the command type */
  1259. c->cmd_type = CMD_IOCTL_PEND;
  1260. /* Fill in Command Header */
  1261. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1262. if (iocommand.buf_size > 0) { /* buffer to fill */
  1263. c->Header.SGList = 1;
  1264. c->Header.SGTotal = 1;
  1265. } else { /* no buffers to fill */
  1266. c->Header.SGList = 0;
  1267. c->Header.SGTotal = 0;
  1268. }
  1269. c->Header.LUN = iocommand.LUN_info;
  1270. /* use the kernel address the cmd block for tag */
  1271. c->Header.Tag.lower = c->busaddr;
  1272. /* Fill in Request block */
  1273. c->Request = iocommand.Request;
  1274. /* Fill in the scatter gather information */
  1275. if (iocommand.buf_size > 0) {
  1276. temp64.val = pci_map_single(h->pdev, buff,
  1277. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  1278. c->SG[0].Addr.lower = temp64.val32.lower;
  1279. c->SG[0].Addr.upper = temp64.val32.upper;
  1280. c->SG[0].Len = iocommand.buf_size;
  1281. c->SG[0].Ext = 0; /* we are not chaining */
  1282. }
  1283. c->waiting = &wait;
  1284. enqueue_cmd_and_start_io(h, c);
  1285. wait_for_completion(&wait);
  1286. /* unlock the buffers from DMA */
  1287. temp64.val32.lower = c->SG[0].Addr.lower;
  1288. temp64.val32.upper = c->SG[0].Addr.upper;
  1289. pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
  1290. PCI_DMA_BIDIRECTIONAL);
  1291. check_ioctl_unit_attention(h, c);
  1292. /* Copy the error information out */
  1293. iocommand.error_info = *(c->err_info);
  1294. if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1295. kfree(buff);
  1296. cmd_special_free(h, c);
  1297. return -EFAULT;
  1298. }
  1299. if (iocommand.Request.Type.Direction == XFER_READ) {
  1300. /* Copy the data out of the buffer we created */
  1301. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  1302. kfree(buff);
  1303. cmd_special_free(h, c);
  1304. return -EFAULT;
  1305. }
  1306. }
  1307. kfree(buff);
  1308. cmd_special_free(h, c);
  1309. return 0;
  1310. }
  1311. static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
  1312. {
  1313. BIG_IOCTL_Command_struct *ioc;
  1314. CommandList_struct *c;
  1315. unsigned char **buff = NULL;
  1316. int *buff_size = NULL;
  1317. u64bit temp64;
  1318. BYTE sg_used = 0;
  1319. int status = 0;
  1320. int i;
  1321. DECLARE_COMPLETION_ONSTACK(wait);
  1322. __u32 left;
  1323. __u32 sz;
  1324. BYTE __user *data_ptr;
  1325. if (!argp)
  1326. return -EINVAL;
  1327. if (!capable(CAP_SYS_RAWIO))
  1328. return -EPERM;
  1329. ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
  1330. if (!ioc) {
  1331. status = -ENOMEM;
  1332. goto cleanup1;
  1333. }
  1334. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1335. status = -EFAULT;
  1336. goto cleanup1;
  1337. }
  1338. if ((ioc->buf_size < 1) &&
  1339. (ioc->Request.Type.Direction != XFER_NONE)) {
  1340. status = -EINVAL;
  1341. goto cleanup1;
  1342. }
  1343. /* Check kmalloc limits using all SGs */
  1344. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1345. status = -EINVAL;
  1346. goto cleanup1;
  1347. }
  1348. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1349. status = -EINVAL;
  1350. goto cleanup1;
  1351. }
  1352. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1353. if (!buff) {
  1354. status = -ENOMEM;
  1355. goto cleanup1;
  1356. }
  1357. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  1358. if (!buff_size) {
  1359. status = -ENOMEM;
  1360. goto cleanup1;
  1361. }
  1362. left = ioc->buf_size;
  1363. data_ptr = ioc->buf;
  1364. while (left) {
  1365. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  1366. buff_size[sg_used] = sz;
  1367. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1368. if (buff[sg_used] == NULL) {
  1369. status = -ENOMEM;
  1370. goto cleanup1;
  1371. }
  1372. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1373. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  1374. status = -EFAULT;
  1375. goto cleanup1;
  1376. }
  1377. } else {
  1378. memset(buff[sg_used], 0, sz);
  1379. }
  1380. left -= sz;
  1381. data_ptr += sz;
  1382. sg_used++;
  1383. }
  1384. c = cmd_special_alloc(h);
  1385. if (!c) {
  1386. status = -ENOMEM;
  1387. goto cleanup1;
  1388. }
  1389. c->cmd_type = CMD_IOCTL_PEND;
  1390. c->Header.ReplyQueue = 0;
  1391. c->Header.SGList = sg_used;
  1392. c->Header.SGTotal = sg_used;
  1393. c->Header.LUN = ioc->LUN_info;
  1394. c->Header.Tag.lower = c->busaddr;
  1395. c->Request = ioc->Request;
  1396. for (i = 0; i < sg_used; i++) {
  1397. temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
  1398. PCI_DMA_BIDIRECTIONAL);
  1399. c->SG[i].Addr.lower = temp64.val32.lower;
  1400. c->SG[i].Addr.upper = temp64.val32.upper;
  1401. c->SG[i].Len = buff_size[i];
  1402. c->SG[i].Ext = 0; /* we are not chaining */
  1403. }
  1404. c->waiting = &wait;
  1405. enqueue_cmd_and_start_io(h, c);
  1406. wait_for_completion(&wait);
  1407. /* unlock the buffers from DMA */
  1408. for (i = 0; i < sg_used; i++) {
  1409. temp64.val32.lower = c->SG[i].Addr.lower;
  1410. temp64.val32.upper = c->SG[i].Addr.upper;
  1411. pci_unmap_single(h->pdev,
  1412. (dma_addr_t) temp64.val, buff_size[i],
  1413. PCI_DMA_BIDIRECTIONAL);
  1414. }
  1415. check_ioctl_unit_attention(h, c);
  1416. /* Copy the error information out */
  1417. ioc->error_info = *(c->err_info);
  1418. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1419. cmd_special_free(h, c);
  1420. status = -EFAULT;
  1421. goto cleanup1;
  1422. }
  1423. if (ioc->Request.Type.Direction == XFER_READ) {
  1424. /* Copy the data out of the buffer we created */
  1425. BYTE __user *ptr = ioc->buf;
  1426. for (i = 0; i < sg_used; i++) {
  1427. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  1428. cmd_special_free(h, c);
  1429. status = -EFAULT;
  1430. goto cleanup1;
  1431. }
  1432. ptr += buff_size[i];
  1433. }
  1434. }
  1435. cmd_special_free(h, c);
  1436. status = 0;
  1437. cleanup1:
  1438. if (buff) {
  1439. for (i = 0; i < sg_used; i++)
  1440. kfree(buff[i]);
  1441. kfree(buff);
  1442. }
  1443. kfree(buff_size);
  1444. kfree(ioc);
  1445. return status;
  1446. }
  1447. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  1448. unsigned int cmd, unsigned long arg)
  1449. {
  1450. struct gendisk *disk = bdev->bd_disk;
  1451. ctlr_info_t *h = get_host(disk);
  1452. void __user *argp = (void __user *)arg;
  1453. dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
  1454. cmd, arg);
  1455. switch (cmd) {
  1456. case CCISS_GETPCIINFO:
  1457. return cciss_getpciinfo(h, argp);
  1458. case CCISS_GETINTINFO:
  1459. return cciss_getintinfo(h, argp);
  1460. case CCISS_SETINTINFO:
  1461. return cciss_setintinfo(h, argp);
  1462. case CCISS_GETNODENAME:
  1463. return cciss_getnodename(h, argp);
  1464. case CCISS_SETNODENAME:
  1465. return cciss_setnodename(h, argp);
  1466. case CCISS_GETHEARTBEAT:
  1467. return cciss_getheartbeat(h, argp);
  1468. case CCISS_GETBUSTYPES:
  1469. return cciss_getbustypes(h, argp);
  1470. case CCISS_GETFIRMVER:
  1471. return cciss_getfirmver(h, argp);
  1472. case CCISS_GETDRIVVER:
  1473. return cciss_getdrivver(h, argp);
  1474. case CCISS_DEREGDISK:
  1475. case CCISS_REGNEWD:
  1476. case CCISS_REVALIDVOLS:
  1477. return rebuild_lun_table(h, 0, 1);
  1478. case CCISS_GETLUNINFO:
  1479. return cciss_getluninfo(h, disk, argp);
  1480. case CCISS_PASSTHRU:
  1481. return cciss_passthru(h, argp);
  1482. case CCISS_BIG_PASSTHRU:
  1483. return cciss_bigpassthru(h, argp);
  1484. /* scsi_cmd_ioctl handles these, below, though some are not */
  1485. /* very meaningful for cciss. SG_IO is the main one people want. */
  1486. case SG_GET_VERSION_NUM:
  1487. case SG_SET_TIMEOUT:
  1488. case SG_GET_TIMEOUT:
  1489. case SG_GET_RESERVED_SIZE:
  1490. case SG_SET_RESERVED_SIZE:
  1491. case SG_EMULATED_HOST:
  1492. case SG_IO:
  1493. case SCSI_IOCTL_SEND_COMMAND:
  1494. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1495. /* scsi_cmd_ioctl would normally handle these, below, but */
  1496. /* they aren't a good fit for cciss, as CD-ROMs are */
  1497. /* not supported, and we don't have any bus/target/lun */
  1498. /* which we present to the kernel. */
  1499. case CDROM_SEND_PACKET:
  1500. case CDROMCLOSETRAY:
  1501. case CDROMEJECT:
  1502. case SCSI_IOCTL_GET_IDLUN:
  1503. case SCSI_IOCTL_GET_BUS_NUMBER:
  1504. default:
  1505. return -ENOTTY;
  1506. }
  1507. }
  1508. static void cciss_check_queues(ctlr_info_t *h)
  1509. {
  1510. int start_queue = h->next_to_run;
  1511. int i;
  1512. /* check to see if we have maxed out the number of commands that can
  1513. * be placed on the queue. If so then exit. We do this check here
  1514. * in case the interrupt we serviced was from an ioctl and did not
  1515. * free any new commands.
  1516. */
  1517. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1518. return;
  1519. /* We have room on the queue for more commands. Now we need to queue
  1520. * them up. We will also keep track of the next queue to run so
  1521. * that every queue gets a chance to be started first.
  1522. */
  1523. for (i = 0; i < h->highest_lun + 1; i++) {
  1524. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1525. /* make sure the disk has been added and the drive is real
  1526. * because this can be called from the middle of init_one.
  1527. */
  1528. if (!h->drv[curr_queue])
  1529. continue;
  1530. if (!(h->drv[curr_queue]->queue) ||
  1531. !(h->drv[curr_queue]->heads))
  1532. continue;
  1533. blk_start_queue(h->gendisk[curr_queue]->queue);
  1534. /* check to see if we have maxed out the number of commands
  1535. * that can be placed on the queue.
  1536. */
  1537. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1538. if (curr_queue == start_queue) {
  1539. h->next_to_run =
  1540. (start_queue + 1) % (h->highest_lun + 1);
  1541. break;
  1542. } else {
  1543. h->next_to_run = curr_queue;
  1544. break;
  1545. }
  1546. }
  1547. }
  1548. }
  1549. static void cciss_softirq_done(struct request *rq)
  1550. {
  1551. CommandList_struct *c = rq->completion_data;
  1552. ctlr_info_t *h = hba[c->ctlr];
  1553. SGDescriptor_struct *curr_sg = c->SG;
  1554. u64bit temp64;
  1555. unsigned long flags;
  1556. int i, ddir;
  1557. int sg_index = 0;
  1558. if (c->Request.Type.Direction == XFER_READ)
  1559. ddir = PCI_DMA_FROMDEVICE;
  1560. else
  1561. ddir = PCI_DMA_TODEVICE;
  1562. /* command did not need to be retried */
  1563. /* unmap the DMA mapping for all the scatter gather elements */
  1564. for (i = 0; i < c->Header.SGList; i++) {
  1565. if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
  1566. cciss_unmap_sg_chain_block(h, c);
  1567. /* Point to the next block */
  1568. curr_sg = h->cmd_sg_list[c->cmdindex];
  1569. sg_index = 0;
  1570. }
  1571. temp64.val32.lower = curr_sg[sg_index].Addr.lower;
  1572. temp64.val32.upper = curr_sg[sg_index].Addr.upper;
  1573. pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
  1574. ddir);
  1575. ++sg_index;
  1576. }
  1577. dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
  1578. /* set the residual count for pc requests */
  1579. if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
  1580. rq->resid_len = c->err_info->ResidualCnt;
  1581. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1582. spin_lock_irqsave(&h->lock, flags);
  1583. cmd_free(h, c);
  1584. cciss_check_queues(h);
  1585. spin_unlock_irqrestore(&h->lock, flags);
  1586. }
  1587. static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
  1588. unsigned char scsi3addr[], uint32_t log_unit)
  1589. {
  1590. memcpy(scsi3addr, h->drv[log_unit]->LunID,
  1591. sizeof(h->drv[log_unit]->LunID));
  1592. }
  1593. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1594. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1595. * they cannot be read.
  1596. */
  1597. static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
  1598. char *vendor, char *model, char *rev)
  1599. {
  1600. int rc;
  1601. InquiryData_struct *inq_buf;
  1602. unsigned char scsi3addr[8];
  1603. *vendor = '\0';
  1604. *model = '\0';
  1605. *rev = '\0';
  1606. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1607. if (!inq_buf)
  1608. return;
  1609. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1610. rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
  1611. scsi3addr, TYPE_CMD);
  1612. if (rc == IO_OK) {
  1613. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1614. vendor[VENDOR_LEN] = '\0';
  1615. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1616. model[MODEL_LEN] = '\0';
  1617. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1618. rev[REV_LEN] = '\0';
  1619. }
  1620. kfree(inq_buf);
  1621. return;
  1622. }
  1623. /* This function gets the serial number of a logical drive via
  1624. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1625. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1626. * are returned instead.
  1627. */
  1628. static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
  1629. unsigned char *serial_no, int buflen)
  1630. {
  1631. #define PAGE_83_INQ_BYTES 64
  1632. int rc;
  1633. unsigned char *buf;
  1634. unsigned char scsi3addr[8];
  1635. if (buflen > 16)
  1636. buflen = 16;
  1637. memset(serial_no, 0xff, buflen);
  1638. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1639. if (!buf)
  1640. return;
  1641. memset(serial_no, 0, buflen);
  1642. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  1643. rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
  1644. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1645. if (rc == IO_OK)
  1646. memcpy(serial_no, &buf[8], buflen);
  1647. kfree(buf);
  1648. return;
  1649. }
  1650. /*
  1651. * cciss_add_disk sets up the block device queue for a logical drive
  1652. */
  1653. static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1654. int drv_index)
  1655. {
  1656. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1657. if (!disk->queue)
  1658. goto init_queue_failure;
  1659. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1660. disk->major = h->major;
  1661. disk->first_minor = drv_index << NWD_SHIFT;
  1662. disk->fops = &cciss_fops;
  1663. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1664. goto cleanup_queue;
  1665. disk->private_data = h->drv[drv_index];
  1666. disk->driverfs_dev = &h->drv[drv_index]->dev;
  1667. /* Set up queue information */
  1668. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1669. /* This is a hardware imposed limit. */
  1670. blk_queue_max_segments(disk->queue, h->maxsgentries);
  1671. blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
  1672. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1673. disk->queue->queuedata = h;
  1674. blk_queue_logical_block_size(disk->queue,
  1675. h->drv[drv_index]->block_size);
  1676. /* Make sure all queue data is written out before */
  1677. /* setting h->drv[drv_index]->queue, as setting this */
  1678. /* allows the interrupt handler to start the queue */
  1679. wmb();
  1680. h->drv[drv_index]->queue = disk->queue;
  1681. add_disk(disk);
  1682. return 0;
  1683. cleanup_queue:
  1684. blk_cleanup_queue(disk->queue);
  1685. disk->queue = NULL;
  1686. init_queue_failure:
  1687. return -1;
  1688. }
  1689. /* This function will check the usage_count of the drive to be updated/added.
  1690. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1691. * the drive's capacity, geometry, or serial number has changed,
  1692. * then the drive information will be updated and the disk will be
  1693. * re-registered with the kernel. If these conditions don't hold,
  1694. * then it will be left alone for the next reboot. The exception to this
  1695. * is disk 0 which will always be left registered with the kernel since it
  1696. * is also the controller node. Any changes to disk 0 will show up on
  1697. * the next reboot.
  1698. */
  1699. static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
  1700. int first_time, int via_ioctl)
  1701. {
  1702. struct gendisk *disk;
  1703. InquiryData_struct *inq_buff = NULL;
  1704. unsigned int block_size;
  1705. sector_t total_size;
  1706. unsigned long flags = 0;
  1707. int ret = 0;
  1708. drive_info_struct *drvinfo;
  1709. /* Get information about the disk and modify the driver structure */
  1710. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1711. drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
  1712. if (inq_buff == NULL || drvinfo == NULL)
  1713. goto mem_msg;
  1714. /* testing to see if 16-byte CDBs are already being used */
  1715. if (h->cciss_read == CCISS_READ_16) {
  1716. cciss_read_capacity_16(h, drv_index,
  1717. &total_size, &block_size);
  1718. } else {
  1719. cciss_read_capacity(h, drv_index, &total_size, &block_size);
  1720. /* if read_capacity returns all F's this volume is >2TB */
  1721. /* in size so we switch to 16-byte CDB's for all */
  1722. /* read/write ops */
  1723. if (total_size == 0xFFFFFFFFULL) {
  1724. cciss_read_capacity_16(h, drv_index,
  1725. &total_size, &block_size);
  1726. h->cciss_read = CCISS_READ_16;
  1727. h->cciss_write = CCISS_WRITE_16;
  1728. } else {
  1729. h->cciss_read = CCISS_READ_10;
  1730. h->cciss_write = CCISS_WRITE_10;
  1731. }
  1732. }
  1733. cciss_geometry_inquiry(h, drv_index, total_size, block_size,
  1734. inq_buff, drvinfo);
  1735. drvinfo->block_size = block_size;
  1736. drvinfo->nr_blocks = total_size + 1;
  1737. cciss_get_device_descr(h, drv_index, drvinfo->vendor,
  1738. drvinfo->model, drvinfo->rev);
  1739. cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
  1740. sizeof(drvinfo->serial_no));
  1741. /* Save the lunid in case we deregister the disk, below. */
  1742. memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
  1743. sizeof(drvinfo->LunID));
  1744. /* Is it the same disk we already know, and nothing's changed? */
  1745. if (h->drv[drv_index]->raid_level != -1 &&
  1746. ((memcmp(drvinfo->serial_no,
  1747. h->drv[drv_index]->serial_no, 16) == 0) &&
  1748. drvinfo->block_size == h->drv[drv_index]->block_size &&
  1749. drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
  1750. drvinfo->heads == h->drv[drv_index]->heads &&
  1751. drvinfo->sectors == h->drv[drv_index]->sectors &&
  1752. drvinfo->cylinders == h->drv[drv_index]->cylinders))
  1753. /* The disk is unchanged, nothing to update */
  1754. goto freeret;
  1755. /* If we get here it's not the same disk, or something's changed,
  1756. * so we need to * deregister it, and re-register it, if it's not
  1757. * in use.
  1758. * If the disk already exists then deregister it before proceeding
  1759. * (unless it's the first disk (for the controller node).
  1760. */
  1761. if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
  1762. dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
  1763. spin_lock_irqsave(&h->lock, flags);
  1764. h->drv[drv_index]->busy_configuring = 1;
  1765. spin_unlock_irqrestore(&h->lock, flags);
  1766. /* deregister_disk sets h->drv[drv_index]->queue = NULL
  1767. * which keeps the interrupt handler from starting
  1768. * the queue.
  1769. */
  1770. ret = deregister_disk(h, drv_index, 0, via_ioctl);
  1771. }
  1772. /* If the disk is in use return */
  1773. if (ret)
  1774. goto freeret;
  1775. /* Save the new information from cciss_geometry_inquiry
  1776. * and serial number inquiry. If the disk was deregistered
  1777. * above, then h->drv[drv_index] will be NULL.
  1778. */
  1779. if (h->drv[drv_index] == NULL) {
  1780. drvinfo->device_initialized = 0;
  1781. h->drv[drv_index] = drvinfo;
  1782. drvinfo = NULL; /* so it won't be freed below. */
  1783. } else {
  1784. /* special case for cxd0 */
  1785. h->drv[drv_index]->block_size = drvinfo->block_size;
  1786. h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
  1787. h->drv[drv_index]->heads = drvinfo->heads;
  1788. h->drv[drv_index]->sectors = drvinfo->sectors;
  1789. h->drv[drv_index]->cylinders = drvinfo->cylinders;
  1790. h->drv[drv_index]->raid_level = drvinfo->raid_level;
  1791. memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
  1792. memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
  1793. VENDOR_LEN + 1);
  1794. memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
  1795. memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
  1796. }
  1797. ++h->num_luns;
  1798. disk = h->gendisk[drv_index];
  1799. set_capacity(disk, h->drv[drv_index]->nr_blocks);
  1800. /* If it's not disk 0 (drv_index != 0)
  1801. * or if it was disk 0, but there was previously
  1802. * no actual corresponding configured logical drive
  1803. * (raid_leve == -1) then we want to update the
  1804. * logical drive's information.
  1805. */
  1806. if (drv_index || first_time) {
  1807. if (cciss_add_disk(h, disk, drv_index) != 0) {
  1808. cciss_free_gendisk(h, drv_index);
  1809. cciss_free_drive_info(h, drv_index);
  1810. dev_warn(&h->pdev->dev, "could not update disk %d\n",
  1811. drv_index);
  1812. --h->num_luns;
  1813. }
  1814. }
  1815. freeret:
  1816. kfree(inq_buff);
  1817. kfree(drvinfo);
  1818. return;
  1819. mem_msg:
  1820. dev_err(&h->pdev->dev, "out of memory\n");
  1821. goto freeret;
  1822. }
  1823. /* This function will find the first index of the controllers drive array
  1824. * that has a null drv pointer and allocate the drive info struct and
  1825. * will return that index This is where new drives will be added.
  1826. * If the index to be returned is greater than the highest_lun index for
  1827. * the controller then highest_lun is set * to this new index.
  1828. * If there are no available indexes or if tha allocation fails, then -1
  1829. * is returned. * "controller_node" is used to know if this is a real
  1830. * logical drive, or just the controller node, which determines if this
  1831. * counts towards highest_lun.
  1832. */
  1833. static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
  1834. {
  1835. int i;
  1836. drive_info_struct *drv;
  1837. /* Search for an empty slot for our drive info */
  1838. for (i = 0; i < CISS_MAX_LUN; i++) {
  1839. /* if not cxd0 case, and it's occupied, skip it. */
  1840. if (h->drv[i] && i != 0)
  1841. continue;
  1842. /*
  1843. * If it's cxd0 case, and drv is alloc'ed already, and a
  1844. * disk is configured there, skip it.
  1845. */
  1846. if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
  1847. continue;
  1848. /*
  1849. * We've found an empty slot. Update highest_lun
  1850. * provided this isn't just the fake cxd0 controller node.
  1851. */
  1852. if (i > h->highest_lun && !controller_node)
  1853. h->highest_lun = i;
  1854. /* If adding a real disk at cxd0, and it's already alloc'ed */
  1855. if (i == 0 && h->drv[i] != NULL)
  1856. return i;
  1857. /*
  1858. * Found an empty slot, not already alloc'ed. Allocate it.
  1859. * Mark it with raid_level == -1, so we know it's new later on.
  1860. */
  1861. drv = kzalloc(sizeof(*drv), GFP_KERNEL);
  1862. if (!drv)
  1863. return -1;
  1864. drv->raid_level = -1; /* so we know it's new */
  1865. h->drv[i] = drv;
  1866. return i;
  1867. }
  1868. return -1;
  1869. }
  1870. static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
  1871. {
  1872. kfree(h->drv[drv_index]);
  1873. h->drv[drv_index] = NULL;
  1874. }
  1875. static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
  1876. {
  1877. put_disk(h->gendisk[drv_index]);
  1878. h->gendisk[drv_index] = NULL;
  1879. }
  1880. /* cciss_add_gendisk finds a free hba[]->drv structure
  1881. * and allocates a gendisk if needed, and sets the lunid
  1882. * in the drvinfo structure. It returns the index into
  1883. * the ->drv[] array, or -1 if none are free.
  1884. * is_controller_node indicates whether highest_lun should
  1885. * count this disk, or if it's only being added to provide
  1886. * a means to talk to the controller in case no logical
  1887. * drives have yet been configured.
  1888. */
  1889. static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
  1890. int controller_node)
  1891. {
  1892. int drv_index;
  1893. drv_index = cciss_alloc_drive_info(h, controller_node);
  1894. if (drv_index == -1)
  1895. return -1;
  1896. /*Check if the gendisk needs to be allocated */
  1897. if (!h->gendisk[drv_index]) {
  1898. h->gendisk[drv_index] =
  1899. alloc_disk(1 << NWD_SHIFT);
  1900. if (!h->gendisk[drv_index]) {
  1901. dev_err(&h->pdev->dev,
  1902. "could not allocate a new disk %d\n",
  1903. drv_index);
  1904. goto err_free_drive_info;
  1905. }
  1906. }
  1907. memcpy(h->drv[drv_index]->LunID, lunid,
  1908. sizeof(h->drv[drv_index]->LunID));
  1909. if (cciss_create_ld_sysfs_entry(h, drv_index))
  1910. goto err_free_disk;
  1911. /* Don't need to mark this busy because nobody */
  1912. /* else knows about this disk yet to contend */
  1913. /* for access to it. */
  1914. h->drv[drv_index]->busy_configuring = 0;
  1915. wmb();
  1916. return drv_index;
  1917. err_free_disk:
  1918. cciss_free_gendisk(h, drv_index);
  1919. err_free_drive_info:
  1920. cciss_free_drive_info(h, drv_index);
  1921. return -1;
  1922. }
  1923. /* This is for the special case of a controller which
  1924. * has no logical drives. In this case, we still need
  1925. * to register a disk so the controller can be accessed
  1926. * by the Array Config Utility.
  1927. */
  1928. static void cciss_add_controller_node(ctlr_info_t *h)
  1929. {
  1930. struct gendisk *disk;
  1931. int drv_index;
  1932. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1933. return;
  1934. drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
  1935. if (drv_index == -1)
  1936. goto error;
  1937. h->drv[drv_index]->block_size = 512;
  1938. h->drv[drv_index]->nr_blocks = 0;
  1939. h->drv[drv_index]->heads = 0;
  1940. h->drv[drv_index]->sectors = 0;
  1941. h->drv[drv_index]->cylinders = 0;
  1942. h->drv[drv_index]->raid_level = -1;
  1943. memset(h->drv[drv_index]->serial_no, 0, 16);
  1944. disk = h->gendisk[drv_index];
  1945. if (cciss_add_disk(h, disk, drv_index) == 0)
  1946. return;
  1947. cciss_free_gendisk(h, drv_index);
  1948. cciss_free_drive_info(h, drv_index);
  1949. error:
  1950. dev_warn(&h->pdev->dev, "could not add disk 0.\n");
  1951. return;
  1952. }
  1953. /* This function will add and remove logical drives from the Logical
  1954. * drive array of the controller and maintain persistency of ordering
  1955. * so that mount points are preserved until the next reboot. This allows
  1956. * for the removal of logical drives in the middle of the drive array
  1957. * without a re-ordering of those drives.
  1958. * INPUT
  1959. * h = The controller to perform the operations on
  1960. */
  1961. static int rebuild_lun_table(ctlr_info_t *h, int first_time,
  1962. int via_ioctl)
  1963. {
  1964. int num_luns;
  1965. ReportLunData_struct *ld_buff = NULL;
  1966. int return_code;
  1967. int listlength = 0;
  1968. int i;
  1969. int drv_found;
  1970. int drv_index = 0;
  1971. unsigned char lunid[8] = CTLR_LUNID;
  1972. unsigned long flags;
  1973. if (!capable(CAP_SYS_RAWIO))
  1974. return -EPERM;
  1975. /* Set busy_configuring flag for this operation */
  1976. spin_lock_irqsave(&h->lock, flags);
  1977. if (h->busy_configuring) {
  1978. spin_unlock_irqrestore(&h->lock, flags);
  1979. return -EBUSY;
  1980. }
  1981. h->busy_configuring = 1;
  1982. spin_unlock_irqrestore(&h->lock, flags);
  1983. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1984. if (ld_buff == NULL)
  1985. goto mem_msg;
  1986. return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
  1987. sizeof(ReportLunData_struct),
  1988. 0, CTLR_LUNID, TYPE_CMD);
  1989. if (return_code == IO_OK)
  1990. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1991. else { /* reading number of logical volumes failed */
  1992. dev_warn(&h->pdev->dev,
  1993. "report logical volume command failed\n");
  1994. listlength = 0;
  1995. goto freeret;
  1996. }
  1997. num_luns = listlength / 8; /* 8 bytes per entry */
  1998. if (num_luns > CISS_MAX_LUN) {
  1999. num_luns = CISS_MAX_LUN;
  2000. dev_warn(&h->pdev->dev, "more luns configured"
  2001. " on controller than can be handled by"
  2002. " this driver.\n");
  2003. }
  2004. if (num_luns == 0)
  2005. cciss_add_controller_node(h);
  2006. /* Compare controller drive array to driver's drive array
  2007. * to see if any drives are missing on the controller due
  2008. * to action of Array Config Utility (user deletes drive)
  2009. * and deregister logical drives which have disappeared.
  2010. */
  2011. for (i = 0; i <= h->highest_lun; i++) {
  2012. int j;
  2013. drv_found = 0;
  2014. /* skip holes in the array from already deleted drives */
  2015. if (h->drv[i] == NULL)
  2016. continue;
  2017. for (j = 0; j < num_luns; j++) {
  2018. memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
  2019. if (memcmp(h->drv[i]->LunID, lunid,
  2020. sizeof(lunid)) == 0) {
  2021. drv_found = 1;
  2022. break;
  2023. }
  2024. }
  2025. if (!drv_found) {
  2026. /* Deregister it from the OS, it's gone. */
  2027. spin_lock_irqsave(&h->lock, flags);
  2028. h->drv[i]->busy_configuring = 1;
  2029. spin_unlock_irqrestore(&h->lock, flags);
  2030. return_code = deregister_disk(h, i, 1, via_ioctl);
  2031. if (h->drv[i] != NULL)
  2032. h->drv[i]->busy_configuring = 0;
  2033. }
  2034. }
  2035. /* Compare controller drive array to driver's drive array.
  2036. * Check for updates in the drive information and any new drives
  2037. * on the controller due to ACU adding logical drives, or changing
  2038. * a logical drive's size, etc. Reregister any new/changed drives
  2039. */
  2040. for (i = 0; i < num_luns; i++) {
  2041. int j;
  2042. drv_found = 0;
  2043. memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
  2044. /* Find if the LUN is already in the drive array
  2045. * of the driver. If so then update its info
  2046. * if not in use. If it does not exist then find
  2047. * the first free index and add it.
  2048. */
  2049. for (j = 0; j <= h->highest_lun; j++) {
  2050. if (h->drv[j] != NULL &&
  2051. memcmp(h->drv[j]->LunID, lunid,
  2052. sizeof(h->drv[j]->LunID)) == 0) {
  2053. drv_index = j;
  2054. drv_found = 1;
  2055. break;
  2056. }
  2057. }
  2058. /* check if the drive was found already in the array */
  2059. if (!drv_found) {
  2060. drv_index = cciss_add_gendisk(h, lunid, 0);
  2061. if (drv_index == -1)
  2062. goto freeret;
  2063. }
  2064. cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
  2065. } /* end for */
  2066. freeret:
  2067. kfree(ld_buff);
  2068. h->busy_configuring = 0;
  2069. /* We return -1 here to tell the ACU that we have registered/updated
  2070. * all of the drives that we can and to keep it from calling us
  2071. * additional times.
  2072. */
  2073. return -1;
  2074. mem_msg:
  2075. dev_err(&h->pdev->dev, "out of memory\n");
  2076. h->busy_configuring = 0;
  2077. goto freeret;
  2078. }
  2079. static void cciss_clear_drive_info(drive_info_struct *drive_info)
  2080. {
  2081. /* zero out the disk size info */
  2082. drive_info->nr_blocks = 0;
  2083. drive_info->block_size = 0;
  2084. drive_info->heads = 0;
  2085. drive_info->sectors = 0;
  2086. drive_info->cylinders = 0;
  2087. drive_info->raid_level = -1;
  2088. memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
  2089. memset(drive_info->model, 0, sizeof(drive_info->model));
  2090. memset(drive_info->rev, 0, sizeof(drive_info->rev));
  2091. memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
  2092. /*
  2093. * don't clear the LUNID though, we need to remember which
  2094. * one this one is.
  2095. */
  2096. }
  2097. /* This function will deregister the disk and it's queue from the
  2098. * kernel. It must be called with the controller lock held and the
  2099. * drv structures busy_configuring flag set. It's parameters are:
  2100. *
  2101. * disk = This is the disk to be deregistered
  2102. * drv = This is the drive_info_struct associated with the disk to be
  2103. * deregistered. It contains information about the disk used
  2104. * by the driver.
  2105. * clear_all = This flag determines whether or not the disk information
  2106. * is going to be completely cleared out and the highest_lun
  2107. * reset. Sometimes we want to clear out information about
  2108. * the disk in preparation for re-adding it. In this case
  2109. * the highest_lun should be left unchanged and the LunID
  2110. * should not be cleared.
  2111. * via_ioctl
  2112. * This indicates whether we've reached this path via ioctl.
  2113. * This affects the maximum usage count allowed for c0d0 to be messed with.
  2114. * If this path is reached via ioctl(), then the max_usage_count will
  2115. * be 1, as the process calling ioctl() has got to have the device open.
  2116. * If we get here via sysfs, then the max usage count will be zero.
  2117. */
  2118. static int deregister_disk(ctlr_info_t *h, int drv_index,
  2119. int clear_all, int via_ioctl)
  2120. {
  2121. int i;
  2122. struct gendisk *disk;
  2123. drive_info_struct *drv;
  2124. int recalculate_highest_lun;
  2125. if (!capable(CAP_SYS_RAWIO))
  2126. return -EPERM;
  2127. drv = h->drv[drv_index];
  2128. disk = h->gendisk[drv_index];
  2129. /* make sure logical volume is NOT is use */
  2130. if (clear_all || (h->gendisk[0] == disk)) {
  2131. if (drv->usage_count > via_ioctl)
  2132. return -EBUSY;
  2133. } else if (drv->usage_count > 0)
  2134. return -EBUSY;
  2135. recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
  2136. /* invalidate the devices and deregister the disk. If it is disk
  2137. * zero do not deregister it but just zero out it's values. This
  2138. * allows us to delete disk zero but keep the controller registered.
  2139. */
  2140. if (h->gendisk[0] != disk) {
  2141. struct request_queue *q = disk->queue;
  2142. if (disk->flags & GENHD_FL_UP) {
  2143. cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
  2144. del_gendisk(disk);
  2145. }
  2146. if (q)
  2147. blk_cleanup_queue(q);
  2148. /* If clear_all is set then we are deleting the logical
  2149. * drive, not just refreshing its info. For drives
  2150. * other than disk 0 we will call put_disk. We do not
  2151. * do this for disk 0 as we need it to be able to
  2152. * configure the controller.
  2153. */
  2154. if (clear_all){
  2155. /* This isn't pretty, but we need to find the
  2156. * disk in our array and NULL our the pointer.
  2157. * This is so that we will call alloc_disk if
  2158. * this index is used again later.
  2159. */
  2160. for (i=0; i < CISS_MAX_LUN; i++){
  2161. if (h->gendisk[i] == disk) {
  2162. h->gendisk[i] = NULL;
  2163. break;
  2164. }
  2165. }
  2166. put_disk(disk);
  2167. }
  2168. } else {
  2169. set_capacity(disk, 0);
  2170. cciss_clear_drive_info(drv);
  2171. }
  2172. --h->num_luns;
  2173. /* if it was the last disk, find the new hightest lun */
  2174. if (clear_all && recalculate_highest_lun) {
  2175. int newhighest = -1;
  2176. for (i = 0; i <= h->highest_lun; i++) {
  2177. /* if the disk has size > 0, it is available */
  2178. if (h->drv[i] && h->drv[i]->heads)
  2179. newhighest = i;
  2180. }
  2181. h->highest_lun = newhighest;
  2182. }
  2183. return 0;
  2184. }
  2185. static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
  2186. size_t size, __u8 page_code, unsigned char *scsi3addr,
  2187. int cmd_type)
  2188. {
  2189. u64bit buff_dma_handle;
  2190. int status = IO_OK;
  2191. c->cmd_type = CMD_IOCTL_PEND;
  2192. c->Header.ReplyQueue = 0;
  2193. if (buff != NULL) {
  2194. c->Header.SGList = 1;
  2195. c->Header.SGTotal = 1;
  2196. } else {
  2197. c->Header.SGList = 0;
  2198. c->Header.SGTotal = 0;
  2199. }
  2200. c->Header.Tag.lower = c->busaddr;
  2201. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2202. c->Request.Type.Type = cmd_type;
  2203. if (cmd_type == TYPE_CMD) {
  2204. switch (cmd) {
  2205. case CISS_INQUIRY:
  2206. /* are we trying to read a vital product page */
  2207. if (page_code != 0) {
  2208. c->Request.CDB[1] = 0x01;
  2209. c->Request.CDB[2] = page_code;
  2210. }
  2211. c->Request.CDBLen = 6;
  2212. c->Request.Type.Attribute = ATTR_SIMPLE;
  2213. c->Request.Type.Direction = XFER_READ;
  2214. c->Request.Timeout = 0;
  2215. c->Request.CDB[0] = CISS_INQUIRY;
  2216. c->Request.CDB[4] = size & 0xFF;
  2217. break;
  2218. case CISS_REPORT_LOG:
  2219. case CISS_REPORT_PHYS:
  2220. /* Talking to controller so It's a physical command
  2221. mode = 00 target = 0. Nothing to write.
  2222. */
  2223. c->Request.CDBLen = 12;
  2224. c->Request.Type.Attribute = ATTR_SIMPLE;
  2225. c->Request.Type.Direction = XFER_READ;
  2226. c->Request.Timeout = 0;
  2227. c->Request.CDB[0] = cmd;
  2228. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2229. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2230. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2231. c->Request.CDB[9] = size & 0xFF;
  2232. break;
  2233. case CCISS_READ_CAPACITY:
  2234. c->Request.CDBLen = 10;
  2235. c->Request.Type.Attribute = ATTR_SIMPLE;
  2236. c->Request.Type.Direction = XFER_READ;
  2237. c->Request.Timeout = 0;
  2238. c->Request.CDB[0] = cmd;
  2239. break;
  2240. case CCISS_READ_CAPACITY_16:
  2241. c->Request.CDBLen = 16;
  2242. c->Request.Type.Attribute = ATTR_SIMPLE;
  2243. c->Request.Type.Direction = XFER_READ;
  2244. c->Request.Timeout = 0;
  2245. c->Request.CDB[0] = cmd;
  2246. c->Request.CDB[1] = 0x10;
  2247. c->Request.CDB[10] = (size >> 24) & 0xFF;
  2248. c->Request.CDB[11] = (size >> 16) & 0xFF;
  2249. c->Request.CDB[12] = (size >> 8) & 0xFF;
  2250. c->Request.CDB[13] = size & 0xFF;
  2251. c->Request.Timeout = 0;
  2252. c->Request.CDB[0] = cmd;
  2253. break;
  2254. case CCISS_CACHE_FLUSH:
  2255. c->Request.CDBLen = 12;
  2256. c->Request.Type.Attribute = ATTR_SIMPLE;
  2257. c->Request.Type.Direction = XFER_WRITE;
  2258. c->Request.Timeout = 0;
  2259. c->Request.CDB[0] = BMIC_WRITE;
  2260. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2261. break;
  2262. case TEST_UNIT_READY:
  2263. c->Request.CDBLen = 6;
  2264. c->Request.Type.Attribute = ATTR_SIMPLE;
  2265. c->Request.Type.Direction = XFER_NONE;
  2266. c->Request.Timeout = 0;
  2267. break;
  2268. default:
  2269. dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
  2270. return IO_ERROR;
  2271. }
  2272. } else if (cmd_type == TYPE_MSG) {
  2273. switch (cmd) {
  2274. case 0: /* ABORT message */
  2275. c->Request.CDBLen = 12;
  2276. c->Request.Type.Attribute = ATTR_SIMPLE;
  2277. c->Request.Type.Direction = XFER_WRITE;
  2278. c->Request.Timeout = 0;
  2279. c->Request.CDB[0] = cmd; /* abort */
  2280. c->Request.CDB[1] = 0; /* abort a command */
  2281. /* buff contains the tag of the command to abort */
  2282. memcpy(&c->Request.CDB[4], buff, 8);
  2283. break;
  2284. case 1: /* RESET message */
  2285. c->Request.CDBLen = 16;
  2286. c->Request.Type.Attribute = ATTR_SIMPLE;
  2287. c->Request.Type.Direction = XFER_NONE;
  2288. c->Request.Timeout = 0;
  2289. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2290. c->Request.CDB[0] = cmd; /* reset */
  2291. c->Request.CDB[1] = 0x03; /* reset a target */
  2292. break;
  2293. case 3: /* No-Op message */
  2294. c->Request.CDBLen = 1;
  2295. c->Request.Type.Attribute = ATTR_SIMPLE;
  2296. c->Request.Type.Direction = XFER_WRITE;
  2297. c->Request.Timeout = 0;
  2298. c->Request.CDB[0] = cmd;
  2299. break;
  2300. default:
  2301. dev_warn(&h->pdev->dev,
  2302. "unknown message type %d\n", cmd);
  2303. return IO_ERROR;
  2304. }
  2305. } else {
  2306. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2307. return IO_ERROR;
  2308. }
  2309. /* Fill in the scatter gather information */
  2310. if (size > 0) {
  2311. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2312. buff, size,
  2313. PCI_DMA_BIDIRECTIONAL);
  2314. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2315. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2316. c->SG[0].Len = size;
  2317. c->SG[0].Ext = 0; /* we are not chaining */
  2318. }
  2319. return status;
  2320. }
  2321. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2322. {
  2323. switch (c->err_info->ScsiStatus) {
  2324. case SAM_STAT_GOOD:
  2325. return IO_OK;
  2326. case SAM_STAT_CHECK_CONDITION:
  2327. switch (0xf & c->err_info->SenseInfo[2]) {
  2328. case 0: return IO_OK; /* no sense */
  2329. case 1: return IO_OK; /* recovered error */
  2330. default:
  2331. if (check_for_unit_attention(h, c))
  2332. return IO_NEEDS_RETRY;
  2333. dev_warn(&h->pdev->dev, "cmd 0x%02x "
  2334. "check condition, sense key = 0x%02x\n",
  2335. c->Request.CDB[0], c->err_info->SenseInfo[2]);
  2336. }
  2337. break;
  2338. default:
  2339. dev_warn(&h->pdev->dev, "cmd 0x%02x"
  2340. "scsi status = 0x%02x\n",
  2341. c->Request.CDB[0], c->err_info->ScsiStatus);
  2342. break;
  2343. }
  2344. return IO_ERROR;
  2345. }
  2346. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2347. {
  2348. int return_status = IO_OK;
  2349. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2350. return IO_OK;
  2351. switch (c->err_info->CommandStatus) {
  2352. case CMD_TARGET_STATUS:
  2353. return_status = check_target_status(h, c);
  2354. break;
  2355. case CMD_DATA_UNDERRUN:
  2356. case CMD_DATA_OVERRUN:
  2357. /* expected for inquiry and report lun commands */
  2358. break;
  2359. case CMD_INVALID:
  2360. dev_warn(&h->pdev->dev, "cmd 0x%02x is "
  2361. "reported invalid\n", c->Request.CDB[0]);
  2362. return_status = IO_ERROR;
  2363. break;
  2364. case CMD_PROTOCOL_ERR:
  2365. dev_warn(&h->pdev->dev, "cmd 0x%02x has "
  2366. "protocol error\n", c->Request.CDB[0]);
  2367. return_status = IO_ERROR;
  2368. break;
  2369. case CMD_HARDWARE_ERR:
  2370. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2371. " hardware error\n", c->Request.CDB[0]);
  2372. return_status = IO_ERROR;
  2373. break;
  2374. case CMD_CONNECTION_LOST:
  2375. dev_warn(&h->pdev->dev, "cmd 0x%02x had "
  2376. "connection lost\n", c->Request.CDB[0]);
  2377. return_status = IO_ERROR;
  2378. break;
  2379. case CMD_ABORTED:
  2380. dev_warn(&h->pdev->dev, "cmd 0x%02x was "
  2381. "aborted\n", c->Request.CDB[0]);
  2382. return_status = IO_ERROR;
  2383. break;
  2384. case CMD_ABORT_FAILED:
  2385. dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
  2386. "abort failed\n", c->Request.CDB[0]);
  2387. return_status = IO_ERROR;
  2388. break;
  2389. case CMD_UNSOLICITED_ABORT:
  2390. dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
  2391. c->Request.CDB[0]);
  2392. return_status = IO_NEEDS_RETRY;
  2393. break;
  2394. case CMD_UNABORTABLE:
  2395. dev_warn(&h->pdev->dev, "cmd unabortable\n");
  2396. return_status = IO_ERROR;
  2397. break;
  2398. default:
  2399. dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
  2400. "unknown status %x\n", c->Request.CDB[0],
  2401. c->err_info->CommandStatus);
  2402. return_status = IO_ERROR;
  2403. }
  2404. return return_status;
  2405. }
  2406. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2407. int attempt_retry)
  2408. {
  2409. DECLARE_COMPLETION_ONSTACK(wait);
  2410. u64bit buff_dma_handle;
  2411. int return_status = IO_OK;
  2412. resend_cmd2:
  2413. c->waiting = &wait;
  2414. enqueue_cmd_and_start_io(h, c);
  2415. wait_for_completion(&wait);
  2416. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2417. goto command_done;
  2418. return_status = process_sendcmd_error(h, c);
  2419. if (return_status == IO_NEEDS_RETRY &&
  2420. c->retry_count < MAX_CMD_RETRIES) {
  2421. dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
  2422. c->Request.CDB[0]);
  2423. c->retry_count++;
  2424. /* erase the old error information */
  2425. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2426. return_status = IO_OK;
  2427. INIT_COMPLETION(wait);
  2428. goto resend_cmd2;
  2429. }
  2430. command_done:
  2431. /* unlock the buffers from DMA */
  2432. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2433. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2434. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2435. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2436. return return_status;
  2437. }
  2438. static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
  2439. __u8 page_code, unsigned char scsi3addr[],
  2440. int cmd_type)
  2441. {
  2442. CommandList_struct *c;
  2443. int return_status;
  2444. c = cmd_special_alloc(h);
  2445. if (!c)
  2446. return -ENOMEM;
  2447. return_status = fill_cmd(h, c, cmd, buff, size, page_code,
  2448. scsi3addr, cmd_type);
  2449. if (return_status == IO_OK)
  2450. return_status = sendcmd_withirq_core(h, c, 1);
  2451. cmd_special_free(h, c);
  2452. return return_status;
  2453. }
  2454. static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
  2455. sector_t total_size,
  2456. unsigned int block_size,
  2457. InquiryData_struct *inq_buff,
  2458. drive_info_struct *drv)
  2459. {
  2460. int return_code;
  2461. unsigned long t;
  2462. unsigned char scsi3addr[8];
  2463. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2464. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2465. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  2466. sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
  2467. if (return_code == IO_OK) {
  2468. if (inq_buff->data_byte[8] == 0xFF) {
  2469. dev_warn(&h->pdev->dev,
  2470. "reading geometry failed, volume "
  2471. "does not support reading geometry\n");
  2472. drv->heads = 255;
  2473. drv->sectors = 32; /* Sectors per track */
  2474. drv->cylinders = total_size + 1;
  2475. drv->raid_level = RAID_UNKNOWN;
  2476. } else {
  2477. drv->heads = inq_buff->data_byte[6];
  2478. drv->sectors = inq_buff->data_byte[7];
  2479. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2480. drv->cylinders += inq_buff->data_byte[5];
  2481. drv->raid_level = inq_buff->data_byte[8];
  2482. }
  2483. drv->block_size = block_size;
  2484. drv->nr_blocks = total_size + 1;
  2485. t = drv->heads * drv->sectors;
  2486. if (t > 1) {
  2487. sector_t real_size = total_size + 1;
  2488. unsigned long rem = sector_div(real_size, t);
  2489. if (rem)
  2490. real_size++;
  2491. drv->cylinders = real_size;
  2492. }
  2493. } else { /* Get geometry failed */
  2494. dev_warn(&h->pdev->dev, "reading geometry failed\n");
  2495. }
  2496. }
  2497. static void
  2498. cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
  2499. unsigned int *block_size)
  2500. {
  2501. ReadCapdata_struct *buf;
  2502. int return_code;
  2503. unsigned char scsi3addr[8];
  2504. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2505. if (!buf) {
  2506. dev_warn(&h->pdev->dev, "out of memory\n");
  2507. return;
  2508. }
  2509. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2510. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
  2511. sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
  2512. if (return_code == IO_OK) {
  2513. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2514. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2515. } else { /* read capacity command failed */
  2516. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2517. *total_size = 0;
  2518. *block_size = BLOCK_SIZE;
  2519. }
  2520. kfree(buf);
  2521. }
  2522. static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
  2523. sector_t *total_size, unsigned int *block_size)
  2524. {
  2525. ReadCapdata_struct_16 *buf;
  2526. int return_code;
  2527. unsigned char scsi3addr[8];
  2528. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2529. if (!buf) {
  2530. dev_warn(&h->pdev->dev, "out of memory\n");
  2531. return;
  2532. }
  2533. log_unit_to_scsi3addr(h, scsi3addr, logvol);
  2534. return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
  2535. buf, sizeof(ReadCapdata_struct_16),
  2536. 0, scsi3addr, TYPE_CMD);
  2537. if (return_code == IO_OK) {
  2538. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2539. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2540. } else { /* read capacity command failed */
  2541. dev_warn(&h->pdev->dev, "read capacity failed\n");
  2542. *total_size = 0;
  2543. *block_size = BLOCK_SIZE;
  2544. }
  2545. dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
  2546. (unsigned long long)*total_size+1, *block_size);
  2547. kfree(buf);
  2548. }
  2549. static int cciss_revalidate(struct gendisk *disk)
  2550. {
  2551. ctlr_info_t *h = get_host(disk);
  2552. drive_info_struct *drv = get_drv(disk);
  2553. int logvol;
  2554. int FOUND = 0;
  2555. unsigned int block_size;
  2556. sector_t total_size;
  2557. InquiryData_struct *inq_buff = NULL;
  2558. for (logvol = 0; logvol <= h->highest_lun; logvol++) {
  2559. if (!h->drv[logvol])
  2560. continue;
  2561. if (memcmp(h->drv[logvol]->LunID, drv->LunID,
  2562. sizeof(drv->LunID)) == 0) {
  2563. FOUND = 1;
  2564. break;
  2565. }
  2566. }
  2567. if (!FOUND)
  2568. return 1;
  2569. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2570. if (inq_buff == NULL) {
  2571. dev_warn(&h->pdev->dev, "out of memory\n");
  2572. return 1;
  2573. }
  2574. if (h->cciss_read == CCISS_READ_10) {
  2575. cciss_read_capacity(h, logvol,
  2576. &total_size, &block_size);
  2577. } else {
  2578. cciss_read_capacity_16(h, logvol,
  2579. &total_size, &block_size);
  2580. }
  2581. cciss_geometry_inquiry(h, logvol, total_size, block_size,
  2582. inq_buff, drv);
  2583. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2584. set_capacity(disk, drv->nr_blocks);
  2585. kfree(inq_buff);
  2586. return 0;
  2587. }
  2588. /*
  2589. * Map (physical) PCI mem into (virtual) kernel space
  2590. */
  2591. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2592. {
  2593. ulong page_base = ((ulong) base) & PAGE_MASK;
  2594. ulong page_offs = ((ulong) base) - page_base;
  2595. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2596. return page_remapped ? (page_remapped + page_offs) : NULL;
  2597. }
  2598. /*
  2599. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2600. * the Q to wait for completion.
  2601. */
  2602. static void start_io(ctlr_info_t *h)
  2603. {
  2604. CommandList_struct *c;
  2605. while (!list_empty(&h->reqQ)) {
  2606. c = list_entry(h->reqQ.next, CommandList_struct, list);
  2607. /* can't do anything if fifo is full */
  2608. if ((h->access.fifo_full(h))) {
  2609. dev_warn(&h->pdev->dev, "fifo full\n");
  2610. break;
  2611. }
  2612. /* Get the first entry from the Request Q */
  2613. removeQ(c);
  2614. h->Qdepth--;
  2615. /* Tell the controller execute command */
  2616. h->access.submit_command(h, c);
  2617. /* Put job onto the completed Q */
  2618. addQ(&h->cmpQ, c);
  2619. }
  2620. }
  2621. /* Assumes that h->lock is held. */
  2622. /* Zeros out the error record and then resends the command back */
  2623. /* to the controller */
  2624. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2625. {
  2626. /* erase the old error information */
  2627. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2628. /* add it to software queue and then send it to the controller */
  2629. addQ(&h->reqQ, c);
  2630. h->Qdepth++;
  2631. if (h->Qdepth > h->maxQsinceinit)
  2632. h->maxQsinceinit = h->Qdepth;
  2633. start_io(h);
  2634. }
  2635. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2636. unsigned int msg_byte, unsigned int host_byte,
  2637. unsigned int driver_byte)
  2638. {
  2639. /* inverse of macros in scsi.h */
  2640. return (scsi_status_byte & 0xff) |
  2641. ((msg_byte & 0xff) << 8) |
  2642. ((host_byte & 0xff) << 16) |
  2643. ((driver_byte & 0xff) << 24);
  2644. }
  2645. static inline int evaluate_target_status(ctlr_info_t *h,
  2646. CommandList_struct *cmd, int *retry_cmd)
  2647. {
  2648. unsigned char sense_key;
  2649. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2650. int error_value;
  2651. *retry_cmd = 0;
  2652. /* If we get in here, it means we got "target status", that is, scsi status */
  2653. status_byte = cmd->err_info->ScsiStatus;
  2654. driver_byte = DRIVER_OK;
  2655. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2656. if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
  2657. host_byte = DID_PASSTHROUGH;
  2658. else
  2659. host_byte = DID_OK;
  2660. error_value = make_status_bytes(status_byte, msg_byte,
  2661. host_byte, driver_byte);
  2662. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2663. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
  2664. dev_warn(&h->pdev->dev, "cmd %p "
  2665. "has SCSI Status 0x%x\n",
  2666. cmd, cmd->err_info->ScsiStatus);
  2667. return error_value;
  2668. }
  2669. /* check the sense key */
  2670. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2671. /* no status or recovered error */
  2672. if (((sense_key == 0x0) || (sense_key == 0x1)) &&
  2673. (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
  2674. error_value = 0;
  2675. if (check_for_unit_attention(h, cmd)) {
  2676. *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
  2677. return 0;
  2678. }
  2679. /* Not SG_IO or similar? */
  2680. if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
  2681. if (error_value != 0)
  2682. dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
  2683. " sense key = 0x%x\n", cmd, sense_key);
  2684. return error_value;
  2685. }
  2686. /* SG_IO or similar, copy sense data back */
  2687. if (cmd->rq->sense) {
  2688. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2689. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2690. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2691. cmd->rq->sense_len);
  2692. } else
  2693. cmd->rq->sense_len = 0;
  2694. return error_value;
  2695. }
  2696. /* checks the status of the job and calls complete buffers to mark all
  2697. * buffers for the completed job. Note that this function does not need
  2698. * to hold the hba/queue lock.
  2699. */
  2700. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2701. int timeout)
  2702. {
  2703. int retry_cmd = 0;
  2704. struct request *rq = cmd->rq;
  2705. rq->errors = 0;
  2706. if (timeout)
  2707. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2708. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2709. goto after_error_processing;
  2710. switch (cmd->err_info->CommandStatus) {
  2711. case CMD_TARGET_STATUS:
  2712. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2713. break;
  2714. case CMD_DATA_UNDERRUN:
  2715. if (cmd->rq->cmd_type == REQ_TYPE_FS) {
  2716. dev_warn(&h->pdev->dev, "cmd %p has"
  2717. " completed with data underrun "
  2718. "reported\n", cmd);
  2719. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2720. }
  2721. break;
  2722. case CMD_DATA_OVERRUN:
  2723. if (cmd->rq->cmd_type == REQ_TYPE_FS)
  2724. dev_warn(&h->pdev->dev, "cciss: cmd %p has"
  2725. " completed with data overrun "
  2726. "reported\n", cmd);
  2727. break;
  2728. case CMD_INVALID:
  2729. dev_warn(&h->pdev->dev, "cciss: cmd %p is "
  2730. "reported invalid\n", cmd);
  2731. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2732. cmd->err_info->CommandStatus, DRIVER_OK,
  2733. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2734. DID_PASSTHROUGH : DID_ERROR);
  2735. break;
  2736. case CMD_PROTOCOL_ERR:
  2737. dev_warn(&h->pdev->dev, "cciss: cmd %p has "
  2738. "protocol error\n", cmd);
  2739. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2740. cmd->err_info->CommandStatus, DRIVER_OK,
  2741. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2742. DID_PASSTHROUGH : DID_ERROR);
  2743. break;
  2744. case CMD_HARDWARE_ERR:
  2745. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2746. " hardware error\n", cmd);
  2747. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2748. cmd->err_info->CommandStatus, DRIVER_OK,
  2749. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2750. DID_PASSTHROUGH : DID_ERROR);
  2751. break;
  2752. case CMD_CONNECTION_LOST:
  2753. dev_warn(&h->pdev->dev, "cciss: cmd %p had "
  2754. "connection lost\n", cmd);
  2755. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2756. cmd->err_info->CommandStatus, DRIVER_OK,
  2757. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2758. DID_PASSTHROUGH : DID_ERROR);
  2759. break;
  2760. case CMD_ABORTED:
  2761. dev_warn(&h->pdev->dev, "cciss: cmd %p was "
  2762. "aborted\n", cmd);
  2763. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2764. cmd->err_info->CommandStatus, DRIVER_OK,
  2765. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2766. DID_PASSTHROUGH : DID_ABORT);
  2767. break;
  2768. case CMD_ABORT_FAILED:
  2769. dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
  2770. "abort failed\n", cmd);
  2771. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2772. cmd->err_info->CommandStatus, DRIVER_OK,
  2773. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2774. DID_PASSTHROUGH : DID_ERROR);
  2775. break;
  2776. case CMD_UNSOLICITED_ABORT:
  2777. dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
  2778. "abort %p\n", h->ctlr, cmd);
  2779. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2780. retry_cmd = 1;
  2781. dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
  2782. cmd->retry_count++;
  2783. } else
  2784. dev_warn(&h->pdev->dev,
  2785. "%p retried too many times\n", cmd);
  2786. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2787. cmd->err_info->CommandStatus, DRIVER_OK,
  2788. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2789. DID_PASSTHROUGH : DID_ABORT);
  2790. break;
  2791. case CMD_TIMEOUT:
  2792. dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
  2793. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2794. cmd->err_info->CommandStatus, DRIVER_OK,
  2795. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2796. DID_PASSTHROUGH : DID_ERROR);
  2797. break;
  2798. case CMD_UNABORTABLE:
  2799. dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
  2800. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2801. cmd->err_info->CommandStatus, DRIVER_OK,
  2802. cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
  2803. DID_PASSTHROUGH : DID_ERROR);
  2804. break;
  2805. default:
  2806. dev_warn(&h->pdev->dev, "cmd %p returned "
  2807. "unknown status %x\n", cmd,
  2808. cmd->err_info->CommandStatus);
  2809. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2810. cmd->err_info->CommandStatus, DRIVER_OK,
  2811. (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
  2812. DID_PASSTHROUGH : DID_ERROR);
  2813. }
  2814. after_error_processing:
  2815. /* We need to return this command */
  2816. if (retry_cmd) {
  2817. resend_cciss_cmd(h, cmd);
  2818. return;
  2819. }
  2820. cmd->rq->completion_data = cmd;
  2821. blk_complete_request(cmd->rq);
  2822. }
  2823. static inline u32 cciss_tag_contains_index(u32 tag)
  2824. {
  2825. #define DIRECT_LOOKUP_BIT 0x10
  2826. return tag & DIRECT_LOOKUP_BIT;
  2827. }
  2828. static inline u32 cciss_tag_to_index(u32 tag)
  2829. {
  2830. #define DIRECT_LOOKUP_SHIFT 5
  2831. return tag >> DIRECT_LOOKUP_SHIFT;
  2832. }
  2833. static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
  2834. {
  2835. #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2836. #define CCISS_SIMPLE_ERROR_BITS 0x03
  2837. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  2838. return tag & ~CCISS_PERF_ERROR_BITS;
  2839. return tag & ~CCISS_SIMPLE_ERROR_BITS;
  2840. }
  2841. static inline void cciss_mark_tag_indexed(u32 *tag)
  2842. {
  2843. *tag |= DIRECT_LOOKUP_BIT;
  2844. }
  2845. static inline void cciss_set_tag_index(u32 *tag, u32 index)
  2846. {
  2847. *tag |= (index << DIRECT_LOOKUP_SHIFT);
  2848. }
  2849. /*
  2850. * Get a request and submit it to the controller.
  2851. */
  2852. static void do_cciss_request(struct request_queue *q)
  2853. {
  2854. ctlr_info_t *h = q->queuedata;
  2855. CommandList_struct *c;
  2856. sector_t start_blk;
  2857. int seg;
  2858. struct request *creq;
  2859. u64bit temp64;
  2860. struct scatterlist *tmp_sg;
  2861. SGDescriptor_struct *curr_sg;
  2862. drive_info_struct *drv;
  2863. int i, dir;
  2864. int sg_index = 0;
  2865. int chained = 0;
  2866. queue:
  2867. creq = blk_peek_request(q);
  2868. if (!creq)
  2869. goto startio;
  2870. BUG_ON(creq->nr_phys_segments > h->maxsgentries);
  2871. c = cmd_alloc(h);
  2872. if (!c)
  2873. goto full;
  2874. blk_start_request(creq);
  2875. tmp_sg = h->scatter_list[c->cmdindex];
  2876. spin_unlock_irq(q->queue_lock);
  2877. c->cmd_type = CMD_RWREQ;
  2878. c->rq = creq;
  2879. /* fill in the request */
  2880. drv = creq->rq_disk->private_data;
  2881. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2882. /* got command from pool, so use the command block index instead */
  2883. /* for direct lookups. */
  2884. /* The first 2 bits are reserved for controller error reporting. */
  2885. cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
  2886. cciss_mark_tag_indexed(&c->Header.Tag.lower);
  2887. memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
  2888. c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
  2889. c->Request.Type.Type = TYPE_CMD; /* It is a command. */
  2890. c->Request.Type.Attribute = ATTR_SIMPLE;
  2891. c->Request.Type.Direction =
  2892. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2893. c->Request.Timeout = 0; /* Don't time out */
  2894. c->Request.CDB[0] =
  2895. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2896. start_blk = blk_rq_pos(creq);
  2897. dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
  2898. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2899. sg_init_table(tmp_sg, h->maxsgentries);
  2900. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2901. /* get the DMA records for the setup */
  2902. if (c->Request.Type.Direction == XFER_READ)
  2903. dir = PCI_DMA_FROMDEVICE;
  2904. else
  2905. dir = PCI_DMA_TODEVICE;
  2906. curr_sg = c->SG;
  2907. sg_index = 0;
  2908. chained = 0;
  2909. for (i = 0; i < seg; i++) {
  2910. if (((sg_index+1) == (h->max_cmd_sgentries)) &&
  2911. !chained && ((seg - i) > 1)) {
  2912. /* Point to next chain block. */
  2913. curr_sg = h->cmd_sg_list[c->cmdindex];
  2914. sg_index = 0;
  2915. chained = 1;
  2916. }
  2917. curr_sg[sg_index].Len = tmp_sg[i].length;
  2918. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2919. tmp_sg[i].offset,
  2920. tmp_sg[i].length, dir);
  2921. curr_sg[sg_index].Addr.lower = temp64.val32.lower;
  2922. curr_sg[sg_index].Addr.upper = temp64.val32.upper;
  2923. curr_sg[sg_index].Ext = 0; /* we are not chaining */
  2924. ++sg_index;
  2925. }
  2926. if (chained)
  2927. cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
  2928. (seg - (h->max_cmd_sgentries - 1)) *
  2929. sizeof(SGDescriptor_struct));
  2930. /* track how many SG entries we are using */
  2931. if (seg > h->maxSG)
  2932. h->maxSG = seg;
  2933. dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
  2934. "chained[%d]\n",
  2935. blk_rq_sectors(creq), seg, chained);
  2936. c->Header.SGTotal = seg + chained;
  2937. if (seg <= h->max_cmd_sgentries)
  2938. c->Header.SGList = c->Header.SGTotal;
  2939. else
  2940. c->Header.SGList = h->max_cmd_sgentries;
  2941. set_performant_mode(h, c);
  2942. if (likely(creq->cmd_type == REQ_TYPE_FS)) {
  2943. if(h->cciss_read == CCISS_READ_10) {
  2944. c->Request.CDB[1] = 0;
  2945. c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
  2946. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2947. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2948. c->Request.CDB[5] = start_blk & 0xff;
  2949. c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
  2950. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2951. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2952. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2953. } else {
  2954. u32 upper32 = upper_32_bits(start_blk);
  2955. c->Request.CDBLen = 16;
  2956. c->Request.CDB[1]= 0;
  2957. c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
  2958. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2959. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2960. c->Request.CDB[5]= upper32 & 0xff;
  2961. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2962. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2963. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2964. c->Request.CDB[9]= start_blk & 0xff;
  2965. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2966. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2967. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2968. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2969. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2970. }
  2971. } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
  2972. c->Request.CDBLen = creq->cmd_len;
  2973. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2974. } else {
  2975. dev_warn(&h->pdev->dev, "bad request type %d\n",
  2976. creq->cmd_type);
  2977. BUG();
  2978. }
  2979. spin_lock_irq(q->queue_lock);
  2980. addQ(&h->reqQ, c);
  2981. h->Qdepth++;
  2982. if (h->Qdepth > h->maxQsinceinit)
  2983. h->maxQsinceinit = h->Qdepth;
  2984. goto queue;
  2985. full:
  2986. blk_stop_queue(q);
  2987. startio:
  2988. /* We will already have the driver lock here so not need
  2989. * to lock it.
  2990. */
  2991. start_io(h);
  2992. }
  2993. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2994. {
  2995. return h->access.command_completed(h);
  2996. }
  2997. static inline int interrupt_pending(ctlr_info_t *h)
  2998. {
  2999. return h->access.intr_pending(h);
  3000. }
  3001. static inline long interrupt_not_for_us(ctlr_info_t *h)
  3002. {
  3003. return ((h->access.intr_pending(h) == 0) ||
  3004. (h->interrupts_enabled == 0));
  3005. }
  3006. static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
  3007. u32 raw_tag)
  3008. {
  3009. if (unlikely(tag_index >= h->nr_cmds)) {
  3010. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3011. return 1;
  3012. }
  3013. return 0;
  3014. }
  3015. static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
  3016. u32 raw_tag)
  3017. {
  3018. removeQ(c);
  3019. if (likely(c->cmd_type == CMD_RWREQ))
  3020. complete_command(h, c, 0);
  3021. else if (c->cmd_type == CMD_IOCTL_PEND)
  3022. complete(c->waiting);
  3023. #ifdef CONFIG_CISS_SCSI_TAPE
  3024. else if (c->cmd_type == CMD_SCSI)
  3025. complete_scsi_command(c, 0, raw_tag);
  3026. #endif
  3027. }
  3028. static inline u32 next_command(ctlr_info_t *h)
  3029. {
  3030. u32 a;
  3031. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3032. return h->access.command_completed(h);
  3033. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  3034. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  3035. (h->reply_pool_head)++;
  3036. h->commands_outstanding--;
  3037. } else {
  3038. a = FIFO_EMPTY;
  3039. }
  3040. /* Check for wraparound */
  3041. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  3042. h->reply_pool_head = h->reply_pool;
  3043. h->reply_pool_wraparound ^= 1;
  3044. }
  3045. return a;
  3046. }
  3047. /* process completion of an indexed ("direct lookup") command */
  3048. static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3049. {
  3050. u32 tag_index;
  3051. CommandList_struct *c;
  3052. tag_index = cciss_tag_to_index(raw_tag);
  3053. if (bad_tag(h, tag_index, raw_tag))
  3054. return next_command(h);
  3055. c = h->cmd_pool + tag_index;
  3056. finish_cmd(h, c, raw_tag);
  3057. return next_command(h);
  3058. }
  3059. /* process completion of a non-indexed command */
  3060. static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
  3061. {
  3062. CommandList_struct *c = NULL;
  3063. __u32 busaddr_masked, tag_masked;
  3064. tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
  3065. list_for_each_entry(c, &h->cmpQ, list) {
  3066. busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
  3067. if (busaddr_masked == tag_masked) {
  3068. finish_cmd(h, c, raw_tag);
  3069. return next_command(h);
  3070. }
  3071. }
  3072. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3073. return next_command(h);
  3074. }
  3075. static irqreturn_t do_cciss_intx(int irq, void *dev_id)
  3076. {
  3077. ctlr_info_t *h = dev_id;
  3078. unsigned long flags;
  3079. u32 raw_tag;
  3080. if (interrupt_not_for_us(h))
  3081. return IRQ_NONE;
  3082. spin_lock_irqsave(&h->lock, flags);
  3083. while (interrupt_pending(h)) {
  3084. raw_tag = get_next_completion(h);
  3085. while (raw_tag != FIFO_EMPTY) {
  3086. if (cciss_tag_contains_index(raw_tag))
  3087. raw_tag = process_indexed_cmd(h, raw_tag);
  3088. else
  3089. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3090. }
  3091. }
  3092. spin_unlock_irqrestore(&h->lock, flags);
  3093. return IRQ_HANDLED;
  3094. }
  3095. /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
  3096. * check the interrupt pending register because it is not set.
  3097. */
  3098. static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
  3099. {
  3100. ctlr_info_t *h = dev_id;
  3101. unsigned long flags;
  3102. u32 raw_tag;
  3103. spin_lock_irqsave(&h->lock, flags);
  3104. raw_tag = get_next_completion(h);
  3105. while (raw_tag != FIFO_EMPTY) {
  3106. if (cciss_tag_contains_index(raw_tag))
  3107. raw_tag = process_indexed_cmd(h, raw_tag);
  3108. else
  3109. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3110. }
  3111. spin_unlock_irqrestore(&h->lock, flags);
  3112. return IRQ_HANDLED;
  3113. }
  3114. /**
  3115. * add_to_scan_list() - add controller to rescan queue
  3116. * @h: Pointer to the controller.
  3117. *
  3118. * Adds the controller to the rescan queue if not already on the queue.
  3119. *
  3120. * returns 1 if added to the queue, 0 if skipped (could be on the
  3121. * queue already, or the controller could be initializing or shutting
  3122. * down).
  3123. **/
  3124. static int add_to_scan_list(struct ctlr_info *h)
  3125. {
  3126. struct ctlr_info *test_h;
  3127. int found = 0;
  3128. int ret = 0;
  3129. if (h->busy_initializing)
  3130. return 0;
  3131. if (!mutex_trylock(&h->busy_shutting_down))
  3132. return 0;
  3133. mutex_lock(&scan_mutex);
  3134. list_for_each_entry(test_h, &scan_q, scan_list) {
  3135. if (test_h == h) {
  3136. found = 1;
  3137. break;
  3138. }
  3139. }
  3140. if (!found && !h->busy_scanning) {
  3141. INIT_COMPLETION(h->scan_wait);
  3142. list_add_tail(&h->scan_list, &scan_q);
  3143. ret = 1;
  3144. }
  3145. mutex_unlock(&scan_mutex);
  3146. mutex_unlock(&h->busy_shutting_down);
  3147. return ret;
  3148. }
  3149. /**
  3150. * remove_from_scan_list() - remove controller from rescan queue
  3151. * @h: Pointer to the controller.
  3152. *
  3153. * Removes the controller from the rescan queue if present. Blocks if
  3154. * the controller is currently conducting a rescan. The controller
  3155. * can be in one of three states:
  3156. * 1. Doesn't need a scan
  3157. * 2. On the scan list, but not scanning yet (we remove it)
  3158. * 3. Busy scanning (and not on the list). In this case we want to wait for
  3159. * the scan to complete to make sure the scanning thread for this
  3160. * controller is completely idle.
  3161. **/
  3162. static void remove_from_scan_list(struct ctlr_info *h)
  3163. {
  3164. struct ctlr_info *test_h, *tmp_h;
  3165. mutex_lock(&scan_mutex);
  3166. list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
  3167. if (test_h == h) { /* state 2. */
  3168. list_del(&h->scan_list);
  3169. complete_all(&h->scan_wait);
  3170. mutex_unlock(&scan_mutex);
  3171. return;
  3172. }
  3173. }
  3174. if (h->busy_scanning) { /* state 3. */
  3175. mutex_unlock(&scan_mutex);
  3176. wait_for_completion(&h->scan_wait);
  3177. } else { /* state 1, nothing to do. */
  3178. mutex_unlock(&scan_mutex);
  3179. }
  3180. }
  3181. /**
  3182. * scan_thread() - kernel thread used to rescan controllers
  3183. * @data: Ignored.
  3184. *
  3185. * A kernel thread used scan for drive topology changes on
  3186. * controllers. The thread processes only one controller at a time
  3187. * using a queue. Controllers are added to the queue using
  3188. * add_to_scan_list() and removed from the queue either after done
  3189. * processing or using remove_from_scan_list().
  3190. *
  3191. * returns 0.
  3192. **/
  3193. static int scan_thread(void *data)
  3194. {
  3195. struct ctlr_info *h;
  3196. while (1) {
  3197. set_current_state(TASK_INTERRUPTIBLE);
  3198. schedule();
  3199. if (kthread_should_stop())
  3200. break;
  3201. while (1) {
  3202. mutex_lock(&scan_mutex);
  3203. if (list_empty(&scan_q)) {
  3204. mutex_unlock(&scan_mutex);
  3205. break;
  3206. }
  3207. h = list_entry(scan_q.next,
  3208. struct ctlr_info,
  3209. scan_list);
  3210. list_del(&h->scan_list);
  3211. h->busy_scanning = 1;
  3212. mutex_unlock(&scan_mutex);
  3213. rebuild_lun_table(h, 0, 0);
  3214. complete_all(&h->scan_wait);
  3215. mutex_lock(&scan_mutex);
  3216. h->busy_scanning = 0;
  3217. mutex_unlock(&scan_mutex);
  3218. }
  3219. }
  3220. return 0;
  3221. }
  3222. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  3223. {
  3224. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  3225. return 0;
  3226. switch (c->err_info->SenseInfo[12]) {
  3227. case STATE_CHANGED:
  3228. dev_warn(&h->pdev->dev, "a state change "
  3229. "detected, command retried\n");
  3230. return 1;
  3231. break;
  3232. case LUN_FAILED:
  3233. dev_warn(&h->pdev->dev, "LUN failure "
  3234. "detected, action required\n");
  3235. return 1;
  3236. break;
  3237. case REPORT_LUNS_CHANGED:
  3238. dev_warn(&h->pdev->dev, "report LUN data changed\n");
  3239. /*
  3240. * Here, we could call add_to_scan_list and wake up the scan thread,
  3241. * except that it's quite likely that we will get more than one
  3242. * REPORT_LUNS_CHANGED condition in quick succession, which means
  3243. * that those which occur after the first one will likely happen
  3244. * *during* the scan_thread's rescan. And the rescan code is not
  3245. * robust enough to restart in the middle, undoing what it has already
  3246. * done, and it's not clear that it's even possible to do this, since
  3247. * part of what it does is notify the block layer, which starts
  3248. * doing it's own i/o to read partition tables and so on, and the
  3249. * driver doesn't have visibility to know what might need undoing.
  3250. * In any event, if possible, it is horribly complicated to get right
  3251. * so we just don't do it for now.
  3252. *
  3253. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  3254. */
  3255. return 1;
  3256. break;
  3257. case POWER_OR_RESET:
  3258. dev_warn(&h->pdev->dev,
  3259. "a power on or device reset detected\n");
  3260. return 1;
  3261. break;
  3262. case UNIT_ATTENTION_CLEARED:
  3263. dev_warn(&h->pdev->dev,
  3264. "unit attention cleared by another initiator\n");
  3265. return 1;
  3266. break;
  3267. default:
  3268. dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
  3269. return 1;
  3270. }
  3271. }
  3272. /*
  3273. * We cannot read the structure directly, for portability we must use
  3274. * the io functions.
  3275. * This is for debug only.
  3276. */
  3277. static void print_cfg_table(ctlr_info_t *h)
  3278. {
  3279. int i;
  3280. char temp_name[17];
  3281. CfgTable_struct *tb = h->cfgtable;
  3282. dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
  3283. dev_dbg(&h->pdev->dev, "------------------------------------\n");
  3284. for (i = 0; i < 4; i++)
  3285. temp_name[i] = readb(&(tb->Signature[i]));
  3286. temp_name[4] = '\0';
  3287. dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
  3288. dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
  3289. readl(&(tb->SpecValence)));
  3290. dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
  3291. readl(&(tb->TransportSupport)));
  3292. dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
  3293. readl(&(tb->TransportActive)));
  3294. dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
  3295. readl(&(tb->HostWrite.TransportRequest)));
  3296. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
  3297. readl(&(tb->HostWrite.CoalIntDelay)));
  3298. dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
  3299. readl(&(tb->HostWrite.CoalIntCount)));
  3300. dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
  3301. readl(&(tb->CmdsOutMax)));
  3302. dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
  3303. readl(&(tb->BusTypes)));
  3304. for (i = 0; i < 16; i++)
  3305. temp_name[i] = readb(&(tb->ServerName[i]));
  3306. temp_name[16] = '\0';
  3307. dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
  3308. dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
  3309. readl(&(tb->HeartBeat)));
  3310. }
  3311. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3312. {
  3313. int i, offset, mem_type, bar_type;
  3314. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3315. return 0;
  3316. offset = 0;
  3317. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3318. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3319. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3320. offset += 4;
  3321. else {
  3322. mem_type = pci_resource_flags(pdev, i) &
  3323. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3324. switch (mem_type) {
  3325. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3326. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3327. offset += 4; /* 32 bit */
  3328. break;
  3329. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3330. offset += 8;
  3331. break;
  3332. default: /* reserved in PCI 2.2 */
  3333. dev_warn(&pdev->dev,
  3334. "Base address is invalid\n");
  3335. return -1;
  3336. break;
  3337. }
  3338. }
  3339. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3340. return i + 1;
  3341. }
  3342. return -1;
  3343. }
  3344. /* Fill in bucket_map[], given nsgs (the max number of
  3345. * scatter gather elements supported) and bucket[],
  3346. * which is an array of 8 integers. The bucket[] array
  3347. * contains 8 different DMA transfer sizes (in 16
  3348. * byte increments) which the controller uses to fetch
  3349. * commands. This function fills in bucket_map[], which
  3350. * maps a given number of scatter gather elements to one of
  3351. * the 8 DMA transfer sizes. The point of it is to allow the
  3352. * controller to only do as much DMA as needed to fetch the
  3353. * command, with the DMA transfer size encoded in the lower
  3354. * bits of the command address.
  3355. */
  3356. static void calc_bucket_map(int bucket[], int num_buckets,
  3357. int nsgs, int *bucket_map)
  3358. {
  3359. int i, j, b, size;
  3360. /* even a command with 0 SGs requires 4 blocks */
  3361. #define MINIMUM_TRANSFER_BLOCKS 4
  3362. #define NUM_BUCKETS 8
  3363. /* Note, bucket_map must have nsgs+1 entries. */
  3364. for (i = 0; i <= nsgs; i++) {
  3365. /* Compute size of a command with i SG entries */
  3366. size = i + MINIMUM_TRANSFER_BLOCKS;
  3367. b = num_buckets; /* Assume the biggest bucket */
  3368. /* Find the bucket that is just big enough */
  3369. for (j = 0; j < 8; j++) {
  3370. if (bucket[j] >= size) {
  3371. b = j;
  3372. break;
  3373. }
  3374. }
  3375. /* for a command with i SG entries, use bucket b. */
  3376. bucket_map[i] = b;
  3377. }
  3378. }
  3379. static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
  3380. {
  3381. int i;
  3382. /* under certain very rare conditions, this can take awhile.
  3383. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3384. * as we enter this code.) */
  3385. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3386. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3387. break;
  3388. usleep_range(10000, 20000);
  3389. }
  3390. }
  3391. static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
  3392. u32 use_short_tags)
  3393. {
  3394. /* This is a bit complicated. There are 8 registers on
  3395. * the controller which we write to to tell it 8 different
  3396. * sizes of commands which there may be. It's a way of
  3397. * reducing the DMA done to fetch each command. Encoded into
  3398. * each command's tag are 3 bits which communicate to the controller
  3399. * which of the eight sizes that command fits within. The size of
  3400. * each command depends on how many scatter gather entries there are.
  3401. * Each SG entry requires 16 bytes. The eight registers are programmed
  3402. * with the number of 16-byte blocks a command of that size requires.
  3403. * The smallest command possible requires 5 such 16 byte blocks.
  3404. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3405. * blocks. Note, this only extends to the SG entries contained
  3406. * within the command block, and does not extend to chained blocks
  3407. * of SG elements. bft[] contains the eight values we write to
  3408. * the registers. They are not evenly distributed, but have more
  3409. * sizes for small commands, and fewer sizes for larger commands.
  3410. */
  3411. __u32 trans_offset;
  3412. int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3413. /*
  3414. * 5 = 1 s/g entry or 4k
  3415. * 6 = 2 s/g entry or 8k
  3416. * 8 = 4 s/g entry or 16k
  3417. * 10 = 6 s/g entry or 24k
  3418. */
  3419. unsigned long register_value;
  3420. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3421. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3422. /* Controller spec: zero out this buffer. */
  3423. memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
  3424. h->reply_pool_head = h->reply_pool;
  3425. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3426. calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
  3427. h->blockFetchTable);
  3428. writel(bft[0], &h->transtable->BlockFetch0);
  3429. writel(bft[1], &h->transtable->BlockFetch1);
  3430. writel(bft[2], &h->transtable->BlockFetch2);
  3431. writel(bft[3], &h->transtable->BlockFetch3);
  3432. writel(bft[4], &h->transtable->BlockFetch4);
  3433. writel(bft[5], &h->transtable->BlockFetch5);
  3434. writel(bft[6], &h->transtable->BlockFetch6);
  3435. writel(bft[7], &h->transtable->BlockFetch7);
  3436. /* size of controller ring buffer */
  3437. writel(h->max_commands, &h->transtable->RepQSize);
  3438. writel(1, &h->transtable->RepQCount);
  3439. writel(0, &h->transtable->RepQCtrAddrLow32);
  3440. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3441. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3442. writel(0, &h->transtable->RepQAddr0High32);
  3443. writel(CFGTBL_Trans_Performant | use_short_tags,
  3444. &(h->cfgtable->HostWrite.TransportRequest));
  3445. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3446. cciss_wait_for_mode_change_ack(h);
  3447. register_value = readl(&(h->cfgtable->TransportActive));
  3448. if (!(register_value & CFGTBL_Trans_Performant))
  3449. dev_warn(&h->pdev->dev, "cciss: unable to get board into"
  3450. " performant mode\n");
  3451. }
  3452. static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
  3453. {
  3454. __u32 trans_support;
  3455. dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
  3456. /* Attempt to put controller into performant mode if supported */
  3457. /* Does board support performant mode? */
  3458. trans_support = readl(&(h->cfgtable->TransportSupport));
  3459. if (!(trans_support & PERFORMANT_MODE))
  3460. return;
  3461. dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
  3462. /* Performant mode demands commands on a 32 byte boundary
  3463. * pci_alloc_consistent aligns on page boundarys already.
  3464. * Just need to check if divisible by 32
  3465. */
  3466. if ((sizeof(CommandList_struct) % 32) != 0) {
  3467. dev_warn(&h->pdev->dev, "%s %d %s\n",
  3468. "cciss info: command size[",
  3469. (int)sizeof(CommandList_struct),
  3470. "] not divisible by 32, no performant mode..\n");
  3471. return;
  3472. }
  3473. /* Performant mode ring buffer and supporting data structures */
  3474. h->reply_pool = (__u64 *)pci_alloc_consistent(
  3475. h->pdev, h->max_commands * sizeof(__u64),
  3476. &(h->reply_pool_dhandle));
  3477. /* Need a block fetch table for performant mode */
  3478. h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
  3479. sizeof(__u32)), GFP_KERNEL);
  3480. if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
  3481. goto clean_up;
  3482. cciss_enter_performant_mode(h,
  3483. trans_support & CFGTBL_Trans_use_short_tags);
  3484. /* Change the access methods to the performant access methods */
  3485. h->access = SA5_performant_access;
  3486. h->transMethod = CFGTBL_Trans_Performant;
  3487. return;
  3488. clean_up:
  3489. kfree(h->blockFetchTable);
  3490. if (h->reply_pool)
  3491. pci_free_consistent(h->pdev,
  3492. h->max_commands * sizeof(__u64),
  3493. h->reply_pool,
  3494. h->reply_pool_dhandle);
  3495. return;
  3496. } /* cciss_put_controller_into_performant_mode */
  3497. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3498. * controllers that are capable. If not, we use IO-APIC mode.
  3499. */
  3500. static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
  3501. {
  3502. #ifdef CONFIG_PCI_MSI
  3503. int err;
  3504. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3505. {0, 2}, {0, 3}
  3506. };
  3507. /* Some boards advertise MSI but don't really support it */
  3508. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3509. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3510. goto default_int_mode;
  3511. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3512. err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
  3513. if (!err) {
  3514. h->intr[0] = cciss_msix_entries[0].vector;
  3515. h->intr[1] = cciss_msix_entries[1].vector;
  3516. h->intr[2] = cciss_msix_entries[2].vector;
  3517. h->intr[3] = cciss_msix_entries[3].vector;
  3518. h->msix_vector = 1;
  3519. return;
  3520. }
  3521. if (err > 0) {
  3522. dev_warn(&h->pdev->dev,
  3523. "only %d MSI-X vectors available\n", err);
  3524. goto default_int_mode;
  3525. } else {
  3526. dev_warn(&h->pdev->dev,
  3527. "MSI-X init failed %d\n", err);
  3528. goto default_int_mode;
  3529. }
  3530. }
  3531. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3532. if (!pci_enable_msi(h->pdev))
  3533. h->msi_vector = 1;
  3534. else
  3535. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3536. }
  3537. default_int_mode:
  3538. #endif /* CONFIG_PCI_MSI */
  3539. /* if we get here we're going to use the default interrupt mode */
  3540. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3541. return;
  3542. }
  3543. static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3544. {
  3545. int i;
  3546. u32 subsystem_vendor_id, subsystem_device_id;
  3547. subsystem_vendor_id = pdev->subsystem_vendor;
  3548. subsystem_device_id = pdev->subsystem_device;
  3549. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3550. subsystem_vendor_id;
  3551. for (i = 0; i < ARRAY_SIZE(products); i++)
  3552. if (*board_id == products[i].board_id)
  3553. return i;
  3554. dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
  3555. *board_id);
  3556. return -ENODEV;
  3557. }
  3558. static inline bool cciss_board_disabled(ctlr_info_t *h)
  3559. {
  3560. u16 command;
  3561. (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
  3562. return ((command & PCI_COMMAND_MEMORY) == 0);
  3563. }
  3564. static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
  3565. unsigned long *memory_bar)
  3566. {
  3567. int i;
  3568. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3569. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3570. /* addressing mode bits already removed */
  3571. *memory_bar = pci_resource_start(pdev, i);
  3572. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3573. *memory_bar);
  3574. return 0;
  3575. }
  3576. dev_warn(&pdev->dev, "no memory BAR found\n");
  3577. return -ENODEV;
  3578. }
  3579. static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
  3580. void __iomem *vaddr, int wait_for_ready)
  3581. #define BOARD_READY 1
  3582. #define BOARD_NOT_READY 0
  3583. {
  3584. int i, iterations;
  3585. u32 scratchpad;
  3586. if (wait_for_ready)
  3587. iterations = CCISS_BOARD_READY_ITERATIONS;
  3588. else
  3589. iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
  3590. for (i = 0; i < iterations; i++) {
  3591. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3592. if (wait_for_ready) {
  3593. if (scratchpad == CCISS_FIRMWARE_READY)
  3594. return 0;
  3595. } else {
  3596. if (scratchpad != CCISS_FIRMWARE_READY)
  3597. return 0;
  3598. }
  3599. msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
  3600. }
  3601. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3602. return -ENODEV;
  3603. }
  3604. static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
  3605. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3606. u64 *cfg_offset)
  3607. {
  3608. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3609. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3610. *cfg_base_addr &= (u32) 0x0000ffff;
  3611. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3612. if (*cfg_base_addr_index == -1) {
  3613. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
  3614. "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
  3615. return -ENODEV;
  3616. }
  3617. return 0;
  3618. }
  3619. static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
  3620. {
  3621. u64 cfg_offset;
  3622. u32 cfg_base_addr;
  3623. u64 cfg_base_addr_index;
  3624. u32 trans_offset;
  3625. int rc;
  3626. rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3627. &cfg_base_addr_index, &cfg_offset);
  3628. if (rc)
  3629. return rc;
  3630. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3631. cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
  3632. if (!h->cfgtable)
  3633. return -ENOMEM;
  3634. /* Find performant mode table. */
  3635. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3636. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3637. cfg_base_addr_index)+cfg_offset+trans_offset,
  3638. sizeof(*h->transtable));
  3639. if (!h->transtable)
  3640. return -ENOMEM;
  3641. return 0;
  3642. }
  3643. static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
  3644. {
  3645. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3646. /* Limit commands in memory limited kdump scenario. */
  3647. if (reset_devices && h->max_commands > 32)
  3648. h->max_commands = 32;
  3649. if (h->max_commands < 16) {
  3650. dev_warn(&h->pdev->dev, "Controller reports "
  3651. "max supported commands of %d, an obvious lie. "
  3652. "Using 16. Ensure that firmware is up to date.\n",
  3653. h->max_commands);
  3654. h->max_commands = 16;
  3655. }
  3656. }
  3657. /* Interrogate the hardware for some limits:
  3658. * max commands, max SG elements without chaining, and with chaining,
  3659. * SG chain block size, etc.
  3660. */
  3661. static void __devinit cciss_find_board_params(ctlr_info_t *h)
  3662. {
  3663. cciss_get_max_perf_mode_cmds(h);
  3664. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3665. h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
  3666. /*
  3667. * Limit in-command s/g elements to 32 save dma'able memory.
  3668. * Howvever spec says if 0, use 31
  3669. */
  3670. h->max_cmd_sgentries = 31;
  3671. if (h->maxsgentries > 512) {
  3672. h->max_cmd_sgentries = 32;
  3673. h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
  3674. h->maxsgentries--; /* save one for chain pointer */
  3675. } else {
  3676. h->maxsgentries = 31; /* default to traditional values */
  3677. h->chainsize = 0;
  3678. }
  3679. }
  3680. static inline bool CISS_signature_present(ctlr_info_t *h)
  3681. {
  3682. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3683. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3684. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3685. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3686. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3687. return false;
  3688. }
  3689. return true;
  3690. }
  3691. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3692. static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
  3693. {
  3694. #ifdef CONFIG_X86
  3695. u32 prefetch;
  3696. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3697. prefetch |= 0x100;
  3698. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3699. #endif
  3700. }
  3701. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3702. * in a prefetch beyond physical memory.
  3703. */
  3704. static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
  3705. {
  3706. u32 dma_prefetch;
  3707. __u32 dma_refetch;
  3708. if (h->board_id != 0x3225103C)
  3709. return;
  3710. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3711. dma_prefetch |= 0x8000;
  3712. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3713. pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3714. dma_refetch |= 0x1;
  3715. pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
  3716. }
  3717. static int __devinit cciss_pci_init(ctlr_info_t *h)
  3718. {
  3719. int prod_index, err;
  3720. prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
  3721. if (prod_index < 0)
  3722. return -ENODEV;
  3723. h->product_name = products[prod_index].product_name;
  3724. h->access = *(products[prod_index].access);
  3725. if (cciss_board_disabled(h)) {
  3726. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3727. return -ENODEV;
  3728. }
  3729. err = pci_enable_device(h->pdev);
  3730. if (err) {
  3731. dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
  3732. return err;
  3733. }
  3734. err = pci_request_regions(h->pdev, "cciss");
  3735. if (err) {
  3736. dev_warn(&h->pdev->dev,
  3737. "Cannot obtain PCI resources, aborting\n");
  3738. return err;
  3739. }
  3740. dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
  3741. dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
  3742. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3743. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3744. */
  3745. cciss_interrupt_mode(h);
  3746. err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
  3747. if (err)
  3748. goto err_out_free_res;
  3749. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3750. if (!h->vaddr) {
  3751. err = -ENOMEM;
  3752. goto err_out_free_res;
  3753. }
  3754. err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3755. if (err)
  3756. goto err_out_free_res;
  3757. err = cciss_find_cfgtables(h);
  3758. if (err)
  3759. goto err_out_free_res;
  3760. print_cfg_table(h);
  3761. cciss_find_board_params(h);
  3762. if (!CISS_signature_present(h)) {
  3763. err = -ENODEV;
  3764. goto err_out_free_res;
  3765. }
  3766. cciss_enable_scsi_prefetch(h);
  3767. cciss_p600_dma_prefetch_quirk(h);
  3768. cciss_put_controller_into_performant_mode(h);
  3769. return 0;
  3770. err_out_free_res:
  3771. /*
  3772. * Deliberately omit pci_disable_device(): it does something nasty to
  3773. * Smart Array controllers that pci_enable_device does not undo
  3774. */
  3775. if (h->transtable)
  3776. iounmap(h->transtable);
  3777. if (h->cfgtable)
  3778. iounmap(h->cfgtable);
  3779. if (h->vaddr)
  3780. iounmap(h->vaddr);
  3781. pci_release_regions(h->pdev);
  3782. return err;
  3783. }
  3784. /* Function to find the first free pointer into our hba[] array
  3785. * Returns -1 if no free entries are left.
  3786. */
  3787. static int alloc_cciss_hba(struct pci_dev *pdev)
  3788. {
  3789. int i;
  3790. for (i = 0; i < MAX_CTLR; i++) {
  3791. if (!hba[i]) {
  3792. ctlr_info_t *h;
  3793. h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3794. if (!h)
  3795. goto Enomem;
  3796. hba[i] = h;
  3797. return i;
  3798. }
  3799. }
  3800. dev_warn(&pdev->dev, "This driver supports a maximum"
  3801. " of %d controllers.\n", MAX_CTLR);
  3802. return -1;
  3803. Enomem:
  3804. dev_warn(&pdev->dev, "out of memory.\n");
  3805. return -1;
  3806. }
  3807. static void free_hba(ctlr_info_t *h)
  3808. {
  3809. int i;
  3810. hba[h->ctlr] = NULL;
  3811. for (i = 0; i < h->highest_lun + 1; i++)
  3812. if (h->gendisk[i] != NULL)
  3813. put_disk(h->gendisk[i]);
  3814. kfree(h);
  3815. }
  3816. /* Send a message CDB to the firmware. */
  3817. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3818. {
  3819. typedef struct {
  3820. CommandListHeader_struct CommandHeader;
  3821. RequestBlock_struct Request;
  3822. ErrDescriptor_struct ErrorDescriptor;
  3823. } Command;
  3824. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3825. Command *cmd;
  3826. dma_addr_t paddr64;
  3827. uint32_t paddr32, tag;
  3828. void __iomem *vaddr;
  3829. int i, err;
  3830. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3831. if (vaddr == NULL)
  3832. return -ENOMEM;
  3833. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3834. CCISS commands, so they must be allocated from the lower 4GiB of
  3835. memory. */
  3836. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3837. if (err) {
  3838. iounmap(vaddr);
  3839. return -ENOMEM;
  3840. }
  3841. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3842. if (cmd == NULL) {
  3843. iounmap(vaddr);
  3844. return -ENOMEM;
  3845. }
  3846. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3847. although there's no guarantee, we assume that the address is at
  3848. least 4-byte aligned (most likely, it's page-aligned). */
  3849. paddr32 = paddr64;
  3850. cmd->CommandHeader.ReplyQueue = 0;
  3851. cmd->CommandHeader.SGList = 0;
  3852. cmd->CommandHeader.SGTotal = 0;
  3853. cmd->CommandHeader.Tag.lower = paddr32;
  3854. cmd->CommandHeader.Tag.upper = 0;
  3855. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3856. cmd->Request.CDBLen = 16;
  3857. cmd->Request.Type.Type = TYPE_MSG;
  3858. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3859. cmd->Request.Type.Direction = XFER_NONE;
  3860. cmd->Request.Timeout = 0; /* Don't time out */
  3861. cmd->Request.CDB[0] = opcode;
  3862. cmd->Request.CDB[1] = type;
  3863. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3864. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3865. cmd->ErrorDescriptor.Addr.upper = 0;
  3866. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3867. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3868. for (i = 0; i < 10; i++) {
  3869. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3870. if ((tag & ~3) == paddr32)
  3871. break;
  3872. schedule_timeout_uninterruptible(HZ);
  3873. }
  3874. iounmap(vaddr);
  3875. /* we leak the DMA buffer here ... no choice since the controller could
  3876. still complete the command. */
  3877. if (i == 10) {
  3878. dev_err(&pdev->dev,
  3879. "controller message %02x:%02x timed out\n",
  3880. opcode, type);
  3881. return -ETIMEDOUT;
  3882. }
  3883. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3884. if (tag & 2) {
  3885. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3886. opcode, type);
  3887. return -EIO;
  3888. }
  3889. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3890. opcode, type);
  3891. return 0;
  3892. }
  3893. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3894. #define cciss_noop(p) cciss_message(p, 3, 0)
  3895. static int cciss_controller_hard_reset(struct pci_dev *pdev,
  3896. void * __iomem vaddr, bool use_doorbell)
  3897. {
  3898. u16 pmcsr;
  3899. int pos;
  3900. if (use_doorbell) {
  3901. /* For everything after the P600, the PCI power state method
  3902. * of resetting the controller doesn't work, so we have this
  3903. * other way using the doorbell register.
  3904. */
  3905. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3906. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  3907. msleep(1000);
  3908. } else { /* Try to do it the PCI power state way */
  3909. /* Quoting from the Open CISS Specification: "The Power
  3910. * Management Control/Status Register (CSR) controls the power
  3911. * state of the device. The normal operating state is D0,
  3912. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3913. * the controller, place the interface device in D3 then to D0,
  3914. * this causes a secondary PCI reset which will reset the
  3915. * controller." */
  3916. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3917. if (pos == 0) {
  3918. dev_err(&pdev->dev,
  3919. "cciss_controller_hard_reset: "
  3920. "PCI PM not supported\n");
  3921. return -ENODEV;
  3922. }
  3923. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3924. /* enter the D3hot power management state */
  3925. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3926. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3927. pmcsr |= PCI_D3hot;
  3928. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3929. msleep(500);
  3930. /* enter the D0 power management state */
  3931. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3932. pmcsr |= PCI_D0;
  3933. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3934. msleep(500);
  3935. }
  3936. return 0;
  3937. }
  3938. /* This does a hard reset of the controller using PCI power management
  3939. * states or using the doorbell register. */
  3940. static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
  3941. {
  3942. u64 cfg_offset;
  3943. u32 cfg_base_addr;
  3944. u64 cfg_base_addr_index;
  3945. void __iomem *vaddr;
  3946. unsigned long paddr;
  3947. u32 misc_fw_support, active_transport;
  3948. int rc;
  3949. CfgTable_struct __iomem *cfgtable;
  3950. bool use_doorbell;
  3951. u32 board_id;
  3952. u16 command_register;
  3953. /* For controllers as old a the p600, this is very nearly
  3954. * the same thing as
  3955. *
  3956. * pci_save_state(pci_dev);
  3957. * pci_set_power_state(pci_dev, PCI_D3hot);
  3958. * pci_set_power_state(pci_dev, PCI_D0);
  3959. * pci_restore_state(pci_dev);
  3960. *
  3961. * For controllers newer than the P600, the pci power state
  3962. * method of resetting doesn't work so we have another way
  3963. * using the doorbell register.
  3964. */
  3965. /* Exclude 640x boards. These are two pci devices in one slot
  3966. * which share a battery backed cache module. One controls the
  3967. * cache, the other accesses the cache through the one that controls
  3968. * it. If we reset the one controlling the cache, the other will
  3969. * likely not be happy. Just forbid resetting this conjoined mess.
  3970. */
  3971. cciss_lookup_board_id(pdev, &board_id);
  3972. if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
  3973. dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
  3974. "due to shared cache module.");
  3975. return -ENODEV;
  3976. }
  3977. /* Save the PCI command register */
  3978. pci_read_config_word(pdev, 4, &command_register);
  3979. /* Turn the board off. This is so that later pci_restore_state()
  3980. * won't turn the board on before the rest of config space is ready.
  3981. */
  3982. pci_disable_device(pdev);
  3983. pci_save_state(pdev);
  3984. /* find the first memory BAR, so we can find the cfg table */
  3985. rc = cciss_pci_find_memory_BAR(pdev, &paddr);
  3986. if (rc)
  3987. return rc;
  3988. vaddr = remap_pci_mem(paddr, 0x250);
  3989. if (!vaddr)
  3990. return -ENOMEM;
  3991. /* find cfgtable in order to check if reset via doorbell is supported */
  3992. rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3993. &cfg_base_addr_index, &cfg_offset);
  3994. if (rc)
  3995. goto unmap_vaddr;
  3996. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3997. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3998. if (!cfgtable) {
  3999. rc = -ENOMEM;
  4000. goto unmap_vaddr;
  4001. }
  4002. /* If reset via doorbell register is supported, use that. */
  4003. misc_fw_support = readl(&cfgtable->misc_fw_support);
  4004. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  4005. /* The doorbell reset seems to cause lockups on some Smart
  4006. * Arrays (e.g. P410, P410i, maybe others). Until this is
  4007. * fixed or at least isolated, avoid the doorbell reset.
  4008. */
  4009. use_doorbell = 0;
  4010. rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
  4011. if (rc)
  4012. goto unmap_cfgtable;
  4013. pci_restore_state(pdev);
  4014. rc = pci_enable_device(pdev);
  4015. if (rc) {
  4016. dev_warn(&pdev->dev, "failed to enable device.\n");
  4017. goto unmap_cfgtable;
  4018. }
  4019. pci_write_config_word(pdev, 4, command_register);
  4020. /* Some devices (notably the HP Smart Array 5i Controller)
  4021. need a little pause here */
  4022. msleep(CCISS_POST_RESET_PAUSE_MSECS);
  4023. /* Wait for board to become not ready, then ready. */
  4024. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  4025. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  4026. if (rc) /* Don't bail, might be E500, etc. which can't be reset */
  4027. dev_warn(&pdev->dev,
  4028. "failed waiting for board to become not ready\n");
  4029. rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
  4030. if (rc) {
  4031. dev_warn(&pdev->dev,
  4032. "failed waiting for board to become ready\n");
  4033. goto unmap_cfgtable;
  4034. }
  4035. dev_info(&pdev->dev, "board ready.\n");
  4036. /* Controller should be in simple mode at this point. If it's not,
  4037. * It means we're on one of those controllers which doesn't support
  4038. * the doorbell reset method and on which the PCI power management reset
  4039. * method doesn't work (P800, for example.)
  4040. * In those cases, don't try to proceed, as it generally doesn't work.
  4041. */
  4042. active_transport = readl(&cfgtable->TransportActive);
  4043. if (active_transport & PERFORMANT_MODE) {
  4044. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  4045. " Ignoring controller.\n");
  4046. rc = -ENODEV;
  4047. }
  4048. unmap_cfgtable:
  4049. iounmap(cfgtable);
  4050. unmap_vaddr:
  4051. iounmap(vaddr);
  4052. return rc;
  4053. }
  4054. static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
  4055. {
  4056. int rc, i;
  4057. if (!reset_devices)
  4058. return 0;
  4059. /* Reset the controller with a PCI power-cycle or via doorbell */
  4060. rc = cciss_kdump_hard_reset_controller(pdev);
  4061. /* -ENOTSUPP here means we cannot reset the controller
  4062. * but it's already (and still) up and running in
  4063. * "performant mode". Or, it might be 640x, which can't reset
  4064. * due to concerns about shared bbwc between 6402/6404 pair.
  4065. */
  4066. if (rc == -ENOTSUPP)
  4067. return 0; /* just try to do the kdump anyhow. */
  4068. if (rc)
  4069. return -ENODEV;
  4070. /* Now try to get the controller to respond to a no-op */
  4071. for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
  4072. if (cciss_noop(pdev) == 0)
  4073. break;
  4074. else
  4075. dev_warn(&pdev->dev, "no-op failed%s\n",
  4076. (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
  4077. "; re-trying" : ""));
  4078. msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
  4079. }
  4080. return 0;
  4081. }
  4082. /*
  4083. * This is it. Find all the controllers and register them. I really hate
  4084. * stealing all these major device numbers.
  4085. * returns the number of block devices registered.
  4086. */
  4087. static int __devinit cciss_init_one(struct pci_dev *pdev,
  4088. const struct pci_device_id *ent)
  4089. {
  4090. int i;
  4091. int j = 0;
  4092. int k = 0;
  4093. int rc;
  4094. int dac, return_code;
  4095. InquiryData_struct *inq_buff;
  4096. ctlr_info_t *h;
  4097. rc = cciss_init_reset_devices(pdev);
  4098. if (rc)
  4099. return rc;
  4100. i = alloc_cciss_hba(pdev);
  4101. if (i < 0)
  4102. return -1;
  4103. h = hba[i];
  4104. h->pdev = pdev;
  4105. h->busy_initializing = 1;
  4106. INIT_LIST_HEAD(&h->cmpQ);
  4107. INIT_LIST_HEAD(&h->reqQ);
  4108. mutex_init(&h->busy_shutting_down);
  4109. if (cciss_pci_init(h) != 0)
  4110. goto clean_no_release_regions;
  4111. sprintf(h->devname, "cciss%d", i);
  4112. h->ctlr = i;
  4113. init_completion(&h->scan_wait);
  4114. if (cciss_create_hba_sysfs_entry(h))
  4115. goto clean0;
  4116. /* configure PCI DMA stuff */
  4117. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4118. dac = 1;
  4119. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  4120. dac = 0;
  4121. else {
  4122. dev_err(&h->pdev->dev, "no suitable DMA available\n");
  4123. goto clean1;
  4124. }
  4125. /*
  4126. * register with the major number, or get a dynamic major number
  4127. * by passing 0 as argument. This is done for greater than
  4128. * 8 controller support.
  4129. */
  4130. if (i < MAX_CTLR_ORIG)
  4131. h->major = COMPAQ_CISS_MAJOR + i;
  4132. rc = register_blkdev(h->major, h->devname);
  4133. if (rc == -EBUSY || rc == -EINVAL) {
  4134. dev_err(&h->pdev->dev,
  4135. "Unable to get major number %d for %s "
  4136. "on hba %d\n", h->major, h->devname, i);
  4137. goto clean1;
  4138. } else {
  4139. if (i >= MAX_CTLR_ORIG)
  4140. h->major = rc;
  4141. }
  4142. /* make sure the board interrupts are off */
  4143. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4144. if (h->msi_vector || h->msix_vector) {
  4145. if (request_irq(h->intr[PERF_MODE_INT],
  4146. do_cciss_msix_intr,
  4147. IRQF_DISABLED, h->devname, h)) {
  4148. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4149. h->intr[PERF_MODE_INT], h->devname);
  4150. goto clean2;
  4151. }
  4152. } else {
  4153. if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
  4154. IRQF_DISABLED, h->devname, h)) {
  4155. dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
  4156. h->intr[PERF_MODE_INT], h->devname);
  4157. goto clean2;
  4158. }
  4159. }
  4160. dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  4161. h->devname, pdev->device, pci_name(pdev),
  4162. h->intr[PERF_MODE_INT], dac ? "" : " not");
  4163. h->cmd_pool_bits =
  4164. kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4165. * sizeof(unsigned long), GFP_KERNEL);
  4166. h->cmd_pool = (CommandList_struct *)
  4167. pci_alloc_consistent(h->pdev,
  4168. h->nr_cmds * sizeof(CommandList_struct),
  4169. &(h->cmd_pool_dhandle));
  4170. h->errinfo_pool = (ErrorInfo_struct *)
  4171. pci_alloc_consistent(h->pdev,
  4172. h->nr_cmds * sizeof(ErrorInfo_struct),
  4173. &(h->errinfo_pool_dhandle));
  4174. if ((h->cmd_pool_bits == NULL)
  4175. || (h->cmd_pool == NULL)
  4176. || (h->errinfo_pool == NULL)) {
  4177. dev_err(&h->pdev->dev, "out of memory");
  4178. goto clean4;
  4179. }
  4180. /* Need space for temp scatter list */
  4181. h->scatter_list = kmalloc(h->max_commands *
  4182. sizeof(struct scatterlist *),
  4183. GFP_KERNEL);
  4184. if (!h->scatter_list)
  4185. goto clean4;
  4186. for (k = 0; k < h->nr_cmds; k++) {
  4187. h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
  4188. h->maxsgentries,
  4189. GFP_KERNEL);
  4190. if (h->scatter_list[k] == NULL) {
  4191. dev_err(&h->pdev->dev,
  4192. "could not allocate s/g lists\n");
  4193. goto clean4;
  4194. }
  4195. }
  4196. h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
  4197. h->chainsize, h->nr_cmds);
  4198. if (!h->cmd_sg_list && h->chainsize > 0)
  4199. goto clean4;
  4200. spin_lock_init(&h->lock);
  4201. /* Initialize the pdev driver private data.
  4202. have it point to h. */
  4203. pci_set_drvdata(pdev, h);
  4204. /* command and error info recs zeroed out before
  4205. they are used */
  4206. memset(h->cmd_pool_bits, 0,
  4207. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
  4208. * sizeof(unsigned long));
  4209. h->num_luns = 0;
  4210. h->highest_lun = -1;
  4211. for (j = 0; j < CISS_MAX_LUN; j++) {
  4212. h->drv[j] = NULL;
  4213. h->gendisk[j] = NULL;
  4214. }
  4215. cciss_scsi_setup(h);
  4216. /* Turn the interrupts on so we can service requests */
  4217. h->access.set_intr_mask(h, CCISS_INTR_ON);
  4218. /* Get the firmware version */
  4219. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  4220. if (inq_buff == NULL) {
  4221. dev_err(&h->pdev->dev, "out of memory\n");
  4222. goto clean4;
  4223. }
  4224. return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
  4225. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  4226. if (return_code == IO_OK) {
  4227. h->firm_ver[0] = inq_buff->data_byte[32];
  4228. h->firm_ver[1] = inq_buff->data_byte[33];
  4229. h->firm_ver[2] = inq_buff->data_byte[34];
  4230. h->firm_ver[3] = inq_buff->data_byte[35];
  4231. } else { /* send command failed */
  4232. dev_warn(&h->pdev->dev, "unable to determine firmware"
  4233. " version of controller\n");
  4234. }
  4235. kfree(inq_buff);
  4236. cciss_procinit(h);
  4237. h->cciss_max_sectors = 8192;
  4238. rebuild_lun_table(h, 1, 0);
  4239. h->busy_initializing = 0;
  4240. return 1;
  4241. clean4:
  4242. kfree(h->cmd_pool_bits);
  4243. /* Free up sg elements */
  4244. for (k-- ; k >= 0; k--)
  4245. kfree(h->scatter_list[k]);
  4246. kfree(h->scatter_list);
  4247. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4248. if (h->cmd_pool)
  4249. pci_free_consistent(h->pdev,
  4250. h->nr_cmds * sizeof(CommandList_struct),
  4251. h->cmd_pool, h->cmd_pool_dhandle);
  4252. if (h->errinfo_pool)
  4253. pci_free_consistent(h->pdev,
  4254. h->nr_cmds * sizeof(ErrorInfo_struct),
  4255. h->errinfo_pool,
  4256. h->errinfo_pool_dhandle);
  4257. free_irq(h->intr[PERF_MODE_INT], h);
  4258. clean2:
  4259. unregister_blkdev(h->major, h->devname);
  4260. clean1:
  4261. cciss_destroy_hba_sysfs_entry(h);
  4262. clean0:
  4263. pci_release_regions(pdev);
  4264. clean_no_release_regions:
  4265. h->busy_initializing = 0;
  4266. /*
  4267. * Deliberately omit pci_disable_device(): it does something nasty to
  4268. * Smart Array controllers that pci_enable_device does not undo
  4269. */
  4270. pci_set_drvdata(pdev, NULL);
  4271. free_hba(h);
  4272. return -1;
  4273. }
  4274. static void cciss_shutdown(struct pci_dev *pdev)
  4275. {
  4276. ctlr_info_t *h;
  4277. char *flush_buf;
  4278. int return_code;
  4279. h = pci_get_drvdata(pdev);
  4280. flush_buf = kzalloc(4, GFP_KERNEL);
  4281. if (!flush_buf) {
  4282. dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
  4283. return;
  4284. }
  4285. /* write all data in the battery backed cache to disk */
  4286. memset(flush_buf, 0, 4);
  4287. return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
  4288. 4, 0, CTLR_LUNID, TYPE_CMD);
  4289. kfree(flush_buf);
  4290. if (return_code != IO_OK)
  4291. dev_warn(&h->pdev->dev, "Error flushing cache\n");
  4292. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  4293. free_irq(h->intr[PERF_MODE_INT], h);
  4294. }
  4295. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  4296. {
  4297. ctlr_info_t *h;
  4298. int i, j;
  4299. if (pci_get_drvdata(pdev) == NULL) {
  4300. dev_err(&pdev->dev, "Unable to remove device\n");
  4301. return;
  4302. }
  4303. h = pci_get_drvdata(pdev);
  4304. i = h->ctlr;
  4305. if (hba[i] == NULL) {
  4306. dev_err(&pdev->dev, "device appears to already be removed\n");
  4307. return;
  4308. }
  4309. mutex_lock(&h->busy_shutting_down);
  4310. remove_from_scan_list(h);
  4311. remove_proc_entry(h->devname, proc_cciss);
  4312. unregister_blkdev(h->major, h->devname);
  4313. /* remove it from the disk list */
  4314. for (j = 0; j < CISS_MAX_LUN; j++) {
  4315. struct gendisk *disk = h->gendisk[j];
  4316. if (disk) {
  4317. struct request_queue *q = disk->queue;
  4318. if (disk->flags & GENHD_FL_UP) {
  4319. cciss_destroy_ld_sysfs_entry(h, j, 1);
  4320. del_gendisk(disk);
  4321. }
  4322. if (q)
  4323. blk_cleanup_queue(q);
  4324. }
  4325. }
  4326. #ifdef CONFIG_CISS_SCSI_TAPE
  4327. cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
  4328. #endif
  4329. cciss_shutdown(pdev);
  4330. #ifdef CONFIG_PCI_MSI
  4331. if (h->msix_vector)
  4332. pci_disable_msix(h->pdev);
  4333. else if (h->msi_vector)
  4334. pci_disable_msi(h->pdev);
  4335. #endif /* CONFIG_PCI_MSI */
  4336. iounmap(h->transtable);
  4337. iounmap(h->cfgtable);
  4338. iounmap(h->vaddr);
  4339. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
  4340. h->cmd_pool, h->cmd_pool_dhandle);
  4341. pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
  4342. h->errinfo_pool, h->errinfo_pool_dhandle);
  4343. kfree(h->cmd_pool_bits);
  4344. /* Free up sg elements */
  4345. for (j = 0; j < h->nr_cmds; j++)
  4346. kfree(h->scatter_list[j]);
  4347. kfree(h->scatter_list);
  4348. cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
  4349. /*
  4350. * Deliberately omit pci_disable_device(): it does something nasty to
  4351. * Smart Array controllers that pci_enable_device does not undo
  4352. */
  4353. pci_release_regions(pdev);
  4354. pci_set_drvdata(pdev, NULL);
  4355. cciss_destroy_hba_sysfs_entry(h);
  4356. mutex_unlock(&h->busy_shutting_down);
  4357. free_hba(h);
  4358. }
  4359. static struct pci_driver cciss_pci_driver = {
  4360. .name = "cciss",
  4361. .probe = cciss_init_one,
  4362. .remove = __devexit_p(cciss_remove_one),
  4363. .id_table = cciss_pci_device_id, /* id_table */
  4364. .shutdown = cciss_shutdown,
  4365. };
  4366. /*
  4367. * This is it. Register the PCI driver information for the cards we control
  4368. * the OS will call our registered routines when it finds one of our cards.
  4369. */
  4370. static int __init cciss_init(void)
  4371. {
  4372. int err;
  4373. /*
  4374. * The hardware requires that commands are aligned on a 64-bit
  4375. * boundary. Given that we use pci_alloc_consistent() to allocate an
  4376. * array of them, the size must be a multiple of 8 bytes.
  4377. */
  4378. BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
  4379. printk(KERN_INFO DRIVER_NAME "\n");
  4380. err = bus_register(&cciss_bus_type);
  4381. if (err)
  4382. return err;
  4383. /* Start the scan thread */
  4384. cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
  4385. if (IS_ERR(cciss_scan_thread)) {
  4386. err = PTR_ERR(cciss_scan_thread);
  4387. goto err_bus_unregister;
  4388. }
  4389. /* Register for our PCI devices */
  4390. err = pci_register_driver(&cciss_pci_driver);
  4391. if (err)
  4392. goto err_thread_stop;
  4393. return err;
  4394. err_thread_stop:
  4395. kthread_stop(cciss_scan_thread);
  4396. err_bus_unregister:
  4397. bus_unregister(&cciss_bus_type);
  4398. return err;
  4399. }
  4400. static void __exit cciss_cleanup(void)
  4401. {
  4402. int i;
  4403. pci_unregister_driver(&cciss_pci_driver);
  4404. /* double check that all controller entrys have been removed */
  4405. for (i = 0; i < MAX_CTLR; i++) {
  4406. if (hba[i] != NULL) {
  4407. dev_warn(&hba[i]->pdev->dev,
  4408. "had to remove controller\n");
  4409. cciss_remove_one(hba[i]->pdev);
  4410. }
  4411. }
  4412. kthread_stop(cciss_scan_thread);
  4413. if (proc_cciss)
  4414. remove_proc_entry("driver/cciss", NULL);
  4415. bus_unregister(&cciss_bus_type);
  4416. }
  4417. module_init(cciss_init);
  4418. module_exit(cciss_cleanup);