aesni-intel_glue.c 38 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <asm/i387.h>
  30. #include <asm/aes.h>
  31. #include <crypto/scatterwalk.h>
  32. #include <crypto/internal/aead.h>
  33. #include <linux/workqueue.h>
  34. #include <linux/spinlock.h>
  35. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  36. #define HAS_CTR
  37. #endif
  38. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  39. #define HAS_LRW
  40. #endif
  41. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  42. #define HAS_PCBC
  43. #endif
  44. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  45. #define HAS_XTS
  46. #endif
  47. struct async_aes_ctx {
  48. struct cryptd_ablkcipher *cryptd_tfm;
  49. };
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16];
  56. struct crypto_aes_ctx aes_key_expanded;
  57. u8 nonce[4];
  58. struct cryptd_aead *cryptd_tfm;
  59. };
  60. struct aesni_gcm_set_hash_subkey_result {
  61. int err;
  62. struct completion completion;
  63. };
  64. struct aesni_hash_subkey_req_data {
  65. u8 iv[16];
  66. struct aesni_gcm_set_hash_subkey_result result;
  67. struct scatterlist sg;
  68. };
  69. #define AESNI_ALIGN (16)
  70. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  71. #define RFC4106_HASH_SUBKEY_SIZE 16
  72. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  73. unsigned int key_len);
  74. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in);
  76. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. #ifdef CONFIG_X86_64
  87. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. /* asmlinkage void aesni_gcm_enc()
  90. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  91. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  92. * const u8 *in, Plaintext input
  93. * unsigned long plaintext_len, Length of data in bytes for encryption.
  94. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  95. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  96. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  97. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  98. * const u8 *aad, Additional Authentication Data (AAD)
  99. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  100. * is going to be 8 or 12 bytes
  101. * u8 *auth_tag, Authenticated Tag output.
  102. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  103. * Valid values are 16 (most likely), 12 or 8.
  104. */
  105. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  106. const u8 *in, unsigned long plaintext_len, u8 *iv,
  107. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  108. u8 *auth_tag, unsigned long auth_tag_len);
  109. /* asmlinkage void aesni_gcm_dec()
  110. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  111. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  112. * const u8 *in, Ciphertext input
  113. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  114. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  115. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  116. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  117. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  118. * const u8 *aad, Additional Authentication Data (AAD)
  119. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  120. * to be 8 or 12 bytes
  121. * u8 *auth_tag, Authenticated Tag output.
  122. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  123. * Valid values are 16 (most likely), 12 or 8.
  124. */
  125. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  126. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  127. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  128. u8 *auth_tag, unsigned long auth_tag_len);
  129. static inline struct
  130. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  131. {
  132. return
  133. (struct aesni_rfc4106_gcm_ctx *)
  134. PTR_ALIGN((u8 *)
  135. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  136. }
  137. #endif
  138. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  139. {
  140. unsigned long addr = (unsigned long)raw_ctx;
  141. unsigned long align = AESNI_ALIGN;
  142. if (align <= crypto_tfm_ctx_alignment())
  143. align = 1;
  144. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  145. }
  146. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  147. const u8 *in_key, unsigned int key_len)
  148. {
  149. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  150. u32 *flags = &tfm->crt_flags;
  151. int err;
  152. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  153. key_len != AES_KEYSIZE_256) {
  154. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  155. return -EINVAL;
  156. }
  157. if (!irq_fpu_usable())
  158. err = crypto_aes_expand_key(ctx, in_key, key_len);
  159. else {
  160. kernel_fpu_begin();
  161. err = aesni_set_key(ctx, in_key, key_len);
  162. kernel_fpu_end();
  163. }
  164. return err;
  165. }
  166. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  167. unsigned int key_len)
  168. {
  169. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  170. }
  171. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  172. {
  173. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  174. if (!irq_fpu_usable())
  175. crypto_aes_encrypt_x86(ctx, dst, src);
  176. else {
  177. kernel_fpu_begin();
  178. aesni_enc(ctx, dst, src);
  179. kernel_fpu_end();
  180. }
  181. }
  182. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  183. {
  184. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  185. if (!irq_fpu_usable())
  186. crypto_aes_decrypt_x86(ctx, dst, src);
  187. else {
  188. kernel_fpu_begin();
  189. aesni_dec(ctx, dst, src);
  190. kernel_fpu_end();
  191. }
  192. }
  193. static struct crypto_alg aesni_alg = {
  194. .cra_name = "aes",
  195. .cra_driver_name = "aes-aesni",
  196. .cra_priority = 300,
  197. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  198. .cra_blocksize = AES_BLOCK_SIZE,
  199. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  200. .cra_alignmask = 0,
  201. .cra_module = THIS_MODULE,
  202. .cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
  203. .cra_u = {
  204. .cipher = {
  205. .cia_min_keysize = AES_MIN_KEY_SIZE,
  206. .cia_max_keysize = AES_MAX_KEY_SIZE,
  207. .cia_setkey = aes_set_key,
  208. .cia_encrypt = aes_encrypt,
  209. .cia_decrypt = aes_decrypt
  210. }
  211. }
  212. };
  213. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  214. {
  215. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  216. aesni_enc(ctx, dst, src);
  217. }
  218. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  219. {
  220. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  221. aesni_dec(ctx, dst, src);
  222. }
  223. static struct crypto_alg __aesni_alg = {
  224. .cra_name = "__aes-aesni",
  225. .cra_driver_name = "__driver-aes-aesni",
  226. .cra_priority = 0,
  227. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  228. .cra_blocksize = AES_BLOCK_SIZE,
  229. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  230. .cra_alignmask = 0,
  231. .cra_module = THIS_MODULE,
  232. .cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
  233. .cra_u = {
  234. .cipher = {
  235. .cia_min_keysize = AES_MIN_KEY_SIZE,
  236. .cia_max_keysize = AES_MAX_KEY_SIZE,
  237. .cia_setkey = aes_set_key,
  238. .cia_encrypt = __aes_encrypt,
  239. .cia_decrypt = __aes_decrypt
  240. }
  241. }
  242. };
  243. static int ecb_encrypt(struct blkcipher_desc *desc,
  244. struct scatterlist *dst, struct scatterlist *src,
  245. unsigned int nbytes)
  246. {
  247. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  248. struct blkcipher_walk walk;
  249. int err;
  250. blkcipher_walk_init(&walk, dst, src, nbytes);
  251. err = blkcipher_walk_virt(desc, &walk);
  252. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  253. kernel_fpu_begin();
  254. while ((nbytes = walk.nbytes)) {
  255. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  256. nbytes & AES_BLOCK_MASK);
  257. nbytes &= AES_BLOCK_SIZE - 1;
  258. err = blkcipher_walk_done(desc, &walk, nbytes);
  259. }
  260. kernel_fpu_end();
  261. return err;
  262. }
  263. static int ecb_decrypt(struct blkcipher_desc *desc,
  264. struct scatterlist *dst, struct scatterlist *src,
  265. unsigned int nbytes)
  266. {
  267. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  268. struct blkcipher_walk walk;
  269. int err;
  270. blkcipher_walk_init(&walk, dst, src, nbytes);
  271. err = blkcipher_walk_virt(desc, &walk);
  272. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  273. kernel_fpu_begin();
  274. while ((nbytes = walk.nbytes)) {
  275. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  276. nbytes & AES_BLOCK_MASK);
  277. nbytes &= AES_BLOCK_SIZE - 1;
  278. err = blkcipher_walk_done(desc, &walk, nbytes);
  279. }
  280. kernel_fpu_end();
  281. return err;
  282. }
  283. static struct crypto_alg blk_ecb_alg = {
  284. .cra_name = "__ecb-aes-aesni",
  285. .cra_driver_name = "__driver-ecb-aes-aesni",
  286. .cra_priority = 0,
  287. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  288. .cra_blocksize = AES_BLOCK_SIZE,
  289. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  290. .cra_alignmask = 0,
  291. .cra_type = &crypto_blkcipher_type,
  292. .cra_module = THIS_MODULE,
  293. .cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
  294. .cra_u = {
  295. .blkcipher = {
  296. .min_keysize = AES_MIN_KEY_SIZE,
  297. .max_keysize = AES_MAX_KEY_SIZE,
  298. .setkey = aes_set_key,
  299. .encrypt = ecb_encrypt,
  300. .decrypt = ecb_decrypt,
  301. },
  302. },
  303. };
  304. static int cbc_encrypt(struct blkcipher_desc *desc,
  305. struct scatterlist *dst, struct scatterlist *src,
  306. unsigned int nbytes)
  307. {
  308. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  309. struct blkcipher_walk walk;
  310. int err;
  311. blkcipher_walk_init(&walk, dst, src, nbytes);
  312. err = blkcipher_walk_virt(desc, &walk);
  313. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  314. kernel_fpu_begin();
  315. while ((nbytes = walk.nbytes)) {
  316. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  317. nbytes & AES_BLOCK_MASK, walk.iv);
  318. nbytes &= AES_BLOCK_SIZE - 1;
  319. err = blkcipher_walk_done(desc, &walk, nbytes);
  320. }
  321. kernel_fpu_end();
  322. return err;
  323. }
  324. static int cbc_decrypt(struct blkcipher_desc *desc,
  325. struct scatterlist *dst, struct scatterlist *src,
  326. unsigned int nbytes)
  327. {
  328. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  329. struct blkcipher_walk walk;
  330. int err;
  331. blkcipher_walk_init(&walk, dst, src, nbytes);
  332. err = blkcipher_walk_virt(desc, &walk);
  333. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  334. kernel_fpu_begin();
  335. while ((nbytes = walk.nbytes)) {
  336. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  337. nbytes & AES_BLOCK_MASK, walk.iv);
  338. nbytes &= AES_BLOCK_SIZE - 1;
  339. err = blkcipher_walk_done(desc, &walk, nbytes);
  340. }
  341. kernel_fpu_end();
  342. return err;
  343. }
  344. static struct crypto_alg blk_cbc_alg = {
  345. .cra_name = "__cbc-aes-aesni",
  346. .cra_driver_name = "__driver-cbc-aes-aesni",
  347. .cra_priority = 0,
  348. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  349. .cra_blocksize = AES_BLOCK_SIZE,
  350. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  351. .cra_alignmask = 0,
  352. .cra_type = &crypto_blkcipher_type,
  353. .cra_module = THIS_MODULE,
  354. .cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
  355. .cra_u = {
  356. .blkcipher = {
  357. .min_keysize = AES_MIN_KEY_SIZE,
  358. .max_keysize = AES_MAX_KEY_SIZE,
  359. .setkey = aes_set_key,
  360. .encrypt = cbc_encrypt,
  361. .decrypt = cbc_decrypt,
  362. },
  363. },
  364. };
  365. #ifdef CONFIG_X86_64
  366. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  367. struct blkcipher_walk *walk)
  368. {
  369. u8 *ctrblk = walk->iv;
  370. u8 keystream[AES_BLOCK_SIZE];
  371. u8 *src = walk->src.virt.addr;
  372. u8 *dst = walk->dst.virt.addr;
  373. unsigned int nbytes = walk->nbytes;
  374. aesni_enc(ctx, keystream, ctrblk);
  375. crypto_xor(keystream, src, nbytes);
  376. memcpy(dst, keystream, nbytes);
  377. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  378. }
  379. static int ctr_crypt(struct blkcipher_desc *desc,
  380. struct scatterlist *dst, struct scatterlist *src,
  381. unsigned int nbytes)
  382. {
  383. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  384. struct blkcipher_walk walk;
  385. int err;
  386. blkcipher_walk_init(&walk, dst, src, nbytes);
  387. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  388. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  389. kernel_fpu_begin();
  390. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  391. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  392. nbytes & AES_BLOCK_MASK, walk.iv);
  393. nbytes &= AES_BLOCK_SIZE - 1;
  394. err = blkcipher_walk_done(desc, &walk, nbytes);
  395. }
  396. if (walk.nbytes) {
  397. ctr_crypt_final(ctx, &walk);
  398. err = blkcipher_walk_done(desc, &walk, 0);
  399. }
  400. kernel_fpu_end();
  401. return err;
  402. }
  403. static struct crypto_alg blk_ctr_alg = {
  404. .cra_name = "__ctr-aes-aesni",
  405. .cra_driver_name = "__driver-ctr-aes-aesni",
  406. .cra_priority = 0,
  407. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  408. .cra_blocksize = 1,
  409. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  410. .cra_alignmask = 0,
  411. .cra_type = &crypto_blkcipher_type,
  412. .cra_module = THIS_MODULE,
  413. .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
  414. .cra_u = {
  415. .blkcipher = {
  416. .min_keysize = AES_MIN_KEY_SIZE,
  417. .max_keysize = AES_MAX_KEY_SIZE,
  418. .ivsize = AES_BLOCK_SIZE,
  419. .setkey = aes_set_key,
  420. .encrypt = ctr_crypt,
  421. .decrypt = ctr_crypt,
  422. },
  423. },
  424. };
  425. #endif
  426. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  427. unsigned int key_len)
  428. {
  429. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  430. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  431. int err;
  432. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  433. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  434. & CRYPTO_TFM_REQ_MASK);
  435. err = crypto_ablkcipher_setkey(child, key, key_len);
  436. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  437. & CRYPTO_TFM_RES_MASK);
  438. return err;
  439. }
  440. static int ablk_encrypt(struct ablkcipher_request *req)
  441. {
  442. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  443. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  444. if (!irq_fpu_usable()) {
  445. struct ablkcipher_request *cryptd_req =
  446. ablkcipher_request_ctx(req);
  447. memcpy(cryptd_req, req, sizeof(*req));
  448. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  449. return crypto_ablkcipher_encrypt(cryptd_req);
  450. } else {
  451. struct blkcipher_desc desc;
  452. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  453. desc.info = req->info;
  454. desc.flags = 0;
  455. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  456. &desc, req->dst, req->src, req->nbytes);
  457. }
  458. }
  459. static int ablk_decrypt(struct ablkcipher_request *req)
  460. {
  461. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  462. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  463. if (!irq_fpu_usable()) {
  464. struct ablkcipher_request *cryptd_req =
  465. ablkcipher_request_ctx(req);
  466. memcpy(cryptd_req, req, sizeof(*req));
  467. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  468. return crypto_ablkcipher_decrypt(cryptd_req);
  469. } else {
  470. struct blkcipher_desc desc;
  471. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  472. desc.info = req->info;
  473. desc.flags = 0;
  474. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  475. &desc, req->dst, req->src, req->nbytes);
  476. }
  477. }
  478. static void ablk_exit(struct crypto_tfm *tfm)
  479. {
  480. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  481. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  482. }
  483. static void ablk_init_common(struct crypto_tfm *tfm,
  484. struct cryptd_ablkcipher *cryptd_tfm)
  485. {
  486. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  487. ctx->cryptd_tfm = cryptd_tfm;
  488. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  489. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  490. }
  491. static int ablk_ecb_init(struct crypto_tfm *tfm)
  492. {
  493. struct cryptd_ablkcipher *cryptd_tfm;
  494. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
  495. if (IS_ERR(cryptd_tfm))
  496. return PTR_ERR(cryptd_tfm);
  497. ablk_init_common(tfm, cryptd_tfm);
  498. return 0;
  499. }
  500. static struct crypto_alg ablk_ecb_alg = {
  501. .cra_name = "ecb(aes)",
  502. .cra_driver_name = "ecb-aes-aesni",
  503. .cra_priority = 400,
  504. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  505. .cra_blocksize = AES_BLOCK_SIZE,
  506. .cra_ctxsize = sizeof(struct async_aes_ctx),
  507. .cra_alignmask = 0,
  508. .cra_type = &crypto_ablkcipher_type,
  509. .cra_module = THIS_MODULE,
  510. .cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
  511. .cra_init = ablk_ecb_init,
  512. .cra_exit = ablk_exit,
  513. .cra_u = {
  514. .ablkcipher = {
  515. .min_keysize = AES_MIN_KEY_SIZE,
  516. .max_keysize = AES_MAX_KEY_SIZE,
  517. .setkey = ablk_set_key,
  518. .encrypt = ablk_encrypt,
  519. .decrypt = ablk_decrypt,
  520. },
  521. },
  522. };
  523. static int ablk_cbc_init(struct crypto_tfm *tfm)
  524. {
  525. struct cryptd_ablkcipher *cryptd_tfm;
  526. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
  527. if (IS_ERR(cryptd_tfm))
  528. return PTR_ERR(cryptd_tfm);
  529. ablk_init_common(tfm, cryptd_tfm);
  530. return 0;
  531. }
  532. static struct crypto_alg ablk_cbc_alg = {
  533. .cra_name = "cbc(aes)",
  534. .cra_driver_name = "cbc-aes-aesni",
  535. .cra_priority = 400,
  536. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  537. .cra_blocksize = AES_BLOCK_SIZE,
  538. .cra_ctxsize = sizeof(struct async_aes_ctx),
  539. .cra_alignmask = 0,
  540. .cra_type = &crypto_ablkcipher_type,
  541. .cra_module = THIS_MODULE,
  542. .cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
  543. .cra_init = ablk_cbc_init,
  544. .cra_exit = ablk_exit,
  545. .cra_u = {
  546. .ablkcipher = {
  547. .min_keysize = AES_MIN_KEY_SIZE,
  548. .max_keysize = AES_MAX_KEY_SIZE,
  549. .ivsize = AES_BLOCK_SIZE,
  550. .setkey = ablk_set_key,
  551. .encrypt = ablk_encrypt,
  552. .decrypt = ablk_decrypt,
  553. },
  554. },
  555. };
  556. #ifdef CONFIG_X86_64
  557. static int ablk_ctr_init(struct crypto_tfm *tfm)
  558. {
  559. struct cryptd_ablkcipher *cryptd_tfm;
  560. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
  561. if (IS_ERR(cryptd_tfm))
  562. return PTR_ERR(cryptd_tfm);
  563. ablk_init_common(tfm, cryptd_tfm);
  564. return 0;
  565. }
  566. static struct crypto_alg ablk_ctr_alg = {
  567. .cra_name = "ctr(aes)",
  568. .cra_driver_name = "ctr-aes-aesni",
  569. .cra_priority = 400,
  570. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  571. .cra_blocksize = 1,
  572. .cra_ctxsize = sizeof(struct async_aes_ctx),
  573. .cra_alignmask = 0,
  574. .cra_type = &crypto_ablkcipher_type,
  575. .cra_module = THIS_MODULE,
  576. .cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
  577. .cra_init = ablk_ctr_init,
  578. .cra_exit = ablk_exit,
  579. .cra_u = {
  580. .ablkcipher = {
  581. .min_keysize = AES_MIN_KEY_SIZE,
  582. .max_keysize = AES_MAX_KEY_SIZE,
  583. .ivsize = AES_BLOCK_SIZE,
  584. .setkey = ablk_set_key,
  585. .encrypt = ablk_encrypt,
  586. .decrypt = ablk_encrypt,
  587. .geniv = "chainiv",
  588. },
  589. },
  590. };
  591. #ifdef HAS_CTR
  592. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  593. {
  594. struct cryptd_ablkcipher *cryptd_tfm;
  595. cryptd_tfm = cryptd_alloc_ablkcipher(
  596. "rfc3686(__driver-ctr-aes-aesni)", 0, 0);
  597. if (IS_ERR(cryptd_tfm))
  598. return PTR_ERR(cryptd_tfm);
  599. ablk_init_common(tfm, cryptd_tfm);
  600. return 0;
  601. }
  602. static struct crypto_alg ablk_rfc3686_ctr_alg = {
  603. .cra_name = "rfc3686(ctr(aes))",
  604. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  605. .cra_priority = 400,
  606. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  607. .cra_blocksize = 1,
  608. .cra_ctxsize = sizeof(struct async_aes_ctx),
  609. .cra_alignmask = 0,
  610. .cra_type = &crypto_ablkcipher_type,
  611. .cra_module = THIS_MODULE,
  612. .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
  613. .cra_init = ablk_rfc3686_ctr_init,
  614. .cra_exit = ablk_exit,
  615. .cra_u = {
  616. .ablkcipher = {
  617. .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  618. .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  619. .ivsize = CTR_RFC3686_IV_SIZE,
  620. .setkey = ablk_set_key,
  621. .encrypt = ablk_encrypt,
  622. .decrypt = ablk_decrypt,
  623. .geniv = "seqiv",
  624. },
  625. },
  626. };
  627. #endif
  628. #endif
  629. #ifdef HAS_LRW
  630. static int ablk_lrw_init(struct crypto_tfm *tfm)
  631. {
  632. struct cryptd_ablkcipher *cryptd_tfm;
  633. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
  634. 0, 0);
  635. if (IS_ERR(cryptd_tfm))
  636. return PTR_ERR(cryptd_tfm);
  637. ablk_init_common(tfm, cryptd_tfm);
  638. return 0;
  639. }
  640. static struct crypto_alg ablk_lrw_alg = {
  641. .cra_name = "lrw(aes)",
  642. .cra_driver_name = "lrw-aes-aesni",
  643. .cra_priority = 400,
  644. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  645. .cra_blocksize = AES_BLOCK_SIZE,
  646. .cra_ctxsize = sizeof(struct async_aes_ctx),
  647. .cra_alignmask = 0,
  648. .cra_type = &crypto_ablkcipher_type,
  649. .cra_module = THIS_MODULE,
  650. .cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
  651. .cra_init = ablk_lrw_init,
  652. .cra_exit = ablk_exit,
  653. .cra_u = {
  654. .ablkcipher = {
  655. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  656. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  657. .ivsize = AES_BLOCK_SIZE,
  658. .setkey = ablk_set_key,
  659. .encrypt = ablk_encrypt,
  660. .decrypt = ablk_decrypt,
  661. },
  662. },
  663. };
  664. #endif
  665. #ifdef HAS_PCBC
  666. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  667. {
  668. struct cryptd_ablkcipher *cryptd_tfm;
  669. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
  670. 0, 0);
  671. if (IS_ERR(cryptd_tfm))
  672. return PTR_ERR(cryptd_tfm);
  673. ablk_init_common(tfm, cryptd_tfm);
  674. return 0;
  675. }
  676. static struct crypto_alg ablk_pcbc_alg = {
  677. .cra_name = "pcbc(aes)",
  678. .cra_driver_name = "pcbc-aes-aesni",
  679. .cra_priority = 400,
  680. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  681. .cra_blocksize = AES_BLOCK_SIZE,
  682. .cra_ctxsize = sizeof(struct async_aes_ctx),
  683. .cra_alignmask = 0,
  684. .cra_type = &crypto_ablkcipher_type,
  685. .cra_module = THIS_MODULE,
  686. .cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
  687. .cra_init = ablk_pcbc_init,
  688. .cra_exit = ablk_exit,
  689. .cra_u = {
  690. .ablkcipher = {
  691. .min_keysize = AES_MIN_KEY_SIZE,
  692. .max_keysize = AES_MAX_KEY_SIZE,
  693. .ivsize = AES_BLOCK_SIZE,
  694. .setkey = ablk_set_key,
  695. .encrypt = ablk_encrypt,
  696. .decrypt = ablk_decrypt,
  697. },
  698. },
  699. };
  700. #endif
  701. #ifdef HAS_XTS
  702. static int ablk_xts_init(struct crypto_tfm *tfm)
  703. {
  704. struct cryptd_ablkcipher *cryptd_tfm;
  705. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
  706. 0, 0);
  707. if (IS_ERR(cryptd_tfm))
  708. return PTR_ERR(cryptd_tfm);
  709. ablk_init_common(tfm, cryptd_tfm);
  710. return 0;
  711. }
  712. static struct crypto_alg ablk_xts_alg = {
  713. .cra_name = "xts(aes)",
  714. .cra_driver_name = "xts-aes-aesni",
  715. .cra_priority = 400,
  716. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  717. .cra_blocksize = AES_BLOCK_SIZE,
  718. .cra_ctxsize = sizeof(struct async_aes_ctx),
  719. .cra_alignmask = 0,
  720. .cra_type = &crypto_ablkcipher_type,
  721. .cra_module = THIS_MODULE,
  722. .cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
  723. .cra_init = ablk_xts_init,
  724. .cra_exit = ablk_exit,
  725. .cra_u = {
  726. .ablkcipher = {
  727. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  728. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  729. .ivsize = AES_BLOCK_SIZE,
  730. .setkey = ablk_set_key,
  731. .encrypt = ablk_encrypt,
  732. .decrypt = ablk_decrypt,
  733. },
  734. },
  735. };
  736. #endif
  737. #ifdef CONFIG_X86_64
  738. static int rfc4106_init(struct crypto_tfm *tfm)
  739. {
  740. struct cryptd_aead *cryptd_tfm;
  741. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  742. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  743. struct crypto_aead *cryptd_child;
  744. struct aesni_rfc4106_gcm_ctx *child_ctx;
  745. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  746. if (IS_ERR(cryptd_tfm))
  747. return PTR_ERR(cryptd_tfm);
  748. cryptd_child = cryptd_aead_child(cryptd_tfm);
  749. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  750. memcpy(child_ctx, ctx, sizeof(*ctx));
  751. ctx->cryptd_tfm = cryptd_tfm;
  752. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  753. + crypto_aead_reqsize(&cryptd_tfm->base);
  754. return 0;
  755. }
  756. static void rfc4106_exit(struct crypto_tfm *tfm)
  757. {
  758. struct aesni_rfc4106_gcm_ctx *ctx =
  759. (struct aesni_rfc4106_gcm_ctx *)
  760. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  761. if (!IS_ERR(ctx->cryptd_tfm))
  762. cryptd_free_aead(ctx->cryptd_tfm);
  763. return;
  764. }
  765. static void
  766. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  767. {
  768. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  769. if (err == -EINPROGRESS)
  770. return;
  771. result->err = err;
  772. complete(&result->completion);
  773. }
  774. static int
  775. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  776. {
  777. struct crypto_ablkcipher *ctr_tfm;
  778. struct ablkcipher_request *req;
  779. int ret = -EINVAL;
  780. struct aesni_hash_subkey_req_data *req_data;
  781. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  782. if (IS_ERR(ctr_tfm))
  783. return PTR_ERR(ctr_tfm);
  784. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  785. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  786. if (ret)
  787. goto out_free_ablkcipher;
  788. ret = -ENOMEM;
  789. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  790. if (!req)
  791. goto out_free_ablkcipher;
  792. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  793. if (!req_data)
  794. goto out_free_request;
  795. memset(req_data->iv, 0, sizeof(req_data->iv));
  796. /* Clear the data in the hash sub key container to zero.*/
  797. /* We want to cipher all zeros to create the hash sub key. */
  798. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  799. init_completion(&req_data->result.completion);
  800. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  801. ablkcipher_request_set_tfm(req, ctr_tfm);
  802. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  803. CRYPTO_TFM_REQ_MAY_BACKLOG,
  804. rfc4106_set_hash_subkey_done,
  805. &req_data->result);
  806. ablkcipher_request_set_crypt(req, &req_data->sg,
  807. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  808. ret = crypto_ablkcipher_encrypt(req);
  809. if (ret == -EINPROGRESS || ret == -EBUSY) {
  810. ret = wait_for_completion_interruptible
  811. (&req_data->result.completion);
  812. if (!ret)
  813. ret = req_data->result.err;
  814. }
  815. kfree(req_data);
  816. out_free_request:
  817. ablkcipher_request_free(req);
  818. out_free_ablkcipher:
  819. crypto_free_ablkcipher(ctr_tfm);
  820. return ret;
  821. }
  822. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  823. unsigned int key_len)
  824. {
  825. int ret = 0;
  826. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  827. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  828. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  829. struct aesni_rfc4106_gcm_ctx *child_ctx =
  830. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  831. u8 *new_key_mem = NULL;
  832. if (key_len < 4) {
  833. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  834. return -EINVAL;
  835. }
  836. /*Account for 4 byte nonce at the end.*/
  837. key_len -= 4;
  838. if (key_len != AES_KEYSIZE_128) {
  839. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  840. return -EINVAL;
  841. }
  842. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  843. /*This must be on a 16 byte boundary!*/
  844. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  845. return -EINVAL;
  846. if ((unsigned long)key % AESNI_ALIGN) {
  847. /*key is not aligned: use an auxuliar aligned pointer*/
  848. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  849. if (!new_key_mem)
  850. return -ENOMEM;
  851. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  852. memcpy(new_key_mem, key, key_len);
  853. key = new_key_mem;
  854. }
  855. if (!irq_fpu_usable())
  856. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  857. key, key_len);
  858. else {
  859. kernel_fpu_begin();
  860. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  861. kernel_fpu_end();
  862. }
  863. /*This must be on a 16 byte boundary!*/
  864. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  865. ret = -EINVAL;
  866. goto exit;
  867. }
  868. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  869. memcpy(child_ctx, ctx, sizeof(*ctx));
  870. exit:
  871. kfree(new_key_mem);
  872. return ret;
  873. }
  874. /* This is the Integrity Check Value (aka the authentication tag length and can
  875. * be 8, 12 or 16 bytes long. */
  876. static int rfc4106_set_authsize(struct crypto_aead *parent,
  877. unsigned int authsize)
  878. {
  879. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  880. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  881. switch (authsize) {
  882. case 8:
  883. case 12:
  884. case 16:
  885. break;
  886. default:
  887. return -EINVAL;
  888. }
  889. crypto_aead_crt(parent)->authsize = authsize;
  890. crypto_aead_crt(cryptd_child)->authsize = authsize;
  891. return 0;
  892. }
  893. static int rfc4106_encrypt(struct aead_request *req)
  894. {
  895. int ret;
  896. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  897. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  898. if (!irq_fpu_usable()) {
  899. struct aead_request *cryptd_req =
  900. (struct aead_request *) aead_request_ctx(req);
  901. memcpy(cryptd_req, req, sizeof(*req));
  902. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  903. return crypto_aead_encrypt(cryptd_req);
  904. } else {
  905. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  906. kernel_fpu_begin();
  907. ret = cryptd_child->base.crt_aead.encrypt(req);
  908. kernel_fpu_end();
  909. return ret;
  910. }
  911. }
  912. static int rfc4106_decrypt(struct aead_request *req)
  913. {
  914. int ret;
  915. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  916. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  917. if (!irq_fpu_usable()) {
  918. struct aead_request *cryptd_req =
  919. (struct aead_request *) aead_request_ctx(req);
  920. memcpy(cryptd_req, req, sizeof(*req));
  921. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  922. return crypto_aead_decrypt(cryptd_req);
  923. } else {
  924. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  925. kernel_fpu_begin();
  926. ret = cryptd_child->base.crt_aead.decrypt(req);
  927. kernel_fpu_end();
  928. return ret;
  929. }
  930. }
  931. static struct crypto_alg rfc4106_alg = {
  932. .cra_name = "rfc4106(gcm(aes))",
  933. .cra_driver_name = "rfc4106-gcm-aesni",
  934. .cra_priority = 400,
  935. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  936. .cra_blocksize = 1,
  937. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  938. .cra_alignmask = 0,
  939. .cra_type = &crypto_nivaead_type,
  940. .cra_module = THIS_MODULE,
  941. .cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),
  942. .cra_init = rfc4106_init,
  943. .cra_exit = rfc4106_exit,
  944. .cra_u = {
  945. .aead = {
  946. .setkey = rfc4106_set_key,
  947. .setauthsize = rfc4106_set_authsize,
  948. .encrypt = rfc4106_encrypt,
  949. .decrypt = rfc4106_decrypt,
  950. .geniv = "seqiv",
  951. .ivsize = 8,
  952. .maxauthsize = 16,
  953. },
  954. },
  955. };
  956. static int __driver_rfc4106_encrypt(struct aead_request *req)
  957. {
  958. u8 one_entry_in_sg = 0;
  959. u8 *src, *dst, *assoc;
  960. __be32 counter = cpu_to_be32(1);
  961. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  962. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  963. void *aes_ctx = &(ctx->aes_key_expanded);
  964. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  965. u8 iv_tab[16+AESNI_ALIGN];
  966. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  967. struct scatter_walk src_sg_walk;
  968. struct scatter_walk assoc_sg_walk;
  969. struct scatter_walk dst_sg_walk;
  970. unsigned int i;
  971. /* Assuming we are supporting rfc4106 64-bit extended */
  972. /* sequence numbers We need to have the AAD length equal */
  973. /* to 8 or 12 bytes */
  974. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  975. return -EINVAL;
  976. /* IV below built */
  977. for (i = 0; i < 4; i++)
  978. *(iv+i) = ctx->nonce[i];
  979. for (i = 0; i < 8; i++)
  980. *(iv+4+i) = req->iv[i];
  981. *((__be32 *)(iv+12)) = counter;
  982. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  983. one_entry_in_sg = 1;
  984. scatterwalk_start(&src_sg_walk, req->src);
  985. scatterwalk_start(&assoc_sg_walk, req->assoc);
  986. src = scatterwalk_map(&src_sg_walk, 0);
  987. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  988. dst = src;
  989. if (unlikely(req->src != req->dst)) {
  990. scatterwalk_start(&dst_sg_walk, req->dst);
  991. dst = scatterwalk_map(&dst_sg_walk, 0);
  992. }
  993. } else {
  994. /* Allocate memory for src, dst, assoc */
  995. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  996. GFP_ATOMIC);
  997. if (unlikely(!src))
  998. return -ENOMEM;
  999. assoc = (src + req->cryptlen + auth_tag_len);
  1000. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1001. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1002. req->assoclen, 0);
  1003. dst = src;
  1004. }
  1005. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  1006. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  1007. + ((unsigned long)req->cryptlen), auth_tag_len);
  1008. /* The authTag (aka the Integrity Check Value) needs to be written
  1009. * back to the packet. */
  1010. if (one_entry_in_sg) {
  1011. if (unlikely(req->src != req->dst)) {
  1012. scatterwalk_unmap(dst, 0);
  1013. scatterwalk_done(&dst_sg_walk, 0, 0);
  1014. }
  1015. scatterwalk_unmap(src, 0);
  1016. scatterwalk_unmap(assoc, 0);
  1017. scatterwalk_done(&src_sg_walk, 0, 0);
  1018. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1019. } else {
  1020. scatterwalk_map_and_copy(dst, req->dst, 0,
  1021. req->cryptlen + auth_tag_len, 1);
  1022. kfree(src);
  1023. }
  1024. return 0;
  1025. }
  1026. static int __driver_rfc4106_decrypt(struct aead_request *req)
  1027. {
  1028. u8 one_entry_in_sg = 0;
  1029. u8 *src, *dst, *assoc;
  1030. unsigned long tempCipherLen = 0;
  1031. __be32 counter = cpu_to_be32(1);
  1032. int retval = 0;
  1033. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1034. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  1035. void *aes_ctx = &(ctx->aes_key_expanded);
  1036. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  1037. u8 iv_and_authTag[32+AESNI_ALIGN];
  1038. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  1039. u8 *authTag = iv + 16;
  1040. struct scatter_walk src_sg_walk;
  1041. struct scatter_walk assoc_sg_walk;
  1042. struct scatter_walk dst_sg_walk;
  1043. unsigned int i;
  1044. if (unlikely((req->cryptlen < auth_tag_len) ||
  1045. (req->assoclen != 8 && req->assoclen != 12)))
  1046. return -EINVAL;
  1047. /* Assuming we are supporting rfc4106 64-bit extended */
  1048. /* sequence numbers We need to have the AAD length */
  1049. /* equal to 8 or 12 bytes */
  1050. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  1051. /* IV below built */
  1052. for (i = 0; i < 4; i++)
  1053. *(iv+i) = ctx->nonce[i];
  1054. for (i = 0; i < 8; i++)
  1055. *(iv+4+i) = req->iv[i];
  1056. *((__be32 *)(iv+12)) = counter;
  1057. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  1058. one_entry_in_sg = 1;
  1059. scatterwalk_start(&src_sg_walk, req->src);
  1060. scatterwalk_start(&assoc_sg_walk, req->assoc);
  1061. src = scatterwalk_map(&src_sg_walk, 0);
  1062. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  1063. dst = src;
  1064. if (unlikely(req->src != req->dst)) {
  1065. scatterwalk_start(&dst_sg_walk, req->dst);
  1066. dst = scatterwalk_map(&dst_sg_walk, 0);
  1067. }
  1068. } else {
  1069. /* Allocate memory for src, dst, assoc */
  1070. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  1071. if (!src)
  1072. return -ENOMEM;
  1073. assoc = (src + req->cryptlen + auth_tag_len);
  1074. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1075. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1076. req->assoclen, 0);
  1077. dst = src;
  1078. }
  1079. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  1080. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  1081. authTag, auth_tag_len);
  1082. /* Compare generated tag with passed in tag. */
  1083. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  1084. -EBADMSG : 0;
  1085. if (one_entry_in_sg) {
  1086. if (unlikely(req->src != req->dst)) {
  1087. scatterwalk_unmap(dst, 0);
  1088. scatterwalk_done(&dst_sg_walk, 0, 0);
  1089. }
  1090. scatterwalk_unmap(src, 0);
  1091. scatterwalk_unmap(assoc, 0);
  1092. scatterwalk_done(&src_sg_walk, 0, 0);
  1093. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1094. } else {
  1095. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1096. kfree(src);
  1097. }
  1098. return retval;
  1099. }
  1100. static struct crypto_alg __rfc4106_alg = {
  1101. .cra_name = "__gcm-aes-aesni",
  1102. .cra_driver_name = "__driver-gcm-aes-aesni",
  1103. .cra_priority = 0,
  1104. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1105. .cra_blocksize = 1,
  1106. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  1107. .cra_alignmask = 0,
  1108. .cra_type = &crypto_aead_type,
  1109. .cra_module = THIS_MODULE,
  1110. .cra_list = LIST_HEAD_INIT(__rfc4106_alg.cra_list),
  1111. .cra_u = {
  1112. .aead = {
  1113. .encrypt = __driver_rfc4106_encrypt,
  1114. .decrypt = __driver_rfc4106_decrypt,
  1115. },
  1116. },
  1117. };
  1118. #endif
  1119. static int __init aesni_init(void)
  1120. {
  1121. int err;
  1122. if (!cpu_has_aes) {
  1123. printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
  1124. return -ENODEV;
  1125. }
  1126. if ((err = crypto_register_alg(&aesni_alg)))
  1127. goto aes_err;
  1128. if ((err = crypto_register_alg(&__aesni_alg)))
  1129. goto __aes_err;
  1130. if ((err = crypto_register_alg(&blk_ecb_alg)))
  1131. goto blk_ecb_err;
  1132. if ((err = crypto_register_alg(&blk_cbc_alg)))
  1133. goto blk_cbc_err;
  1134. if ((err = crypto_register_alg(&ablk_ecb_alg)))
  1135. goto ablk_ecb_err;
  1136. if ((err = crypto_register_alg(&ablk_cbc_alg)))
  1137. goto ablk_cbc_err;
  1138. #ifdef CONFIG_X86_64
  1139. if ((err = crypto_register_alg(&blk_ctr_alg)))
  1140. goto blk_ctr_err;
  1141. if ((err = crypto_register_alg(&ablk_ctr_alg)))
  1142. goto ablk_ctr_err;
  1143. if ((err = crypto_register_alg(&__rfc4106_alg)))
  1144. goto __aead_gcm_err;
  1145. if ((err = crypto_register_alg(&rfc4106_alg)))
  1146. goto aead_gcm_err;
  1147. #ifdef HAS_CTR
  1148. if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
  1149. goto ablk_rfc3686_ctr_err;
  1150. #endif
  1151. #endif
  1152. #ifdef HAS_LRW
  1153. if ((err = crypto_register_alg(&ablk_lrw_alg)))
  1154. goto ablk_lrw_err;
  1155. #endif
  1156. #ifdef HAS_PCBC
  1157. if ((err = crypto_register_alg(&ablk_pcbc_alg)))
  1158. goto ablk_pcbc_err;
  1159. #endif
  1160. #ifdef HAS_XTS
  1161. if ((err = crypto_register_alg(&ablk_xts_alg)))
  1162. goto ablk_xts_err;
  1163. #endif
  1164. return err;
  1165. #ifdef HAS_XTS
  1166. ablk_xts_err:
  1167. #endif
  1168. #ifdef HAS_PCBC
  1169. crypto_unregister_alg(&ablk_pcbc_alg);
  1170. ablk_pcbc_err:
  1171. #endif
  1172. #ifdef HAS_LRW
  1173. crypto_unregister_alg(&ablk_lrw_alg);
  1174. ablk_lrw_err:
  1175. #endif
  1176. #ifdef CONFIG_X86_64
  1177. #ifdef HAS_CTR
  1178. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1179. ablk_rfc3686_ctr_err:
  1180. #endif
  1181. crypto_unregister_alg(&rfc4106_alg);
  1182. aead_gcm_err:
  1183. crypto_unregister_alg(&__rfc4106_alg);
  1184. __aead_gcm_err:
  1185. crypto_unregister_alg(&ablk_ctr_alg);
  1186. ablk_ctr_err:
  1187. crypto_unregister_alg(&blk_ctr_alg);
  1188. blk_ctr_err:
  1189. #endif
  1190. crypto_unregister_alg(&ablk_cbc_alg);
  1191. ablk_cbc_err:
  1192. crypto_unregister_alg(&ablk_ecb_alg);
  1193. ablk_ecb_err:
  1194. crypto_unregister_alg(&blk_cbc_alg);
  1195. blk_cbc_err:
  1196. crypto_unregister_alg(&blk_ecb_alg);
  1197. blk_ecb_err:
  1198. crypto_unregister_alg(&__aesni_alg);
  1199. __aes_err:
  1200. crypto_unregister_alg(&aesni_alg);
  1201. aes_err:
  1202. return err;
  1203. }
  1204. static void __exit aesni_exit(void)
  1205. {
  1206. #ifdef HAS_XTS
  1207. crypto_unregister_alg(&ablk_xts_alg);
  1208. #endif
  1209. #ifdef HAS_PCBC
  1210. crypto_unregister_alg(&ablk_pcbc_alg);
  1211. #endif
  1212. #ifdef HAS_LRW
  1213. crypto_unregister_alg(&ablk_lrw_alg);
  1214. #endif
  1215. #ifdef CONFIG_X86_64
  1216. #ifdef HAS_CTR
  1217. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1218. #endif
  1219. crypto_unregister_alg(&rfc4106_alg);
  1220. crypto_unregister_alg(&__rfc4106_alg);
  1221. crypto_unregister_alg(&ablk_ctr_alg);
  1222. crypto_unregister_alg(&blk_ctr_alg);
  1223. #endif
  1224. crypto_unregister_alg(&ablk_cbc_alg);
  1225. crypto_unregister_alg(&ablk_ecb_alg);
  1226. crypto_unregister_alg(&blk_cbc_alg);
  1227. crypto_unregister_alg(&blk_ecb_alg);
  1228. crypto_unregister_alg(&__aesni_alg);
  1229. crypto_unregister_alg(&aesni_alg);
  1230. }
  1231. module_init(aesni_init);
  1232. module_exit(aesni_exit);
  1233. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1234. MODULE_LICENSE("GPL");
  1235. MODULE_ALIAS("aes");