pgtable.h 4.1 KB

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  1. /*
  2. * This file contains the functions and defines necessary to modify and
  3. * use the SuperH page table tree.
  4. *
  5. * Copyright (C) 1999 Niibe Yutaka
  6. * Copyright (C) 2002 - 2007 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General
  9. * Public License. See the file "COPYING" in the main directory of this
  10. * archive for more details.
  11. */
  12. #ifndef __ASM_SH_PGTABLE_H
  13. #define __ASM_SH_PGTABLE_H
  14. #ifdef CONFIG_X2TLB
  15. #include <asm/pgtable-3level.h>
  16. #else
  17. #include <asm/pgtable-2level.h>
  18. #endif
  19. #include <asm/page.h>
  20. #ifndef __ASSEMBLY__
  21. #include <asm/addrspace.h>
  22. #include <asm/fixmap.h>
  23. /*
  24. * ZERO_PAGE is a global shared page that is always zero: used
  25. * for zero-mapped memory areas etc..
  26. */
  27. extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  28. #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  29. #endif /* !__ASSEMBLY__ */
  30. /*
  31. * Effective and physical address definitions, to aid with sign
  32. * extension.
  33. */
  34. #define NEFF 32
  35. #define NEFF_SIGN (1LL << (NEFF - 1))
  36. #define NEFF_MASK (-1LL << NEFF)
  37. static inline unsigned long long neff_sign_extend(unsigned long val)
  38. {
  39. unsigned long long extended = val;
  40. return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
  41. }
  42. #ifdef CONFIG_29BIT
  43. #define NPHYS 29
  44. #else
  45. #define NPHYS 32
  46. #endif
  47. #define NPHYS_SIGN (1LL << (NPHYS - 1))
  48. #define NPHYS_MASK (-1LL << NPHYS)
  49. #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
  50. #define PGDIR_MASK (~(PGDIR_SIZE-1))
  51. /* Entries per level */
  52. #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
  53. #define FIRST_USER_ADDRESS 0
  54. #define PHYS_ADDR_MASK29 0x1fffffff
  55. #define PHYS_ADDR_MASK32 0xffffffff
  56. static inline unsigned long phys_addr_mask(void)
  57. {
  58. /* Is the MMU in 29bit mode? */
  59. if (__in_29bit_mode())
  60. return PHYS_ADDR_MASK29;
  61. return PHYS_ADDR_MASK32;
  62. }
  63. #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
  64. #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
  65. #ifdef CONFIG_SUPERH32
  66. #define VMALLOC_START (P3SEG)
  67. #else
  68. #define VMALLOC_START (0xf0000000)
  69. #endif
  70. #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
  71. #if defined(CONFIG_SUPERH32)
  72. #include <asm/pgtable_32.h>
  73. #else
  74. #include <asm/pgtable_64.h>
  75. #endif
  76. /*
  77. * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
  78. * protection for execute, and considers it the same as a read. Also, write
  79. * permission implies read permission. This is the closest we can get..
  80. *
  81. * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
  82. * not only supporting separate execute, read, and write bits, but having
  83. * completely separate permission bits for user and kernel space.
  84. */
  85. /*xwr*/
  86. #define __P000 PAGE_NONE
  87. #define __P001 PAGE_READONLY
  88. #define __P010 PAGE_COPY
  89. #define __P011 PAGE_COPY
  90. #define __P100 PAGE_EXECREAD
  91. #define __P101 PAGE_EXECREAD
  92. #define __P110 PAGE_COPY
  93. #define __P111 PAGE_COPY
  94. #define __S000 PAGE_NONE
  95. #define __S001 PAGE_READONLY
  96. #define __S010 PAGE_WRITEONLY
  97. #define __S011 PAGE_SHARED
  98. #define __S100 PAGE_EXECREAD
  99. #define __S101 PAGE_EXECREAD
  100. #define __S110 PAGE_RWX
  101. #define __S111 PAGE_RWX
  102. typedef pte_t *pte_addr_t;
  103. #define kern_addr_valid(addr) (1)
  104. #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
  105. remap_pfn_range(vma, vaddr, pfn, size, prot)
  106. #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
  107. /*
  108. * Initialise the page table caches
  109. */
  110. extern void pgtable_cache_init(void);
  111. struct vm_area_struct;
  112. struct mm_struct;
  113. extern void __update_cache(struct vm_area_struct *vma,
  114. unsigned long address, pte_t pte);
  115. extern void __update_tlb(struct vm_area_struct *vma,
  116. unsigned long address, pte_t pte);
  117. static inline void
  118. update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
  119. {
  120. pte_t pte = *ptep;
  121. __update_cache(vma, address, pte);
  122. __update_tlb(vma, address, pte);
  123. }
  124. extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  125. extern void paging_init(void);
  126. extern void page_table_range_init(unsigned long start, unsigned long end,
  127. pgd_t *pgd);
  128. /* arch/sh/mm/mmap.c */
  129. #define HAVE_ARCH_UNMAPPED_AREA
  130. #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
  131. #define __HAVE_ARCH_PTE_SPECIAL
  132. #include <asm-generic/pgtable.h>
  133. #endif /* __ASM_SH_PGTABLE_H */