setup.c 31 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mmc/host.h>
  14. #include <linux/mmc/sh_mmcif.h>
  15. #include <linux/mmc/sh_mobile_sdhi.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/tsc2007.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/sh_msiof.h>
  26. #include <linux/spi/mmc_spi.h>
  27. #include <linux/input.h>
  28. #include <linux/input/sh_keysc.h>
  29. #include <video/sh_mobile_lcdc.h>
  30. #include <sound/sh_fsi.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <media/tw9910.h>
  33. #include <media/mt9t112.h>
  34. #include <asm/heartbeat.h>
  35. #include <asm/sh_eth.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. /*
  40. * Address Interface BusWidth
  41. *-----------------------------------------
  42. * 0x0000_0000 uboot 16bit
  43. * 0x0004_0000 Linux romImage 16bit
  44. * 0x0014_0000 MTD for Linux 16bit
  45. * 0x0400_0000 Internal I/O 16/32bit
  46. * 0x0800_0000 DRAM 32bit
  47. * 0x1800_0000 MFI 16bit
  48. */
  49. /* SWITCH
  50. *------------------------------
  51. * DS2[1] = FlashROM write protect ON : write protect
  52. * OFF : No write protect
  53. * DS2[2] = RMII / TS, SCIF ON : RMII
  54. * OFF : TS, SCIF3
  55. * DS2[3] = Camera / Video ON : Camera
  56. * OFF : NTSC/PAL (IN)
  57. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  58. * OFF : SH7724 DV_CLK
  59. * DS2[6-7] = MMC / SD ON-OFF : SD
  60. * OFF-ON : MMC
  61. */
  62. /* Heartbeat */
  63. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  64. static struct heartbeat_data heartbeat_data = {
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resource = {
  69. .start = 0xA405012C, /* PTG */
  70. .end = 0xA405012E - 1,
  71. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  72. };
  73. static struct platform_device heartbeat_device = {
  74. .name = "heartbeat",
  75. .id = -1,
  76. .dev = {
  77. .platform_data = &heartbeat_data,
  78. },
  79. .num_resources = 1,
  80. .resource = &heartbeat_resource,
  81. };
  82. /* MTD */
  83. static struct mtd_partition nor_flash_partitions[] = {
  84. {
  85. .name = "boot loader",
  86. .offset = 0,
  87. .size = (5 * 1024 * 1024),
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. }, {
  90. .name = "free-area",
  91. .offset = MTDPART_OFS_APPEND,
  92. .size = MTDPART_SIZ_FULL,
  93. },
  94. };
  95. static struct physmap_flash_data nor_flash_data = {
  96. .width = 2,
  97. .parts = nor_flash_partitions,
  98. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  99. };
  100. static struct resource nor_flash_resources[] = {
  101. [0] = {
  102. .name = "NOR Flash",
  103. .start = 0x00000000,
  104. .end = 0x03ffffff,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. static struct platform_device nor_flash_device = {
  109. .name = "physmap-flash",
  110. .resource = nor_flash_resources,
  111. .num_resources = ARRAY_SIZE(nor_flash_resources),
  112. .dev = {
  113. .platform_data = &nor_flash_data,
  114. },
  115. };
  116. /* SH Eth */
  117. #define SH_ETH_ADDR (0xA4600000)
  118. static struct resource sh_eth_resources[] = {
  119. [0] = {
  120. .start = SH_ETH_ADDR,
  121. .end = SH_ETH_ADDR + 0x1FC,
  122. .flags = IORESOURCE_MEM,
  123. },
  124. [1] = {
  125. .start = 91,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. static struct sh_eth_plat_data sh_eth_plat = {
  130. .phy = 0x1f, /* SMSC LAN8700 */
  131. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  132. .register_type = SH_ETH_REG_FAST_SH4,
  133. .phy_interface = PHY_INTERFACE_MODE_MII,
  134. .ether_link_active_low = 1
  135. };
  136. static struct platform_device sh_eth_device = {
  137. .name = "sh-eth",
  138. .id = 0,
  139. .dev = {
  140. .platform_data = &sh_eth_plat,
  141. },
  142. .num_resources = ARRAY_SIZE(sh_eth_resources),
  143. .resource = sh_eth_resources,
  144. .archdata = {
  145. .hwblk_id = HWBLK_ETHER,
  146. },
  147. };
  148. /* USB0 host */
  149. static void usb0_port_power(int port, int power)
  150. {
  151. gpio_set_value(GPIO_PTB4, power);
  152. }
  153. static struct r8a66597_platdata usb0_host_data = {
  154. .on_chip = 1,
  155. .port_power = usb0_port_power,
  156. };
  157. static struct resource usb0_host_resources[] = {
  158. [0] = {
  159. .start = 0xa4d80000,
  160. .end = 0xa4d80124 - 1,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. [1] = {
  164. .start = 65,
  165. .end = 65,
  166. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  167. },
  168. };
  169. static struct platform_device usb0_host_device = {
  170. .name = "r8a66597_hcd",
  171. .id = 0,
  172. .dev = {
  173. .dma_mask = NULL, /* not use dma */
  174. .coherent_dma_mask = 0xffffffff,
  175. .platform_data = &usb0_host_data,
  176. },
  177. .num_resources = ARRAY_SIZE(usb0_host_resources),
  178. .resource = usb0_host_resources,
  179. };
  180. /* USB1 host/function */
  181. static void usb1_port_power(int port, int power)
  182. {
  183. gpio_set_value(GPIO_PTB5, power);
  184. }
  185. static struct r8a66597_platdata usb1_common_data = {
  186. .on_chip = 1,
  187. .port_power = usb1_port_power,
  188. };
  189. static struct resource usb1_common_resources[] = {
  190. [0] = {
  191. .start = 0xa4d90000,
  192. .end = 0xa4d90124 - 1,
  193. .flags = IORESOURCE_MEM,
  194. },
  195. [1] = {
  196. .start = 66,
  197. .end = 66,
  198. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  199. },
  200. };
  201. static struct platform_device usb1_common_device = {
  202. /* .name will be added in arch_setup */
  203. .id = 1,
  204. .dev = {
  205. .dma_mask = NULL, /* not use dma */
  206. .coherent_dma_mask = 0xffffffff,
  207. .platform_data = &usb1_common_data,
  208. },
  209. .num_resources = ARRAY_SIZE(usb1_common_resources),
  210. .resource = usb1_common_resources,
  211. };
  212. /* LCDC */
  213. const static struct fb_videomode ecovec_lcd_modes[] = {
  214. {
  215. .name = "Panel",
  216. .xres = 800,
  217. .yres = 480,
  218. .left_margin = 220,
  219. .right_margin = 110,
  220. .hsync_len = 70,
  221. .upper_margin = 20,
  222. .lower_margin = 5,
  223. .vsync_len = 5,
  224. .sync = 0, /* hsync and vsync are active low */
  225. },
  226. };
  227. const static struct fb_videomode ecovec_dvi_modes[] = {
  228. {
  229. .name = "DVI",
  230. .xres = 1280,
  231. .yres = 720,
  232. .left_margin = 220,
  233. .right_margin = 110,
  234. .hsync_len = 40,
  235. .upper_margin = 20,
  236. .lower_margin = 5,
  237. .vsync_len = 5,
  238. .sync = 0, /* hsync and vsync are active low */
  239. },
  240. };
  241. static struct sh_mobile_lcdc_info lcdc_info = {
  242. .ch[0] = {
  243. .interface_type = RGB18,
  244. .chan = LCDC_CHAN_MAINLCD,
  245. .bpp = 16,
  246. .lcd_size_cfg = { /* 7.0 inch */
  247. .width = 152,
  248. .height = 91,
  249. },
  250. .board_cfg = {
  251. },
  252. }
  253. };
  254. static struct resource lcdc_resources[] = {
  255. [0] = {
  256. .name = "LCDC",
  257. .start = 0xfe940000,
  258. .end = 0xfe942fff,
  259. .flags = IORESOURCE_MEM,
  260. },
  261. [1] = {
  262. .start = 106,
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. };
  266. static struct platform_device lcdc_device = {
  267. .name = "sh_mobile_lcdc_fb",
  268. .num_resources = ARRAY_SIZE(lcdc_resources),
  269. .resource = lcdc_resources,
  270. .dev = {
  271. .platform_data = &lcdc_info,
  272. },
  273. .archdata = {
  274. .hwblk_id = HWBLK_LCDC,
  275. },
  276. };
  277. /* CEU0 */
  278. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  279. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  280. };
  281. static struct resource ceu0_resources[] = {
  282. [0] = {
  283. .name = "CEU0",
  284. .start = 0xfe910000,
  285. .end = 0xfe91009f,
  286. .flags = IORESOURCE_MEM,
  287. },
  288. [1] = {
  289. .start = 52,
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. [2] = {
  293. /* place holder for contiguous memory */
  294. },
  295. };
  296. static struct platform_device ceu0_device = {
  297. .name = "sh_mobile_ceu",
  298. .id = 0, /* "ceu0" clock */
  299. .num_resources = ARRAY_SIZE(ceu0_resources),
  300. .resource = ceu0_resources,
  301. .dev = {
  302. .platform_data = &sh_mobile_ceu0_info,
  303. },
  304. .archdata = {
  305. .hwblk_id = HWBLK_CEU0,
  306. },
  307. };
  308. /* CEU1 */
  309. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  310. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  311. };
  312. static struct resource ceu1_resources[] = {
  313. [0] = {
  314. .name = "CEU1",
  315. .start = 0xfe914000,
  316. .end = 0xfe91409f,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. [1] = {
  320. .start = 63,
  321. .flags = IORESOURCE_IRQ,
  322. },
  323. [2] = {
  324. /* place holder for contiguous memory */
  325. },
  326. };
  327. static struct platform_device ceu1_device = {
  328. .name = "sh_mobile_ceu",
  329. .id = 1, /* "ceu1" clock */
  330. .num_resources = ARRAY_SIZE(ceu1_resources),
  331. .resource = ceu1_resources,
  332. .dev = {
  333. .platform_data = &sh_mobile_ceu1_info,
  334. },
  335. .archdata = {
  336. .hwblk_id = HWBLK_CEU1,
  337. },
  338. };
  339. /* I2C device */
  340. static struct i2c_board_info i2c0_devices[] = {
  341. {
  342. I2C_BOARD_INFO("da7210", 0x1a),
  343. },
  344. };
  345. static struct i2c_board_info i2c1_devices[] = {
  346. {
  347. I2C_BOARD_INFO("r2025sd", 0x32),
  348. },
  349. {
  350. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  351. .irq = 33,
  352. }
  353. };
  354. /* KEYSC */
  355. static struct sh_keysc_info keysc_info = {
  356. .mode = SH_KEYSC_MODE_1,
  357. .scan_timing = 3,
  358. .delay = 50,
  359. .kycr2_delay = 100,
  360. .keycodes = { KEY_1, 0, 0, 0, 0,
  361. KEY_2, 0, 0, 0, 0,
  362. KEY_3, 0, 0, 0, 0,
  363. KEY_4, 0, 0, 0, 0,
  364. KEY_5, 0, 0, 0, 0,
  365. KEY_6, 0, 0, 0, 0, },
  366. };
  367. static struct resource keysc_resources[] = {
  368. [0] = {
  369. .name = "KEYSC",
  370. .start = 0x044b0000,
  371. .end = 0x044b000f,
  372. .flags = IORESOURCE_MEM,
  373. },
  374. [1] = {
  375. .start = 79,
  376. .flags = IORESOURCE_IRQ,
  377. },
  378. };
  379. static struct platform_device keysc_device = {
  380. .name = "sh_keysc",
  381. .id = 0, /* keysc0 clock */
  382. .num_resources = ARRAY_SIZE(keysc_resources),
  383. .resource = keysc_resources,
  384. .dev = {
  385. .platform_data = &keysc_info,
  386. },
  387. .archdata = {
  388. .hwblk_id = HWBLK_KEYSC,
  389. },
  390. };
  391. /* TouchScreen */
  392. #define IRQ0 32
  393. static int ts_get_pendown_state(void)
  394. {
  395. int val = 0;
  396. gpio_free(GPIO_FN_INTC_IRQ0);
  397. gpio_request(GPIO_PTZ0, NULL);
  398. gpio_direction_input(GPIO_PTZ0);
  399. val = gpio_get_value(GPIO_PTZ0);
  400. gpio_free(GPIO_PTZ0);
  401. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  402. return val ? 0 : 1;
  403. }
  404. static int ts_init(void)
  405. {
  406. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  407. return 0;
  408. }
  409. static struct tsc2007_platform_data tsc2007_info = {
  410. .model = 2007,
  411. .x_plate_ohms = 180,
  412. .get_pendown_state = ts_get_pendown_state,
  413. .init_platform_hw = ts_init,
  414. };
  415. static struct i2c_board_info ts_i2c_clients = {
  416. I2C_BOARD_INFO("tsc2007", 0x48),
  417. .type = "tsc2007",
  418. .platform_data = &tsc2007_info,
  419. .irq = IRQ0,
  420. };
  421. #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE)
  422. /* SDHI0 */
  423. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  424. {
  425. gpio_set_value(GPIO_PTB6, state);
  426. }
  427. static struct sh_mobile_sdhi_info sdhi0_info = {
  428. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  429. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  430. .set_pwr = sdhi0_set_pwr,
  431. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  432. };
  433. static struct resource sdhi0_resources[] = {
  434. [0] = {
  435. .name = "SDHI0",
  436. .start = 0x04ce0000,
  437. .end = 0x04ce00ff,
  438. .flags = IORESOURCE_MEM,
  439. },
  440. [1] = {
  441. .start = 100,
  442. .flags = IORESOURCE_IRQ,
  443. },
  444. };
  445. static struct platform_device sdhi0_device = {
  446. .name = "sh_mobile_sdhi",
  447. .num_resources = ARRAY_SIZE(sdhi0_resources),
  448. .resource = sdhi0_resources,
  449. .id = 0,
  450. .dev = {
  451. .platform_data = &sdhi0_info,
  452. },
  453. .archdata = {
  454. .hwblk_id = HWBLK_SDHI0,
  455. },
  456. };
  457. #if !defined(CONFIG_MMC_SH_MMCIF)
  458. /* SDHI1 */
  459. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  460. {
  461. gpio_set_value(GPIO_PTB7, state);
  462. }
  463. static struct sh_mobile_sdhi_info sdhi1_info = {
  464. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  465. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  466. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  467. .set_pwr = sdhi1_set_pwr,
  468. };
  469. static struct resource sdhi1_resources[] = {
  470. [0] = {
  471. .name = "SDHI1",
  472. .start = 0x04cf0000,
  473. .end = 0x04cf00ff,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. [1] = {
  477. .start = 23,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static struct platform_device sdhi1_device = {
  482. .name = "sh_mobile_sdhi",
  483. .num_resources = ARRAY_SIZE(sdhi1_resources),
  484. .resource = sdhi1_resources,
  485. .id = 1,
  486. .dev = {
  487. .platform_data = &sdhi1_info,
  488. },
  489. .archdata = {
  490. .hwblk_id = HWBLK_SDHI1,
  491. },
  492. };
  493. #endif /* CONFIG_MMC_SH_MMCIF */
  494. #else
  495. /* MMC SPI */
  496. static int mmc_spi_get_ro(struct device *dev)
  497. {
  498. return gpio_get_value(GPIO_PTY6);
  499. }
  500. static int mmc_spi_get_cd(struct device *dev)
  501. {
  502. return !gpio_get_value(GPIO_PTY7);
  503. }
  504. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  505. {
  506. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  507. }
  508. static struct mmc_spi_platform_data mmc_spi_info = {
  509. .get_ro = mmc_spi_get_ro,
  510. .get_cd = mmc_spi_get_cd,
  511. .caps = MMC_CAP_NEEDS_POLL,
  512. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  513. .setpower = mmc_spi_setpower,
  514. };
  515. static struct spi_board_info spi_bus[] = {
  516. {
  517. .modalias = "mmc_spi",
  518. .platform_data = &mmc_spi_info,
  519. .max_speed_hz = 5000000,
  520. .mode = SPI_MODE_0,
  521. .controller_data = (void *) GPIO_PTM4,
  522. },
  523. };
  524. /* MSIOF0 */
  525. static struct sh_msiof_spi_info msiof0_data = {
  526. .num_chipselect = 1,
  527. };
  528. static struct resource msiof0_resources[] = {
  529. [0] = {
  530. .name = "MSIOF0",
  531. .start = 0xa4c40000,
  532. .end = 0xa4c40063,
  533. .flags = IORESOURCE_MEM,
  534. },
  535. [1] = {
  536. .start = 84,
  537. .flags = IORESOURCE_IRQ,
  538. },
  539. };
  540. static struct platform_device msiof0_device = {
  541. .name = "spi_sh_msiof",
  542. .id = 0, /* MSIOF0 */
  543. .dev = {
  544. .platform_data = &msiof0_data,
  545. },
  546. .num_resources = ARRAY_SIZE(msiof0_resources),
  547. .resource = msiof0_resources,
  548. .archdata = {
  549. .hwblk_id = HWBLK_MSIOF0,
  550. },
  551. };
  552. #endif
  553. /* I2C Video/Camera */
  554. static struct i2c_board_info i2c_camera[] = {
  555. {
  556. I2C_BOARD_INFO("tw9910", 0x45),
  557. },
  558. {
  559. /* 1st camera */
  560. I2C_BOARD_INFO("mt9t112", 0x3c),
  561. },
  562. {
  563. /* 2nd camera */
  564. I2C_BOARD_INFO("mt9t112", 0x3c),
  565. },
  566. };
  567. /* tw9910 */
  568. static int tw9910_power(struct device *dev, int mode)
  569. {
  570. int val = mode ? 0 : 1;
  571. gpio_set_value(GPIO_PTU2, val);
  572. if (mode)
  573. mdelay(100);
  574. return 0;
  575. }
  576. static struct tw9910_video_info tw9910_info = {
  577. .buswidth = SOCAM_DATAWIDTH_8,
  578. .mpout = TW9910_MPO_FIELD,
  579. };
  580. static struct soc_camera_link tw9910_link = {
  581. .i2c_adapter_id = 0,
  582. .bus_id = 1,
  583. .power = tw9910_power,
  584. .board_info = &i2c_camera[0],
  585. .priv = &tw9910_info,
  586. };
  587. /* mt9t112 */
  588. static int mt9t112_power1(struct device *dev, int mode)
  589. {
  590. gpio_set_value(GPIO_PTA3, mode);
  591. if (mode)
  592. mdelay(100);
  593. return 0;
  594. }
  595. static struct mt9t112_camera_info mt9t112_info1 = {
  596. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  597. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  598. };
  599. static struct soc_camera_link mt9t112_link1 = {
  600. .i2c_adapter_id = 0,
  601. .power = mt9t112_power1,
  602. .bus_id = 0,
  603. .board_info = &i2c_camera[1],
  604. .priv = &mt9t112_info1,
  605. };
  606. static int mt9t112_power2(struct device *dev, int mode)
  607. {
  608. gpio_set_value(GPIO_PTA4, mode);
  609. if (mode)
  610. mdelay(100);
  611. return 0;
  612. }
  613. static struct mt9t112_camera_info mt9t112_info2 = {
  614. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  615. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  616. };
  617. static struct soc_camera_link mt9t112_link2 = {
  618. .i2c_adapter_id = 1,
  619. .power = mt9t112_power2,
  620. .bus_id = 1,
  621. .board_info = &i2c_camera[2],
  622. .priv = &mt9t112_info2,
  623. };
  624. static struct platform_device camera_devices[] = {
  625. {
  626. .name = "soc-camera-pdrv",
  627. .id = 0,
  628. .dev = {
  629. .platform_data = &tw9910_link,
  630. },
  631. },
  632. {
  633. .name = "soc-camera-pdrv",
  634. .id = 1,
  635. .dev = {
  636. .platform_data = &mt9t112_link1,
  637. },
  638. },
  639. {
  640. .name = "soc-camera-pdrv",
  641. .id = 2,
  642. .dev = {
  643. .platform_data = &mt9t112_link2,
  644. },
  645. },
  646. };
  647. /* FSI */
  648. static struct sh_fsi_platform_info fsi_info = {
  649. .portb_flags = SH_FSI_BRS_INV,
  650. };
  651. static struct resource fsi_resources[] = {
  652. [0] = {
  653. .name = "FSI",
  654. .start = 0xFE3C0000,
  655. .end = 0xFE3C021d,
  656. .flags = IORESOURCE_MEM,
  657. },
  658. [1] = {
  659. .start = 108,
  660. .flags = IORESOURCE_IRQ,
  661. },
  662. };
  663. static struct platform_device fsi_device = {
  664. .name = "sh_fsi",
  665. .id = 0,
  666. .num_resources = ARRAY_SIZE(fsi_resources),
  667. .resource = fsi_resources,
  668. .dev = {
  669. .platform_data = &fsi_info,
  670. },
  671. .archdata = {
  672. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  673. },
  674. };
  675. /* IrDA */
  676. static struct resource irda_resources[] = {
  677. [0] = {
  678. .name = "IrDA",
  679. .start = 0xA45D0000,
  680. .end = 0xA45D0049,
  681. .flags = IORESOURCE_MEM,
  682. },
  683. [1] = {
  684. .start = 20,
  685. .flags = IORESOURCE_IRQ,
  686. },
  687. };
  688. static struct platform_device irda_device = {
  689. .name = "sh_sir",
  690. .num_resources = ARRAY_SIZE(irda_resources),
  691. .resource = irda_resources,
  692. };
  693. #include <media/ak881x.h>
  694. #include <media/sh_vou.h>
  695. static struct ak881x_pdata ak881x_pdata = {
  696. .flags = AK881X_IF_MODE_SLAVE,
  697. };
  698. static struct i2c_board_info ak8813 = {
  699. I2C_BOARD_INFO("ak8813", 0x20),
  700. .platform_data = &ak881x_pdata,
  701. };
  702. static struct sh_vou_pdata sh_vou_pdata = {
  703. .bus_fmt = SH_VOU_BUS_8BIT,
  704. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  705. .board_info = &ak8813,
  706. .i2c_adap = 0,
  707. };
  708. static struct resource sh_vou_resources[] = {
  709. [0] = {
  710. .start = 0xfe960000,
  711. .end = 0xfe962043,
  712. .flags = IORESOURCE_MEM,
  713. },
  714. [1] = {
  715. .start = 55,
  716. .flags = IORESOURCE_IRQ,
  717. },
  718. };
  719. static struct platform_device vou_device = {
  720. .name = "sh-vou",
  721. .id = -1,
  722. .num_resources = ARRAY_SIZE(sh_vou_resources),
  723. .resource = sh_vou_resources,
  724. .dev = {
  725. .platform_data = &sh_vou_pdata,
  726. },
  727. .archdata = {
  728. .hwblk_id = HWBLK_VOU,
  729. },
  730. };
  731. #if defined(CONFIG_MMC_SH_MMCIF)
  732. /* SH_MMCIF */
  733. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  734. {
  735. gpio_set_value(GPIO_PTB7, state);
  736. }
  737. static void mmcif_down_pwr(struct platform_device *pdev)
  738. {
  739. gpio_set_value(GPIO_PTB7, 0);
  740. }
  741. static struct resource sh_mmcif_resources[] = {
  742. [0] = {
  743. .name = "SH_MMCIF",
  744. .start = 0xA4CA0000,
  745. .end = 0xA4CA00FF,
  746. .flags = IORESOURCE_MEM,
  747. },
  748. [1] = {
  749. /* MMC2I */
  750. .start = 29,
  751. .flags = IORESOURCE_IRQ,
  752. },
  753. [2] = {
  754. /* MMC3I */
  755. .start = 30,
  756. .flags = IORESOURCE_IRQ,
  757. },
  758. };
  759. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  760. .set_pwr = mmcif_set_pwr,
  761. .down_pwr = mmcif_down_pwr,
  762. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  763. .caps = MMC_CAP_4_BIT_DATA |
  764. MMC_CAP_8_BIT_DATA |
  765. MMC_CAP_NEEDS_POLL,
  766. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  767. };
  768. static struct platform_device sh_mmcif_device = {
  769. .name = "sh_mmcif",
  770. .id = 0,
  771. .dev = {
  772. .platform_data = &sh_mmcif_plat,
  773. },
  774. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  775. .resource = sh_mmcif_resources,
  776. };
  777. #endif
  778. static struct platform_device *ecovec_devices[] __initdata = {
  779. &heartbeat_device,
  780. &nor_flash_device,
  781. &sh_eth_device,
  782. &usb0_host_device,
  783. &usb1_common_device,
  784. &lcdc_device,
  785. &ceu0_device,
  786. &ceu1_device,
  787. &keysc_device,
  788. #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE)
  789. &sdhi0_device,
  790. #if !defined(CONFIG_MMC_SH_MMCIF)
  791. &sdhi1_device,
  792. #endif
  793. #else
  794. &msiof0_device,
  795. #endif
  796. &camera_devices[0],
  797. &camera_devices[1],
  798. &camera_devices[2],
  799. &fsi_device,
  800. &irda_device,
  801. &vou_device,
  802. #if defined(CONFIG_MMC_SH_MMCIF)
  803. &sh_mmcif_device,
  804. #endif
  805. };
  806. #ifdef CONFIG_I2C
  807. #define EEPROM_ADDR 0x50
  808. static u8 mac_read(struct i2c_adapter *a, u8 command)
  809. {
  810. struct i2c_msg msg[2];
  811. u8 buf;
  812. int ret;
  813. msg[0].addr = EEPROM_ADDR;
  814. msg[0].flags = 0;
  815. msg[0].len = 1;
  816. msg[0].buf = &command;
  817. msg[1].addr = EEPROM_ADDR;
  818. msg[1].flags = I2C_M_RD;
  819. msg[1].len = 1;
  820. msg[1].buf = &buf;
  821. ret = i2c_transfer(a, msg, 2);
  822. if (ret < 0) {
  823. printk(KERN_ERR "error %d\n", ret);
  824. buf = 0xff;
  825. }
  826. return buf;
  827. }
  828. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  829. {
  830. struct i2c_adapter *a = i2c_get_adapter(1);
  831. int i;
  832. if (!a) {
  833. pr_err("can not get I2C 1\n");
  834. return;
  835. }
  836. /* read MAC address frome EEPROM */
  837. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  838. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  839. msleep(10);
  840. }
  841. i2c_put_adapter(a);
  842. }
  843. #else
  844. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  845. {
  846. pr_err("unable to read sh_eth MAC address\n");
  847. }
  848. #endif
  849. #define PORT_HIZA 0xA4050158
  850. #define IODRIVEA 0xA405018A
  851. extern char ecovec24_sdram_enter_start;
  852. extern char ecovec24_sdram_enter_end;
  853. extern char ecovec24_sdram_leave_start;
  854. extern char ecovec24_sdram_leave_end;
  855. static int __init arch_setup(void)
  856. {
  857. struct clk *clk;
  858. /* register board specific self-refresh code */
  859. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  860. SUSP_SH_RSTANDBY,
  861. &ecovec24_sdram_enter_start,
  862. &ecovec24_sdram_enter_end,
  863. &ecovec24_sdram_leave_start,
  864. &ecovec24_sdram_leave_end);
  865. /* enable STATUS0, STATUS2 and PDSTATUS */
  866. gpio_request(GPIO_FN_STATUS0, NULL);
  867. gpio_request(GPIO_FN_STATUS2, NULL);
  868. gpio_request(GPIO_FN_PDSTATUS, NULL);
  869. /* enable SCIFA0 */
  870. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  871. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  872. /* enable debug LED */
  873. gpio_request(GPIO_PTG0, NULL);
  874. gpio_request(GPIO_PTG1, NULL);
  875. gpio_request(GPIO_PTG2, NULL);
  876. gpio_request(GPIO_PTG3, NULL);
  877. gpio_direction_output(GPIO_PTG0, 0);
  878. gpio_direction_output(GPIO_PTG1, 0);
  879. gpio_direction_output(GPIO_PTG2, 0);
  880. gpio_direction_output(GPIO_PTG3, 0);
  881. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  882. /* enable SH-Eth */
  883. gpio_request(GPIO_PTA1, NULL);
  884. gpio_direction_output(GPIO_PTA1, 1);
  885. mdelay(20);
  886. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  887. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  888. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  889. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  890. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  891. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  892. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  893. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  894. gpio_request(GPIO_FN_MDIO, NULL);
  895. gpio_request(GPIO_FN_MDC, NULL);
  896. gpio_request(GPIO_FN_LNKSTA, NULL);
  897. /* enable USB */
  898. __raw_writew(0x0000, 0xA4D80000);
  899. __raw_writew(0x0000, 0xA4D90000);
  900. gpio_request(GPIO_PTB3, NULL);
  901. gpio_request(GPIO_PTB4, NULL);
  902. gpio_request(GPIO_PTB5, NULL);
  903. gpio_direction_input(GPIO_PTB3);
  904. gpio_direction_output(GPIO_PTB4, 0);
  905. gpio_direction_output(GPIO_PTB5, 0);
  906. __raw_writew(0x0600, 0xa40501d4);
  907. __raw_writew(0x0600, 0xa4050192);
  908. if (gpio_get_value(GPIO_PTB3)) {
  909. printk(KERN_INFO "USB1 function is selected\n");
  910. usb1_common_device.name = "r8a66597_udc";
  911. } else {
  912. printk(KERN_INFO "USB1 host is selected\n");
  913. usb1_common_device.name = "r8a66597_hcd";
  914. }
  915. /* enable LCDC */
  916. gpio_request(GPIO_FN_LCDD23, NULL);
  917. gpio_request(GPIO_FN_LCDD22, NULL);
  918. gpio_request(GPIO_FN_LCDD21, NULL);
  919. gpio_request(GPIO_FN_LCDD20, NULL);
  920. gpio_request(GPIO_FN_LCDD19, NULL);
  921. gpio_request(GPIO_FN_LCDD18, NULL);
  922. gpio_request(GPIO_FN_LCDD17, NULL);
  923. gpio_request(GPIO_FN_LCDD16, NULL);
  924. gpio_request(GPIO_FN_LCDD15, NULL);
  925. gpio_request(GPIO_FN_LCDD14, NULL);
  926. gpio_request(GPIO_FN_LCDD13, NULL);
  927. gpio_request(GPIO_FN_LCDD12, NULL);
  928. gpio_request(GPIO_FN_LCDD11, NULL);
  929. gpio_request(GPIO_FN_LCDD10, NULL);
  930. gpio_request(GPIO_FN_LCDD9, NULL);
  931. gpio_request(GPIO_FN_LCDD8, NULL);
  932. gpio_request(GPIO_FN_LCDD7, NULL);
  933. gpio_request(GPIO_FN_LCDD6, NULL);
  934. gpio_request(GPIO_FN_LCDD5, NULL);
  935. gpio_request(GPIO_FN_LCDD4, NULL);
  936. gpio_request(GPIO_FN_LCDD3, NULL);
  937. gpio_request(GPIO_FN_LCDD2, NULL);
  938. gpio_request(GPIO_FN_LCDD1, NULL);
  939. gpio_request(GPIO_FN_LCDD0, NULL);
  940. gpio_request(GPIO_FN_LCDDISP, NULL);
  941. gpio_request(GPIO_FN_LCDHSYN, NULL);
  942. gpio_request(GPIO_FN_LCDDCK, NULL);
  943. gpio_request(GPIO_FN_LCDVSYN, NULL);
  944. gpio_request(GPIO_FN_LCDDON, NULL);
  945. gpio_request(GPIO_FN_LCDLCLK, NULL);
  946. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  947. gpio_request(GPIO_PTE6, NULL);
  948. gpio_request(GPIO_PTU1, NULL);
  949. gpio_request(GPIO_PTR1, NULL);
  950. gpio_request(GPIO_PTA2, NULL);
  951. gpio_direction_input(GPIO_PTE6);
  952. gpio_direction_output(GPIO_PTU1, 0);
  953. gpio_direction_output(GPIO_PTR1, 0);
  954. gpio_direction_output(GPIO_PTA2, 0);
  955. /* I/O buffer drive ability is high */
  956. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  957. if (gpio_get_value(GPIO_PTE6)) {
  958. /* DVI */
  959. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  960. lcdc_info.ch[0].clock_divider = 1;
  961. lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
  962. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
  963. gpio_set_value(GPIO_PTA2, 1);
  964. gpio_set_value(GPIO_PTU1, 1);
  965. } else {
  966. /* Panel */
  967. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  968. lcdc_info.ch[0].clock_divider = 2;
  969. lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
  970. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
  971. gpio_set_value(GPIO_PTR1, 1);
  972. /* FIXME
  973. *
  974. * LCDDON control is needed for Panel,
  975. * but current sh_mobile_lcdc driver doesn't control it.
  976. * It is temporary correspondence
  977. */
  978. gpio_request(GPIO_PTF4, NULL);
  979. gpio_direction_output(GPIO_PTF4, 1);
  980. /* enable TouchScreen */
  981. i2c_register_board_info(0, &ts_i2c_clients, 1);
  982. irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  983. }
  984. /* enable CEU0 */
  985. gpio_request(GPIO_FN_VIO0_D15, NULL);
  986. gpio_request(GPIO_FN_VIO0_D14, NULL);
  987. gpio_request(GPIO_FN_VIO0_D13, NULL);
  988. gpio_request(GPIO_FN_VIO0_D12, NULL);
  989. gpio_request(GPIO_FN_VIO0_D11, NULL);
  990. gpio_request(GPIO_FN_VIO0_D10, NULL);
  991. gpio_request(GPIO_FN_VIO0_D9, NULL);
  992. gpio_request(GPIO_FN_VIO0_D8, NULL);
  993. gpio_request(GPIO_FN_VIO0_D7, NULL);
  994. gpio_request(GPIO_FN_VIO0_D6, NULL);
  995. gpio_request(GPIO_FN_VIO0_D5, NULL);
  996. gpio_request(GPIO_FN_VIO0_D4, NULL);
  997. gpio_request(GPIO_FN_VIO0_D3, NULL);
  998. gpio_request(GPIO_FN_VIO0_D2, NULL);
  999. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1000. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1001. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1002. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1003. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1004. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1005. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1006. /* enable CEU1 */
  1007. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1008. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1009. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1010. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1011. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1012. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1013. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1014. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1015. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1016. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1017. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1018. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1019. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1020. /* enable KEYSC */
  1021. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1022. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1023. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1024. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1025. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1026. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1027. gpio_request(GPIO_FN_KEYIN0, NULL);
  1028. /* enable user debug switch */
  1029. gpio_request(GPIO_PTR0, NULL);
  1030. gpio_request(GPIO_PTR4, NULL);
  1031. gpio_request(GPIO_PTR5, NULL);
  1032. gpio_request(GPIO_PTR6, NULL);
  1033. gpio_direction_input(GPIO_PTR0);
  1034. gpio_direction_input(GPIO_PTR4);
  1035. gpio_direction_input(GPIO_PTR5);
  1036. gpio_direction_input(GPIO_PTR6);
  1037. #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE)
  1038. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1039. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1040. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1041. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1042. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1043. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1044. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1045. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1046. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1047. gpio_request(GPIO_PTB6, NULL);
  1048. gpio_direction_output(GPIO_PTB6, 0);
  1049. #if !defined(CONFIG_MMC_SH_MMCIF)
  1050. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1051. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1052. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1053. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1054. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1055. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1056. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1057. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1058. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1059. gpio_request(GPIO_PTB7, NULL);
  1060. gpio_direction_output(GPIO_PTB7, 0);
  1061. /* I/O buffer drive ability is high for SDHI1 */
  1062. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1063. #endif /* CONFIG_MMC_SH_MMCIF */
  1064. #else
  1065. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1066. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1067. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1068. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1069. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1070. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1071. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1072. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1073. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1074. gpio_direction_input(GPIO_PTY6);
  1075. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1076. gpio_direction_input(GPIO_PTY7);
  1077. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1078. #endif
  1079. /* enable Video */
  1080. gpio_request(GPIO_PTU2, NULL);
  1081. gpio_direction_output(GPIO_PTU2, 1);
  1082. /* enable Camera */
  1083. gpio_request(GPIO_PTA3, NULL);
  1084. gpio_request(GPIO_PTA4, NULL);
  1085. gpio_direction_output(GPIO_PTA3, 0);
  1086. gpio_direction_output(GPIO_PTA4, 0);
  1087. /* enable FSI */
  1088. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1089. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1090. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1091. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1092. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1093. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1094. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1095. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1096. /* set SPU2 clock to 83.4 MHz */
  1097. clk = clk_get(NULL, "spu_clk");
  1098. if (!IS_ERR(clk)) {
  1099. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1100. clk_put(clk);
  1101. }
  1102. /* change parent of FSI B */
  1103. clk = clk_get(NULL, "fsib_clk");
  1104. if (!IS_ERR(clk)) {
  1105. /* 48kHz dummy clock was used to make sure 1/1 divide */
  1106. clk_set_rate(&sh7724_fsimckb_clk, 48000);
  1107. clk_set_parent(clk, &sh7724_fsimckb_clk);
  1108. clk_set_rate(clk, 48000);
  1109. clk_put(clk);
  1110. }
  1111. gpio_request(GPIO_PTU0, NULL);
  1112. gpio_direction_output(GPIO_PTU0, 0);
  1113. mdelay(20);
  1114. /* enable motion sensor */
  1115. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1116. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1117. /* set VPU clock to 166 MHz */
  1118. clk = clk_get(NULL, "vpu_clk");
  1119. if (!IS_ERR(clk)) {
  1120. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1121. clk_put(clk);
  1122. }
  1123. /* enable IrDA */
  1124. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1125. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1126. gpio_request(GPIO_PTU5, NULL);
  1127. gpio_direction_output(GPIO_PTU5, 0);
  1128. #if defined(CONFIG_MMC_SH_MMCIF)
  1129. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1130. gpio_request(GPIO_FN_MMC_D7, NULL);
  1131. gpio_request(GPIO_FN_MMC_D6, NULL);
  1132. gpio_request(GPIO_FN_MMC_D5, NULL);
  1133. gpio_request(GPIO_FN_MMC_D4, NULL);
  1134. gpio_request(GPIO_FN_MMC_D3, NULL);
  1135. gpio_request(GPIO_FN_MMC_D2, NULL);
  1136. gpio_request(GPIO_FN_MMC_D1, NULL);
  1137. gpio_request(GPIO_FN_MMC_D0, NULL);
  1138. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1139. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1140. gpio_request(GPIO_PTB7, NULL);
  1141. gpio_direction_output(GPIO_PTB7, 0);
  1142. /* I/O buffer drive ability is high for MMCIF */
  1143. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1144. #endif
  1145. /* enable I2C device */
  1146. i2c_register_board_info(0, i2c0_devices,
  1147. ARRAY_SIZE(i2c0_devices));
  1148. i2c_register_board_info(1, i2c1_devices,
  1149. ARRAY_SIZE(i2c1_devices));
  1150. #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
  1151. /* VOU */
  1152. gpio_request(GPIO_FN_DV_D15, NULL);
  1153. gpio_request(GPIO_FN_DV_D14, NULL);
  1154. gpio_request(GPIO_FN_DV_D13, NULL);
  1155. gpio_request(GPIO_FN_DV_D12, NULL);
  1156. gpio_request(GPIO_FN_DV_D11, NULL);
  1157. gpio_request(GPIO_FN_DV_D10, NULL);
  1158. gpio_request(GPIO_FN_DV_D9, NULL);
  1159. gpio_request(GPIO_FN_DV_D8, NULL);
  1160. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1161. gpio_request(GPIO_FN_DV_CLK, NULL);
  1162. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1163. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1164. /* AK8813 power / reset sequence */
  1165. gpio_request(GPIO_PTG4, NULL);
  1166. gpio_request(GPIO_PTU3, NULL);
  1167. /* Reset */
  1168. gpio_direction_output(GPIO_PTG4, 0);
  1169. /* Power down */
  1170. gpio_direction_output(GPIO_PTU3, 1);
  1171. udelay(10);
  1172. /* Power up, reset */
  1173. gpio_set_value(GPIO_PTU3, 0);
  1174. udelay(10);
  1175. /* Remove reset */
  1176. gpio_set_value(GPIO_PTG4, 1);
  1177. #endif
  1178. return platform_add_devices(ecovec_devices,
  1179. ARRAY_SIZE(ecovec_devices));
  1180. }
  1181. arch_initcall(arch_setup);
  1182. static int __init devices_setup(void)
  1183. {
  1184. sh_eth_init(&sh_eth_plat);
  1185. return 0;
  1186. }
  1187. device_initcall(devices_setup);
  1188. static struct sh_machine_vector mv_ecovec __initmv = {
  1189. .mv_name = "R0P7724 (EcoVec)",
  1190. };