time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/sysdev.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/s390_ext.h>
  43. #include <asm/div64.h>
  44. #include <asm/vdso.h>
  45. #include <asm/irq.h>
  46. #include <asm/irq_regs.h>
  47. #include <asm/timer.h>
  48. #include <asm/etr.h>
  49. #include <asm/cio.h>
  50. /* change this if you have some constant time drift */
  51. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  52. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  53. u64 sched_clock_base_cc = -1; /* Force to data section. */
  54. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  55. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  56. /*
  57. * Scheduler clock - returns current time in nanosec units.
  58. */
  59. unsigned long long notrace __kprobes sched_clock(void)
  60. {
  61. return (get_clock_monotonic() * 125) >> 9;
  62. }
  63. /*
  64. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  65. */
  66. unsigned long long monotonic_clock(void)
  67. {
  68. return sched_clock();
  69. }
  70. EXPORT_SYMBOL(monotonic_clock);
  71. void tod_to_timeval(__u64 todval, struct timespec *xt)
  72. {
  73. unsigned long long sec;
  74. sec = todval >> 12;
  75. do_div(sec, 1000000);
  76. xt->tv_sec = sec;
  77. todval -= (sec * 1000000) << 12;
  78. xt->tv_nsec = ((todval * 1000) >> 12);
  79. }
  80. EXPORT_SYMBOL(tod_to_timeval);
  81. void clock_comparator_work(void)
  82. {
  83. struct clock_event_device *cd;
  84. S390_lowcore.clock_comparator = -1ULL;
  85. set_clock_comparator(S390_lowcore.clock_comparator);
  86. cd = &__get_cpu_var(comparators);
  87. cd->event_handler(cd);
  88. }
  89. /*
  90. * Fixup the clock comparator.
  91. */
  92. static void fixup_clock_comparator(unsigned long long delta)
  93. {
  94. /* If nobody is waiting there's nothing to fix. */
  95. if (S390_lowcore.clock_comparator == -1ULL)
  96. return;
  97. S390_lowcore.clock_comparator += delta;
  98. set_clock_comparator(S390_lowcore.clock_comparator);
  99. }
  100. static int s390_next_event(unsigned long delta,
  101. struct clock_event_device *evt)
  102. {
  103. S390_lowcore.clock_comparator = get_clock() + delta;
  104. set_clock_comparator(S390_lowcore.clock_comparator);
  105. return 0;
  106. }
  107. static void s390_set_mode(enum clock_event_mode mode,
  108. struct clock_event_device *evt)
  109. {
  110. }
  111. /*
  112. * Set up lowcore and control register of the current cpu to
  113. * enable TOD clock and clock comparator interrupts.
  114. */
  115. void init_cpu_timer(void)
  116. {
  117. struct clock_event_device *cd;
  118. int cpu;
  119. S390_lowcore.clock_comparator = -1ULL;
  120. set_clock_comparator(S390_lowcore.clock_comparator);
  121. cpu = smp_processor_id();
  122. cd = &per_cpu(comparators, cpu);
  123. cd->name = "comparator";
  124. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  125. cd->mult = 16777;
  126. cd->shift = 12;
  127. cd->min_delta_ns = 1;
  128. cd->max_delta_ns = LONG_MAX;
  129. cd->rating = 400;
  130. cd->cpumask = cpumask_of(cpu);
  131. cd->set_next_event = s390_next_event;
  132. cd->set_mode = s390_set_mode;
  133. clockevents_register_device(cd);
  134. /* Enable clock comparator timer interrupt. */
  135. __ctl_set_bit(0,11);
  136. /* Always allow the timing alert external interrupt. */
  137. __ctl_set_bit(0, 4);
  138. }
  139. static void clock_comparator_interrupt(unsigned int ext_int_code,
  140. unsigned int param32,
  141. unsigned long param64)
  142. {
  143. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  144. if (S390_lowcore.clock_comparator == -1ULL)
  145. set_clock_comparator(S390_lowcore.clock_comparator);
  146. }
  147. static void etr_timing_alert(struct etr_irq_parm *);
  148. static void stp_timing_alert(struct stp_irq_parm *);
  149. static void timing_alert_interrupt(unsigned int ext_int_code,
  150. unsigned int param32, unsigned long param64)
  151. {
  152. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  153. if (param32 & 0x00c40000)
  154. etr_timing_alert((struct etr_irq_parm *) &param32);
  155. if (param32 & 0x00038000)
  156. stp_timing_alert((struct stp_irq_parm *) &param32);
  157. }
  158. static void etr_reset(void);
  159. static void stp_reset(void);
  160. void read_persistent_clock(struct timespec *ts)
  161. {
  162. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  163. }
  164. void read_boot_clock(struct timespec *ts)
  165. {
  166. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  167. }
  168. static cycle_t read_tod_clock(struct clocksource *cs)
  169. {
  170. return get_clock();
  171. }
  172. static struct clocksource clocksource_tod = {
  173. .name = "tod",
  174. .rating = 400,
  175. .read = read_tod_clock,
  176. .mask = -1ULL,
  177. .mult = 1000,
  178. .shift = 12,
  179. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  180. };
  181. struct clocksource * __init clocksource_default_clock(void)
  182. {
  183. return &clocksource_tod;
  184. }
  185. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  186. struct clocksource *clock, u32 mult)
  187. {
  188. if (clock != &clocksource_tod)
  189. return;
  190. /* Make userspace gettimeofday spin until we're done. */
  191. ++vdso_data->tb_update_count;
  192. smp_wmb();
  193. vdso_data->xtime_tod_stamp = clock->cycle_last;
  194. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  195. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  196. vdso_data->wtom_clock_sec = wtm->tv_sec;
  197. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  198. vdso_data->ntp_mult = mult;
  199. smp_wmb();
  200. ++vdso_data->tb_update_count;
  201. }
  202. extern struct timezone sys_tz;
  203. void update_vsyscall_tz(void)
  204. {
  205. /* Make userspace gettimeofday spin until we're done. */
  206. ++vdso_data->tb_update_count;
  207. smp_wmb();
  208. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  209. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  210. smp_wmb();
  211. ++vdso_data->tb_update_count;
  212. }
  213. /*
  214. * Initialize the TOD clock and the CPU timer of
  215. * the boot cpu.
  216. */
  217. void __init time_init(void)
  218. {
  219. /* Reset time synchronization interfaces. */
  220. etr_reset();
  221. stp_reset();
  222. /* request the clock comparator external interrupt */
  223. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  224. panic("Couldn't request external interrupt 0x1004");
  225. /* request the timing alert external interrupt */
  226. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  227. panic("Couldn't request external interrupt 0x1406");
  228. if (clocksource_register(&clocksource_tod) != 0)
  229. panic("Could not register TOD clock source");
  230. /* Enable TOD clock interrupts on the boot cpu. */
  231. init_cpu_timer();
  232. /* Enable cpu timer interrupts on the boot cpu. */
  233. vtime_init();
  234. }
  235. /*
  236. * The time is "clock". old is what we think the time is.
  237. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  238. * "delay" is an approximation how long the synchronization took. If
  239. * the time correction is positive, then "delay" is subtracted from
  240. * the time difference and only the remaining part is passed to ntp.
  241. */
  242. static unsigned long long adjust_time(unsigned long long old,
  243. unsigned long long clock,
  244. unsigned long long delay)
  245. {
  246. unsigned long long delta, ticks;
  247. struct timex adjust;
  248. if (clock > old) {
  249. /* It is later than we thought. */
  250. delta = ticks = clock - old;
  251. delta = ticks = (delta < delay) ? 0 : delta - delay;
  252. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  253. adjust.offset = ticks * (1000000 / HZ);
  254. } else {
  255. /* It is earlier than we thought. */
  256. delta = ticks = old - clock;
  257. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  258. delta = -delta;
  259. adjust.offset = -ticks * (1000000 / HZ);
  260. }
  261. sched_clock_base_cc += delta;
  262. if (adjust.offset != 0) {
  263. pr_notice("The ETR interface has adjusted the clock "
  264. "by %li microseconds\n", adjust.offset);
  265. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  266. do_adjtimex(&adjust);
  267. }
  268. return delta;
  269. }
  270. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  271. static DEFINE_MUTEX(clock_sync_mutex);
  272. static unsigned long clock_sync_flags;
  273. #define CLOCK_SYNC_HAS_ETR 0
  274. #define CLOCK_SYNC_HAS_STP 1
  275. #define CLOCK_SYNC_ETR 2
  276. #define CLOCK_SYNC_STP 3
  277. /*
  278. * The synchronous get_clock function. It will write the current clock
  279. * value to the clock pointer and return 0 if the clock is in sync with
  280. * the external time source. If the clock mode is local it will return
  281. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  282. * reference.
  283. */
  284. int get_sync_clock(unsigned long long *clock)
  285. {
  286. atomic_t *sw_ptr;
  287. unsigned int sw0, sw1;
  288. sw_ptr = &get_cpu_var(clock_sync_word);
  289. sw0 = atomic_read(sw_ptr);
  290. *clock = get_clock();
  291. sw1 = atomic_read(sw_ptr);
  292. put_cpu_var(clock_sync_word);
  293. if (sw0 == sw1 && (sw0 & 0x80000000U))
  294. /* Success: time is in sync. */
  295. return 0;
  296. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  297. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  298. return -ENOSYS;
  299. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  300. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  301. return -EACCES;
  302. return -EAGAIN;
  303. }
  304. EXPORT_SYMBOL(get_sync_clock);
  305. /*
  306. * Make get_sync_clock return -EAGAIN.
  307. */
  308. static void disable_sync_clock(void *dummy)
  309. {
  310. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  311. /*
  312. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  313. * fail until the sync bit is turned back on. In addition
  314. * increase the "sequence" counter to avoid the race of an
  315. * etr event and the complete recovery against get_sync_clock.
  316. */
  317. atomic_clear_mask(0x80000000, sw_ptr);
  318. atomic_inc(sw_ptr);
  319. }
  320. /*
  321. * Make get_sync_clock return 0 again.
  322. * Needs to be called from a context disabled for preemption.
  323. */
  324. static void enable_sync_clock(void)
  325. {
  326. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  327. atomic_set_mask(0x80000000, sw_ptr);
  328. }
  329. /*
  330. * Function to check if the clock is in sync.
  331. */
  332. static inline int check_sync_clock(void)
  333. {
  334. atomic_t *sw_ptr;
  335. int rc;
  336. sw_ptr = &get_cpu_var(clock_sync_word);
  337. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  338. put_cpu_var(clock_sync_word);
  339. return rc;
  340. }
  341. /* Single threaded workqueue used for etr and stp sync events */
  342. static struct workqueue_struct *time_sync_wq;
  343. static void __init time_init_wq(void)
  344. {
  345. if (time_sync_wq)
  346. return;
  347. time_sync_wq = create_singlethread_workqueue("timesync");
  348. }
  349. /*
  350. * External Time Reference (ETR) code.
  351. */
  352. static int etr_port0_online;
  353. static int etr_port1_online;
  354. static int etr_steai_available;
  355. static int __init early_parse_etr(char *p)
  356. {
  357. if (strncmp(p, "off", 3) == 0)
  358. etr_port0_online = etr_port1_online = 0;
  359. else if (strncmp(p, "port0", 5) == 0)
  360. etr_port0_online = 1;
  361. else if (strncmp(p, "port1", 5) == 0)
  362. etr_port1_online = 1;
  363. else if (strncmp(p, "on", 2) == 0)
  364. etr_port0_online = etr_port1_online = 1;
  365. return 0;
  366. }
  367. early_param("etr", early_parse_etr);
  368. enum etr_event {
  369. ETR_EVENT_PORT0_CHANGE,
  370. ETR_EVENT_PORT1_CHANGE,
  371. ETR_EVENT_PORT_ALERT,
  372. ETR_EVENT_SYNC_CHECK,
  373. ETR_EVENT_SWITCH_LOCAL,
  374. ETR_EVENT_UPDATE,
  375. };
  376. /*
  377. * Valid bit combinations of the eacr register are (x = don't care):
  378. * e0 e1 dp p0 p1 ea es sl
  379. * 0 0 x 0 0 0 0 0 initial, disabled state
  380. * 0 0 x 0 1 1 0 0 port 1 online
  381. * 0 0 x 1 0 1 0 0 port 0 online
  382. * 0 0 x 1 1 1 0 0 both ports online
  383. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  384. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  385. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  386. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  387. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  388. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  389. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  390. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  391. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  392. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  393. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  394. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  395. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  396. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  397. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  398. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  399. */
  400. static struct etr_eacr etr_eacr;
  401. static u64 etr_tolec; /* time of last eacr update */
  402. static struct etr_aib etr_port0;
  403. static int etr_port0_uptodate;
  404. static struct etr_aib etr_port1;
  405. static int etr_port1_uptodate;
  406. static unsigned long etr_events;
  407. static struct timer_list etr_timer;
  408. static void etr_timeout(unsigned long dummy);
  409. static void etr_work_fn(struct work_struct *work);
  410. static DEFINE_MUTEX(etr_work_mutex);
  411. static DECLARE_WORK(etr_work, etr_work_fn);
  412. /*
  413. * Reset ETR attachment.
  414. */
  415. static void etr_reset(void)
  416. {
  417. etr_eacr = (struct etr_eacr) {
  418. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  419. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  420. .es = 0, .sl = 0 };
  421. if (etr_setr(&etr_eacr) == 0) {
  422. etr_tolec = get_clock();
  423. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  424. if (etr_port0_online && etr_port1_online)
  425. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  426. } else if (etr_port0_online || etr_port1_online) {
  427. pr_warning("The real or virtual hardware system does "
  428. "not provide an ETR interface\n");
  429. etr_port0_online = etr_port1_online = 0;
  430. }
  431. }
  432. static int __init etr_init(void)
  433. {
  434. struct etr_aib aib;
  435. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  436. return 0;
  437. time_init_wq();
  438. /* Check if this machine has the steai instruction. */
  439. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  440. etr_steai_available = 1;
  441. setup_timer(&etr_timer, etr_timeout, 0UL);
  442. if (etr_port0_online) {
  443. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  444. queue_work(time_sync_wq, &etr_work);
  445. }
  446. if (etr_port1_online) {
  447. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  448. queue_work(time_sync_wq, &etr_work);
  449. }
  450. return 0;
  451. }
  452. arch_initcall(etr_init);
  453. /*
  454. * Two sorts of ETR machine checks. The architecture reads:
  455. * "When a machine-check niterruption occurs and if a switch-to-local or
  456. * ETR-sync-check interrupt request is pending but disabled, this pending
  457. * disabled interruption request is indicated and is cleared".
  458. * Which means that we can get etr_switch_to_local events from the machine
  459. * check handler although the interruption condition is disabled. Lovely..
  460. */
  461. /*
  462. * Switch to local machine check. This is called when the last usable
  463. * ETR port goes inactive. After switch to local the clock is not in sync.
  464. */
  465. void etr_switch_to_local(void)
  466. {
  467. if (!etr_eacr.sl)
  468. return;
  469. disable_sync_clock(NULL);
  470. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  471. etr_eacr.es = etr_eacr.sl = 0;
  472. etr_setr(&etr_eacr);
  473. queue_work(time_sync_wq, &etr_work);
  474. }
  475. }
  476. /*
  477. * ETR sync check machine check. This is called when the ETR OTE and the
  478. * local clock OTE are farther apart than the ETR sync check tolerance.
  479. * After a ETR sync check the clock is not in sync. The machine check
  480. * is broadcasted to all cpus at the same time.
  481. */
  482. void etr_sync_check(void)
  483. {
  484. if (!etr_eacr.es)
  485. return;
  486. disable_sync_clock(NULL);
  487. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  488. etr_eacr.es = 0;
  489. etr_setr(&etr_eacr);
  490. queue_work(time_sync_wq, &etr_work);
  491. }
  492. }
  493. /*
  494. * ETR timing alert. There are two causes:
  495. * 1) port state change, check the usability of the port
  496. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  497. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  498. * or ETR-data word 4 (edf4) has changed.
  499. */
  500. static void etr_timing_alert(struct etr_irq_parm *intparm)
  501. {
  502. if (intparm->pc0)
  503. /* ETR port 0 state change. */
  504. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  505. if (intparm->pc1)
  506. /* ETR port 1 state change. */
  507. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  508. if (intparm->eai)
  509. /*
  510. * ETR port alert on either port 0, 1 or both.
  511. * Both ports are not up-to-date now.
  512. */
  513. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  514. queue_work(time_sync_wq, &etr_work);
  515. }
  516. static void etr_timeout(unsigned long dummy)
  517. {
  518. set_bit(ETR_EVENT_UPDATE, &etr_events);
  519. queue_work(time_sync_wq, &etr_work);
  520. }
  521. /*
  522. * Check if the etr mode is pss.
  523. */
  524. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  525. {
  526. return eacr.es && !eacr.sl;
  527. }
  528. /*
  529. * Check if the etr mode is etr.
  530. */
  531. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  532. {
  533. return eacr.es && eacr.sl;
  534. }
  535. /*
  536. * Check if the port can be used for TOD synchronization.
  537. * For PPS mode the port has to receive OTEs. For ETR mode
  538. * the port has to receive OTEs, the ETR stepping bit has to
  539. * be zero and the validity bits for data frame 1, 2, and 3
  540. * have to be 1.
  541. */
  542. static int etr_port_valid(struct etr_aib *aib, int port)
  543. {
  544. unsigned int psc;
  545. /* Check that this port is receiving OTEs. */
  546. if (aib->tsp == 0)
  547. return 0;
  548. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  549. if (psc == etr_lpsc_pps_mode)
  550. return 1;
  551. if (psc == etr_lpsc_operational_step)
  552. return !aib->esw.y && aib->slsw.v1 &&
  553. aib->slsw.v2 && aib->slsw.v3;
  554. return 0;
  555. }
  556. /*
  557. * Check if two ports are on the same network.
  558. */
  559. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  560. {
  561. // FIXME: any other fields we have to compare?
  562. return aib1->edf1.net_id == aib2->edf1.net_id;
  563. }
  564. /*
  565. * Wrapper for etr_stei that converts physical port states
  566. * to logical port states to be consistent with the output
  567. * of stetr (see etr_psc vs. etr_lpsc).
  568. */
  569. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  570. {
  571. BUG_ON(etr_steai(aib, func) != 0);
  572. /* Convert port state to logical port state. */
  573. if (aib->esw.psc0 == 1)
  574. aib->esw.psc0 = 2;
  575. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  576. aib->esw.psc0 = 1;
  577. if (aib->esw.psc1 == 1)
  578. aib->esw.psc1 = 2;
  579. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  580. aib->esw.psc1 = 1;
  581. }
  582. /*
  583. * Check if the aib a2 is still connected to the same attachment as
  584. * aib a1, the etv values differ by one and a2 is valid.
  585. */
  586. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  587. {
  588. int state_a1, state_a2;
  589. /* Paranoia check: e0/e1 should better be the same. */
  590. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  591. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  592. return 0;
  593. /* Still connected to the same etr ? */
  594. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  595. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  596. if (state_a1 == etr_lpsc_operational_step) {
  597. if (state_a2 != etr_lpsc_operational_step ||
  598. a1->edf1.net_id != a2->edf1.net_id ||
  599. a1->edf1.etr_id != a2->edf1.etr_id ||
  600. a1->edf1.etr_pn != a2->edf1.etr_pn)
  601. return 0;
  602. } else if (state_a2 != etr_lpsc_pps_mode)
  603. return 0;
  604. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  605. if (a1->edf2.etv + 1 != a2->edf2.etv)
  606. return 0;
  607. if (!etr_port_valid(a2, p))
  608. return 0;
  609. return 1;
  610. }
  611. struct clock_sync_data {
  612. atomic_t cpus;
  613. int in_sync;
  614. unsigned long long fixup_cc;
  615. int etr_port;
  616. struct etr_aib *etr_aib;
  617. };
  618. static void clock_sync_cpu(struct clock_sync_data *sync)
  619. {
  620. atomic_dec(&sync->cpus);
  621. enable_sync_clock();
  622. /*
  623. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  624. * is called on all other cpus while the TOD clocks is stopped.
  625. * __udelay will stop the cpu on an enabled wait psw until the
  626. * TOD is running again.
  627. */
  628. while (sync->in_sync == 0) {
  629. __udelay(1);
  630. /*
  631. * A different cpu changes *in_sync. Therefore use
  632. * barrier() to force memory access.
  633. */
  634. barrier();
  635. }
  636. if (sync->in_sync != 1)
  637. /* Didn't work. Clear per-cpu in sync bit again. */
  638. disable_sync_clock(NULL);
  639. /*
  640. * This round of TOD syncing is done. Set the clock comparator
  641. * to the next tick and let the processor continue.
  642. */
  643. fixup_clock_comparator(sync->fixup_cc);
  644. }
  645. /*
  646. * Sync the TOD clock using the port refered to by aibp. This port
  647. * has to be enabled and the other port has to be disabled. The
  648. * last eacr update has to be more than 1.6 seconds in the past.
  649. */
  650. static int etr_sync_clock(void *data)
  651. {
  652. static int first;
  653. unsigned long long clock, old_clock, delay, delta;
  654. struct clock_sync_data *etr_sync;
  655. struct etr_aib *sync_port, *aib;
  656. int port;
  657. int rc;
  658. etr_sync = data;
  659. if (xchg(&first, 1) == 1) {
  660. /* Slave */
  661. clock_sync_cpu(etr_sync);
  662. return 0;
  663. }
  664. /* Wait until all other cpus entered the sync function. */
  665. while (atomic_read(&etr_sync->cpus) != 0)
  666. cpu_relax();
  667. port = etr_sync->etr_port;
  668. aib = etr_sync->etr_aib;
  669. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  670. enable_sync_clock();
  671. /* Set clock to next OTE. */
  672. __ctl_set_bit(14, 21);
  673. __ctl_set_bit(0, 29);
  674. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  675. old_clock = get_clock();
  676. if (set_clock(clock) == 0) {
  677. __udelay(1); /* Wait for the clock to start. */
  678. __ctl_clear_bit(0, 29);
  679. __ctl_clear_bit(14, 21);
  680. etr_stetr(aib);
  681. /* Adjust Linux timing variables. */
  682. delay = (unsigned long long)
  683. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  684. delta = adjust_time(old_clock, clock, delay);
  685. etr_sync->fixup_cc = delta;
  686. fixup_clock_comparator(delta);
  687. /* Verify that the clock is properly set. */
  688. if (!etr_aib_follows(sync_port, aib, port)) {
  689. /* Didn't work. */
  690. disable_sync_clock(NULL);
  691. etr_sync->in_sync = -EAGAIN;
  692. rc = -EAGAIN;
  693. } else {
  694. etr_sync->in_sync = 1;
  695. rc = 0;
  696. }
  697. } else {
  698. /* Could not set the clock ?!? */
  699. __ctl_clear_bit(0, 29);
  700. __ctl_clear_bit(14, 21);
  701. disable_sync_clock(NULL);
  702. etr_sync->in_sync = -EAGAIN;
  703. rc = -EAGAIN;
  704. }
  705. xchg(&first, 0);
  706. return rc;
  707. }
  708. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  709. {
  710. struct clock_sync_data etr_sync;
  711. struct etr_aib *sync_port;
  712. int follows;
  713. int rc;
  714. /* Check if the current aib is adjacent to the sync port aib. */
  715. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  716. follows = etr_aib_follows(sync_port, aib, port);
  717. memcpy(sync_port, aib, sizeof(*aib));
  718. if (!follows)
  719. return -EAGAIN;
  720. memset(&etr_sync, 0, sizeof(etr_sync));
  721. etr_sync.etr_aib = aib;
  722. etr_sync.etr_port = port;
  723. get_online_cpus();
  724. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  725. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  726. put_online_cpus();
  727. return rc;
  728. }
  729. /*
  730. * Handle the immediate effects of the different events.
  731. * The port change event is used for online/offline changes.
  732. */
  733. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  734. {
  735. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  736. eacr.es = 0;
  737. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  738. eacr.es = eacr.sl = 0;
  739. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  740. etr_port0_uptodate = etr_port1_uptodate = 0;
  741. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  742. if (eacr.e0)
  743. /*
  744. * Port change of an enabled port. We have to
  745. * assume that this can have caused an stepping
  746. * port switch.
  747. */
  748. etr_tolec = get_clock();
  749. eacr.p0 = etr_port0_online;
  750. if (!eacr.p0)
  751. eacr.e0 = 0;
  752. etr_port0_uptodate = 0;
  753. }
  754. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  755. if (eacr.e1)
  756. /*
  757. * Port change of an enabled port. We have to
  758. * assume that this can have caused an stepping
  759. * port switch.
  760. */
  761. etr_tolec = get_clock();
  762. eacr.p1 = etr_port1_online;
  763. if (!eacr.p1)
  764. eacr.e1 = 0;
  765. etr_port1_uptodate = 0;
  766. }
  767. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  768. return eacr;
  769. }
  770. /*
  771. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  772. * one of the ports needs an update.
  773. */
  774. static void etr_set_tolec_timeout(unsigned long long now)
  775. {
  776. unsigned long micros;
  777. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  778. (!etr_eacr.p1 || etr_port1_uptodate))
  779. return;
  780. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  781. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  782. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  783. }
  784. /*
  785. * Set up a time that expires after 1/2 second.
  786. */
  787. static void etr_set_sync_timeout(void)
  788. {
  789. mod_timer(&etr_timer, jiffies + HZ/2);
  790. }
  791. /*
  792. * Update the aib information for one or both ports.
  793. */
  794. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  795. struct etr_eacr eacr)
  796. {
  797. /* With both ports disabled the aib information is useless. */
  798. if (!eacr.e0 && !eacr.e1)
  799. return eacr;
  800. /* Update port0 or port1 with aib stored in etr_work_fn. */
  801. if (aib->esw.q == 0) {
  802. /* Information for port 0 stored. */
  803. if (eacr.p0 && !etr_port0_uptodate) {
  804. etr_port0 = *aib;
  805. if (etr_port0_online)
  806. etr_port0_uptodate = 1;
  807. }
  808. } else {
  809. /* Information for port 1 stored. */
  810. if (eacr.p1 && !etr_port1_uptodate) {
  811. etr_port1 = *aib;
  812. if (etr_port0_online)
  813. etr_port1_uptodate = 1;
  814. }
  815. }
  816. /*
  817. * Do not try to get the alternate port aib if the clock
  818. * is not in sync yet.
  819. */
  820. if (!eacr.es || !check_sync_clock())
  821. return eacr;
  822. /*
  823. * If steai is available we can get the information about
  824. * the other port immediately. If only stetr is available the
  825. * data-port bit toggle has to be used.
  826. */
  827. if (etr_steai_available) {
  828. if (eacr.p0 && !etr_port0_uptodate) {
  829. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  830. etr_port0_uptodate = 1;
  831. }
  832. if (eacr.p1 && !etr_port1_uptodate) {
  833. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  834. etr_port1_uptodate = 1;
  835. }
  836. } else {
  837. /*
  838. * One port was updated above, if the other
  839. * port is not uptodate toggle dp bit.
  840. */
  841. if ((eacr.p0 && !etr_port0_uptodate) ||
  842. (eacr.p1 && !etr_port1_uptodate))
  843. eacr.dp ^= 1;
  844. else
  845. eacr.dp = 0;
  846. }
  847. return eacr;
  848. }
  849. /*
  850. * Write new etr control register if it differs from the current one.
  851. * Return 1 if etr_tolec has been updated as well.
  852. */
  853. static void etr_update_eacr(struct etr_eacr eacr)
  854. {
  855. int dp_changed;
  856. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  857. /* No change, return. */
  858. return;
  859. /*
  860. * The disable of an active port of the change of the data port
  861. * bit can/will cause a change in the data port.
  862. */
  863. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  864. (etr_eacr.dp ^ eacr.dp) != 0;
  865. etr_eacr = eacr;
  866. etr_setr(&etr_eacr);
  867. if (dp_changed)
  868. etr_tolec = get_clock();
  869. }
  870. /*
  871. * ETR work. In this function you'll find the main logic. In
  872. * particular this is the only function that calls etr_update_eacr(),
  873. * it "controls" the etr control register.
  874. */
  875. static void etr_work_fn(struct work_struct *work)
  876. {
  877. unsigned long long now;
  878. struct etr_eacr eacr;
  879. struct etr_aib aib;
  880. int sync_port;
  881. /* prevent multiple execution. */
  882. mutex_lock(&etr_work_mutex);
  883. /* Create working copy of etr_eacr. */
  884. eacr = etr_eacr;
  885. /* Check for the different events and their immediate effects. */
  886. eacr = etr_handle_events(eacr);
  887. /* Check if ETR is supposed to be active. */
  888. eacr.ea = eacr.p0 || eacr.p1;
  889. if (!eacr.ea) {
  890. /* Both ports offline. Reset everything. */
  891. eacr.dp = eacr.es = eacr.sl = 0;
  892. on_each_cpu(disable_sync_clock, NULL, 1);
  893. del_timer_sync(&etr_timer);
  894. etr_update_eacr(eacr);
  895. goto out_unlock;
  896. }
  897. /* Store aib to get the current ETR status word. */
  898. BUG_ON(etr_stetr(&aib) != 0);
  899. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  900. now = get_clock();
  901. /*
  902. * Update the port information if the last stepping port change
  903. * or data port change is older than 1.6 seconds.
  904. */
  905. if (now >= etr_tolec + (1600000 << 12))
  906. eacr = etr_handle_update(&aib, eacr);
  907. /*
  908. * Select ports to enable. The prefered synchronization mode is PPS.
  909. * If a port can be enabled depends on a number of things:
  910. * 1) The port needs to be online and uptodate. A port is not
  911. * disabled just because it is not uptodate, but it is only
  912. * enabled if it is uptodate.
  913. * 2) The port needs to have the same mode (pps / etr).
  914. * 3) The port needs to be usable -> etr_port_valid() == 1
  915. * 4) To enable the second port the clock needs to be in sync.
  916. * 5) If both ports are useable and are ETR ports, the network id
  917. * has to be the same.
  918. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  919. */
  920. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  921. eacr.sl = 0;
  922. eacr.e0 = 1;
  923. if (!etr_mode_is_pps(etr_eacr))
  924. eacr.es = 0;
  925. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  926. eacr.e1 = 0;
  927. // FIXME: uptodate checks ?
  928. else if (etr_port0_uptodate && etr_port1_uptodate)
  929. eacr.e1 = 1;
  930. sync_port = (etr_port0_uptodate &&
  931. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  932. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  933. eacr.sl = 0;
  934. eacr.e0 = 0;
  935. eacr.e1 = 1;
  936. if (!etr_mode_is_pps(etr_eacr))
  937. eacr.es = 0;
  938. sync_port = (etr_port1_uptodate &&
  939. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  940. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  941. eacr.sl = 1;
  942. eacr.e0 = 1;
  943. if (!etr_mode_is_etr(etr_eacr))
  944. eacr.es = 0;
  945. if (!eacr.es || !eacr.p1 ||
  946. aib.esw.psc1 != etr_lpsc_operational_alt)
  947. eacr.e1 = 0;
  948. else if (etr_port0_uptodate && etr_port1_uptodate &&
  949. etr_compare_network(&etr_port0, &etr_port1))
  950. eacr.e1 = 1;
  951. sync_port = (etr_port0_uptodate &&
  952. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  953. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  954. eacr.sl = 1;
  955. eacr.e0 = 0;
  956. eacr.e1 = 1;
  957. if (!etr_mode_is_etr(etr_eacr))
  958. eacr.es = 0;
  959. sync_port = (etr_port1_uptodate &&
  960. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  961. } else {
  962. /* Both ports not usable. */
  963. eacr.es = eacr.sl = 0;
  964. sync_port = -1;
  965. }
  966. /*
  967. * If the clock is in sync just update the eacr and return.
  968. * If there is no valid sync port wait for a port update.
  969. */
  970. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  971. etr_update_eacr(eacr);
  972. etr_set_tolec_timeout(now);
  973. goto out_unlock;
  974. }
  975. /*
  976. * Prepare control register for clock syncing
  977. * (reset data port bit, set sync check control.
  978. */
  979. eacr.dp = 0;
  980. eacr.es = 1;
  981. /*
  982. * Update eacr and try to synchronize the clock. If the update
  983. * of eacr caused a stepping port switch (or if we have to
  984. * assume that a stepping port switch has occured) or the
  985. * clock syncing failed, reset the sync check control bit
  986. * and set up a timer to try again after 0.5 seconds
  987. */
  988. etr_update_eacr(eacr);
  989. if (now < etr_tolec + (1600000 << 12) ||
  990. etr_sync_clock_stop(&aib, sync_port) != 0) {
  991. /* Sync failed. Try again in 1/2 second. */
  992. eacr.es = 0;
  993. etr_update_eacr(eacr);
  994. etr_set_sync_timeout();
  995. } else
  996. etr_set_tolec_timeout(now);
  997. out_unlock:
  998. mutex_unlock(&etr_work_mutex);
  999. }
  1000. /*
  1001. * Sysfs interface functions
  1002. */
  1003. static struct sysdev_class etr_sysclass = {
  1004. .name = "etr",
  1005. };
  1006. static struct sys_device etr_port0_dev = {
  1007. .id = 0,
  1008. .cls = &etr_sysclass,
  1009. };
  1010. static struct sys_device etr_port1_dev = {
  1011. .id = 1,
  1012. .cls = &etr_sysclass,
  1013. };
  1014. /*
  1015. * ETR class attributes
  1016. */
  1017. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1018. struct sysdev_class_attribute *attr,
  1019. char *buf)
  1020. {
  1021. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1022. }
  1023. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1024. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1025. struct sysdev_class_attribute *attr,
  1026. char *buf)
  1027. {
  1028. char *mode_str;
  1029. if (etr_mode_is_pps(etr_eacr))
  1030. mode_str = "pps";
  1031. else if (etr_mode_is_etr(etr_eacr))
  1032. mode_str = "etr";
  1033. else
  1034. mode_str = "local";
  1035. return sprintf(buf, "%s\n", mode_str);
  1036. }
  1037. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1038. /*
  1039. * ETR port attributes
  1040. */
  1041. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1042. {
  1043. if (dev == &etr_port0_dev)
  1044. return etr_port0_online ? &etr_port0 : NULL;
  1045. else
  1046. return etr_port1_online ? &etr_port1 : NULL;
  1047. }
  1048. static ssize_t etr_online_show(struct sys_device *dev,
  1049. struct sysdev_attribute *attr,
  1050. char *buf)
  1051. {
  1052. unsigned int online;
  1053. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1054. return sprintf(buf, "%i\n", online);
  1055. }
  1056. static ssize_t etr_online_store(struct sys_device *dev,
  1057. struct sysdev_attribute *attr,
  1058. const char *buf, size_t count)
  1059. {
  1060. unsigned int value;
  1061. value = simple_strtoul(buf, NULL, 0);
  1062. if (value != 0 && value != 1)
  1063. return -EINVAL;
  1064. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1065. return -EOPNOTSUPP;
  1066. mutex_lock(&clock_sync_mutex);
  1067. if (dev == &etr_port0_dev) {
  1068. if (etr_port0_online == value)
  1069. goto out; /* Nothing to do. */
  1070. etr_port0_online = value;
  1071. if (etr_port0_online && etr_port1_online)
  1072. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1073. else
  1074. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1075. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1076. queue_work(time_sync_wq, &etr_work);
  1077. } else {
  1078. if (etr_port1_online == value)
  1079. goto out; /* Nothing to do. */
  1080. etr_port1_online = value;
  1081. if (etr_port0_online && etr_port1_online)
  1082. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1083. else
  1084. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1085. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1086. queue_work(time_sync_wq, &etr_work);
  1087. }
  1088. out:
  1089. mutex_unlock(&clock_sync_mutex);
  1090. return count;
  1091. }
  1092. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1093. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1094. struct sysdev_attribute *attr,
  1095. char *buf)
  1096. {
  1097. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1098. etr_eacr.e0 : etr_eacr.e1);
  1099. }
  1100. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1101. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1102. struct sysdev_attribute *attr, char *buf)
  1103. {
  1104. if (!etr_port0_online && !etr_port1_online)
  1105. /* Status word is not uptodate if both ports are offline. */
  1106. return -ENODATA;
  1107. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1108. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1109. }
  1110. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1111. static ssize_t etr_untuned_show(struct sys_device *dev,
  1112. struct sysdev_attribute *attr, char *buf)
  1113. {
  1114. struct etr_aib *aib = etr_aib_from_dev(dev);
  1115. if (!aib || !aib->slsw.v1)
  1116. return -ENODATA;
  1117. return sprintf(buf, "%i\n", aib->edf1.u);
  1118. }
  1119. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1120. static ssize_t etr_network_id_show(struct sys_device *dev,
  1121. struct sysdev_attribute *attr, char *buf)
  1122. {
  1123. struct etr_aib *aib = etr_aib_from_dev(dev);
  1124. if (!aib || !aib->slsw.v1)
  1125. return -ENODATA;
  1126. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1127. }
  1128. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1129. static ssize_t etr_id_show(struct sys_device *dev,
  1130. struct sysdev_attribute *attr, char *buf)
  1131. {
  1132. struct etr_aib *aib = etr_aib_from_dev(dev);
  1133. if (!aib || !aib->slsw.v1)
  1134. return -ENODATA;
  1135. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1136. }
  1137. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1138. static ssize_t etr_port_number_show(struct sys_device *dev,
  1139. struct sysdev_attribute *attr, char *buf)
  1140. {
  1141. struct etr_aib *aib = etr_aib_from_dev(dev);
  1142. if (!aib || !aib->slsw.v1)
  1143. return -ENODATA;
  1144. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1145. }
  1146. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1147. static ssize_t etr_coupled_show(struct sys_device *dev,
  1148. struct sysdev_attribute *attr, char *buf)
  1149. {
  1150. struct etr_aib *aib = etr_aib_from_dev(dev);
  1151. if (!aib || !aib->slsw.v3)
  1152. return -ENODATA;
  1153. return sprintf(buf, "%i\n", aib->edf3.c);
  1154. }
  1155. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1156. static ssize_t etr_local_time_show(struct sys_device *dev,
  1157. struct sysdev_attribute *attr, char *buf)
  1158. {
  1159. struct etr_aib *aib = etr_aib_from_dev(dev);
  1160. if (!aib || !aib->slsw.v3)
  1161. return -ENODATA;
  1162. return sprintf(buf, "%i\n", aib->edf3.blto);
  1163. }
  1164. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1165. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1166. struct sysdev_attribute *attr, char *buf)
  1167. {
  1168. struct etr_aib *aib = etr_aib_from_dev(dev);
  1169. if (!aib || !aib->slsw.v3)
  1170. return -ENODATA;
  1171. return sprintf(buf, "%i\n", aib->edf3.buo);
  1172. }
  1173. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1174. static struct sysdev_attribute *etr_port_attributes[] = {
  1175. &attr_online,
  1176. &attr_stepping_control,
  1177. &attr_state_code,
  1178. &attr_untuned,
  1179. &attr_network,
  1180. &attr_id,
  1181. &attr_port,
  1182. &attr_coupled,
  1183. &attr_local_time,
  1184. &attr_utc_offset,
  1185. NULL
  1186. };
  1187. static int __init etr_register_port(struct sys_device *dev)
  1188. {
  1189. struct sysdev_attribute **attr;
  1190. int rc;
  1191. rc = sysdev_register(dev);
  1192. if (rc)
  1193. goto out;
  1194. for (attr = etr_port_attributes; *attr; attr++) {
  1195. rc = sysdev_create_file(dev, *attr);
  1196. if (rc)
  1197. goto out_unreg;
  1198. }
  1199. return 0;
  1200. out_unreg:
  1201. for (; attr >= etr_port_attributes; attr--)
  1202. sysdev_remove_file(dev, *attr);
  1203. sysdev_unregister(dev);
  1204. out:
  1205. return rc;
  1206. }
  1207. static void __init etr_unregister_port(struct sys_device *dev)
  1208. {
  1209. struct sysdev_attribute **attr;
  1210. for (attr = etr_port_attributes; *attr; attr++)
  1211. sysdev_remove_file(dev, *attr);
  1212. sysdev_unregister(dev);
  1213. }
  1214. static int __init etr_init_sysfs(void)
  1215. {
  1216. int rc;
  1217. rc = sysdev_class_register(&etr_sysclass);
  1218. if (rc)
  1219. goto out;
  1220. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1221. if (rc)
  1222. goto out_unreg_class;
  1223. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1224. if (rc)
  1225. goto out_remove_stepping_port;
  1226. rc = etr_register_port(&etr_port0_dev);
  1227. if (rc)
  1228. goto out_remove_stepping_mode;
  1229. rc = etr_register_port(&etr_port1_dev);
  1230. if (rc)
  1231. goto out_remove_port0;
  1232. return 0;
  1233. out_remove_port0:
  1234. etr_unregister_port(&etr_port0_dev);
  1235. out_remove_stepping_mode:
  1236. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1237. out_remove_stepping_port:
  1238. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1239. out_unreg_class:
  1240. sysdev_class_unregister(&etr_sysclass);
  1241. out:
  1242. return rc;
  1243. }
  1244. device_initcall(etr_init_sysfs);
  1245. /*
  1246. * Server Time Protocol (STP) code.
  1247. */
  1248. static int stp_online;
  1249. static struct stp_sstpi stp_info;
  1250. static void *stp_page;
  1251. static void stp_work_fn(struct work_struct *work);
  1252. static DEFINE_MUTEX(stp_work_mutex);
  1253. static DECLARE_WORK(stp_work, stp_work_fn);
  1254. static struct timer_list stp_timer;
  1255. static int __init early_parse_stp(char *p)
  1256. {
  1257. if (strncmp(p, "off", 3) == 0)
  1258. stp_online = 0;
  1259. else if (strncmp(p, "on", 2) == 0)
  1260. stp_online = 1;
  1261. return 0;
  1262. }
  1263. early_param("stp", early_parse_stp);
  1264. /*
  1265. * Reset STP attachment.
  1266. */
  1267. static void __init stp_reset(void)
  1268. {
  1269. int rc;
  1270. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1271. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1272. if (rc == 0)
  1273. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1274. else if (stp_online) {
  1275. pr_warning("The real or virtual hardware system does "
  1276. "not provide an STP interface\n");
  1277. free_page((unsigned long) stp_page);
  1278. stp_page = NULL;
  1279. stp_online = 0;
  1280. }
  1281. }
  1282. static void stp_timeout(unsigned long dummy)
  1283. {
  1284. queue_work(time_sync_wq, &stp_work);
  1285. }
  1286. static int __init stp_init(void)
  1287. {
  1288. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1289. return 0;
  1290. setup_timer(&stp_timer, stp_timeout, 0UL);
  1291. time_init_wq();
  1292. if (!stp_online)
  1293. return 0;
  1294. queue_work(time_sync_wq, &stp_work);
  1295. return 0;
  1296. }
  1297. arch_initcall(stp_init);
  1298. /*
  1299. * STP timing alert. There are three causes:
  1300. * 1) timing status change
  1301. * 2) link availability change
  1302. * 3) time control parameter change
  1303. * In all three cases we are only interested in the clock source state.
  1304. * If a STP clock source is now available use it.
  1305. */
  1306. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1307. {
  1308. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1309. queue_work(time_sync_wq, &stp_work);
  1310. }
  1311. /*
  1312. * STP sync check machine check. This is called when the timing state
  1313. * changes from the synchronized state to the unsynchronized state.
  1314. * After a STP sync check the clock is not in sync. The machine check
  1315. * is broadcasted to all cpus at the same time.
  1316. */
  1317. void stp_sync_check(void)
  1318. {
  1319. disable_sync_clock(NULL);
  1320. queue_work(time_sync_wq, &stp_work);
  1321. }
  1322. /*
  1323. * STP island condition machine check. This is called when an attached
  1324. * server attempts to communicate over an STP link and the servers
  1325. * have matching CTN ids and have a valid stratum-1 configuration
  1326. * but the configurations do not match.
  1327. */
  1328. void stp_island_check(void)
  1329. {
  1330. disable_sync_clock(NULL);
  1331. queue_work(time_sync_wq, &stp_work);
  1332. }
  1333. static int stp_sync_clock(void *data)
  1334. {
  1335. static int first;
  1336. unsigned long long old_clock, delta;
  1337. struct clock_sync_data *stp_sync;
  1338. int rc;
  1339. stp_sync = data;
  1340. if (xchg(&first, 1) == 1) {
  1341. /* Slave */
  1342. clock_sync_cpu(stp_sync);
  1343. return 0;
  1344. }
  1345. /* Wait until all other cpus entered the sync function. */
  1346. while (atomic_read(&stp_sync->cpus) != 0)
  1347. cpu_relax();
  1348. enable_sync_clock();
  1349. rc = 0;
  1350. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1351. stp_info.todoff[2] || stp_info.todoff[3] ||
  1352. stp_info.tmd != 2) {
  1353. old_clock = get_clock();
  1354. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1355. if (rc == 0) {
  1356. delta = adjust_time(old_clock, get_clock(), 0);
  1357. fixup_clock_comparator(delta);
  1358. rc = chsc_sstpi(stp_page, &stp_info,
  1359. sizeof(struct stp_sstpi));
  1360. if (rc == 0 && stp_info.tmd != 2)
  1361. rc = -EAGAIN;
  1362. }
  1363. }
  1364. if (rc) {
  1365. disable_sync_clock(NULL);
  1366. stp_sync->in_sync = -EAGAIN;
  1367. } else
  1368. stp_sync->in_sync = 1;
  1369. xchg(&first, 0);
  1370. return 0;
  1371. }
  1372. /*
  1373. * STP work. Check for the STP state and take over the clock
  1374. * synchronization if the STP clock source is usable.
  1375. */
  1376. static void stp_work_fn(struct work_struct *work)
  1377. {
  1378. struct clock_sync_data stp_sync;
  1379. int rc;
  1380. /* prevent multiple execution. */
  1381. mutex_lock(&stp_work_mutex);
  1382. if (!stp_online) {
  1383. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1384. del_timer_sync(&stp_timer);
  1385. goto out_unlock;
  1386. }
  1387. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1388. if (rc)
  1389. goto out_unlock;
  1390. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1391. if (rc || stp_info.c == 0)
  1392. goto out_unlock;
  1393. /* Skip synchronization if the clock is already in sync. */
  1394. if (check_sync_clock())
  1395. goto out_unlock;
  1396. memset(&stp_sync, 0, sizeof(stp_sync));
  1397. get_online_cpus();
  1398. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1399. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1400. put_online_cpus();
  1401. if (!check_sync_clock())
  1402. /*
  1403. * There is a usable clock but the synchonization failed.
  1404. * Retry after a second.
  1405. */
  1406. mod_timer(&stp_timer, jiffies + HZ);
  1407. out_unlock:
  1408. mutex_unlock(&stp_work_mutex);
  1409. }
  1410. /*
  1411. * STP class sysfs interface functions
  1412. */
  1413. static struct sysdev_class stp_sysclass = {
  1414. .name = "stp",
  1415. };
  1416. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1417. struct sysdev_class_attribute *attr,
  1418. char *buf)
  1419. {
  1420. if (!stp_online)
  1421. return -ENODATA;
  1422. return sprintf(buf, "%016llx\n",
  1423. *(unsigned long long *) stp_info.ctnid);
  1424. }
  1425. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1426. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1427. struct sysdev_class_attribute *attr,
  1428. char *buf)
  1429. {
  1430. if (!stp_online)
  1431. return -ENODATA;
  1432. return sprintf(buf, "%i\n", stp_info.ctn);
  1433. }
  1434. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1435. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1436. struct sysdev_class_attribute *attr,
  1437. char *buf)
  1438. {
  1439. if (!stp_online || !(stp_info.vbits & 0x2000))
  1440. return -ENODATA;
  1441. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1442. }
  1443. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1444. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1445. struct sysdev_class_attribute *attr,
  1446. char *buf)
  1447. {
  1448. if (!stp_online || !(stp_info.vbits & 0x8000))
  1449. return -ENODATA;
  1450. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1451. }
  1452. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1453. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1454. struct sysdev_class_attribute *attr,
  1455. char *buf)
  1456. {
  1457. if (!stp_online)
  1458. return -ENODATA;
  1459. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1460. }
  1461. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1462. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1463. struct sysdev_class_attribute *attr,
  1464. char *buf)
  1465. {
  1466. if (!stp_online || !(stp_info.vbits & 0x0800))
  1467. return -ENODATA;
  1468. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1469. }
  1470. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1471. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1472. struct sysdev_class_attribute *attr,
  1473. char *buf)
  1474. {
  1475. if (!stp_online || !(stp_info.vbits & 0x4000))
  1476. return -ENODATA;
  1477. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1478. }
  1479. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1480. stp_time_zone_offset_show, NULL);
  1481. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1482. struct sysdev_class_attribute *attr,
  1483. char *buf)
  1484. {
  1485. if (!stp_online)
  1486. return -ENODATA;
  1487. return sprintf(buf, "%i\n", stp_info.tmd);
  1488. }
  1489. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1490. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1491. struct sysdev_class_attribute *attr,
  1492. char *buf)
  1493. {
  1494. if (!stp_online)
  1495. return -ENODATA;
  1496. return sprintf(buf, "%i\n", stp_info.tst);
  1497. }
  1498. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1499. static ssize_t stp_online_show(struct sysdev_class *class,
  1500. struct sysdev_class_attribute *attr,
  1501. char *buf)
  1502. {
  1503. return sprintf(buf, "%i\n", stp_online);
  1504. }
  1505. static ssize_t stp_online_store(struct sysdev_class *class,
  1506. struct sysdev_class_attribute *attr,
  1507. const char *buf, size_t count)
  1508. {
  1509. unsigned int value;
  1510. value = simple_strtoul(buf, NULL, 0);
  1511. if (value != 0 && value != 1)
  1512. return -EINVAL;
  1513. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1514. return -EOPNOTSUPP;
  1515. mutex_lock(&clock_sync_mutex);
  1516. stp_online = value;
  1517. if (stp_online)
  1518. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1519. else
  1520. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1521. queue_work(time_sync_wq, &stp_work);
  1522. mutex_unlock(&clock_sync_mutex);
  1523. return count;
  1524. }
  1525. /*
  1526. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1527. * stp/online but attr_online already exists in this file ..
  1528. */
  1529. static struct sysdev_class_attribute attr_stp_online = {
  1530. .attr = { .name = "online", .mode = 0600 },
  1531. .show = stp_online_show,
  1532. .store = stp_online_store,
  1533. };
  1534. static struct sysdev_class_attribute *stp_attributes[] = {
  1535. &attr_ctn_id,
  1536. &attr_ctn_type,
  1537. &attr_dst_offset,
  1538. &attr_leap_seconds,
  1539. &attr_stp_online,
  1540. &attr_stratum,
  1541. &attr_time_offset,
  1542. &attr_time_zone_offset,
  1543. &attr_timing_mode,
  1544. &attr_timing_state,
  1545. NULL
  1546. };
  1547. static int __init stp_init_sysfs(void)
  1548. {
  1549. struct sysdev_class_attribute **attr;
  1550. int rc;
  1551. rc = sysdev_class_register(&stp_sysclass);
  1552. if (rc)
  1553. goto out;
  1554. for (attr = stp_attributes; *attr; attr++) {
  1555. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1556. if (rc)
  1557. goto out_unreg;
  1558. }
  1559. return 0;
  1560. out_unreg:
  1561. for (; attr >= stp_attributes; attr--)
  1562. sysdev_class_remove_file(&stp_sysclass, *attr);
  1563. sysdev_class_unregister(&stp_sysclass);
  1564. out:
  1565. return rc;
  1566. }
  1567. device_initcall(stp_init_sysfs);