atomic.h 7.4 KB

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  1. #ifndef __ARCH_S390_ATOMIC__
  2. #define __ARCH_S390_ATOMIC__
  3. /*
  4. * Copyright 1999,2009 IBM Corp.
  5. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
  6. * Denis Joseph Barrow,
  7. * Arnd Bergmann <arndb@de.ibm.com>,
  8. *
  9. * Atomic operations that C can't guarantee us.
  10. * Useful for resource counting etc.
  11. * s390 uses 'Compare And Swap' for atomicity in SMP enviroment.
  12. *
  13. */
  14. #include <linux/compiler.h>
  15. #include <linux/types.h>
  16. #include <asm/system.h>
  17. #define ATOMIC_INIT(i) { (i) }
  18. #define __CS_LOOP(ptr, op_val, op_string) ({ \
  19. int old_val, new_val; \
  20. asm volatile( \
  21. " l %0,%2\n" \
  22. "0: lr %1,%0\n" \
  23. op_string " %1,%3\n" \
  24. " cs %0,%1,%2\n" \
  25. " jl 0b" \
  26. : "=&d" (old_val), "=&d" (new_val), \
  27. "=Q" (((atomic_t *)(ptr))->counter) \
  28. : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
  29. : "cc", "memory"); \
  30. new_val; \
  31. })
  32. static inline int atomic_read(const atomic_t *v)
  33. {
  34. int c;
  35. asm volatile(
  36. " l %0,%1\n"
  37. : "=d" (c) : "Q" (v->counter));
  38. return c;
  39. }
  40. static inline void atomic_set(atomic_t *v, int i)
  41. {
  42. asm volatile(
  43. " st %1,%0\n"
  44. : "=Q" (v->counter) : "d" (i));
  45. }
  46. static inline int atomic_add_return(int i, atomic_t *v)
  47. {
  48. return __CS_LOOP(v, i, "ar");
  49. }
  50. #define atomic_add(_i, _v) atomic_add_return(_i, _v)
  51. #define atomic_add_negative(_i, _v) (atomic_add_return(_i, _v) < 0)
  52. #define atomic_inc(_v) atomic_add_return(1, _v)
  53. #define atomic_inc_return(_v) atomic_add_return(1, _v)
  54. #define atomic_inc_and_test(_v) (atomic_add_return(1, _v) == 0)
  55. static inline int atomic_sub_return(int i, atomic_t *v)
  56. {
  57. return __CS_LOOP(v, i, "sr");
  58. }
  59. #define atomic_sub(_i, _v) atomic_sub_return(_i, _v)
  60. #define atomic_sub_and_test(_i, _v) (atomic_sub_return(_i, _v) == 0)
  61. #define atomic_dec(_v) atomic_sub_return(1, _v)
  62. #define atomic_dec_return(_v) atomic_sub_return(1, _v)
  63. #define atomic_dec_and_test(_v) (atomic_sub_return(1, _v) == 0)
  64. static inline void atomic_clear_mask(unsigned long mask, atomic_t *v)
  65. {
  66. __CS_LOOP(v, ~mask, "nr");
  67. }
  68. static inline void atomic_set_mask(unsigned long mask, atomic_t *v)
  69. {
  70. __CS_LOOP(v, mask, "or");
  71. }
  72. #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
  73. static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
  74. {
  75. asm volatile(
  76. " cs %0,%2,%1"
  77. : "+d" (old), "=Q" (v->counter)
  78. : "d" (new), "Q" (v->counter)
  79. : "cc", "memory");
  80. return old;
  81. }
  82. static inline int atomic_add_unless(atomic_t *v, int a, int u)
  83. {
  84. int c, old;
  85. c = atomic_read(v);
  86. for (;;) {
  87. if (unlikely(c == u))
  88. break;
  89. old = atomic_cmpxchg(v, c, c + a);
  90. if (likely(old == c))
  91. break;
  92. c = old;
  93. }
  94. return c != u;
  95. }
  96. #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
  97. #undef __CS_LOOP
  98. #define ATOMIC64_INIT(i) { (i) }
  99. #ifdef CONFIG_64BIT
  100. #define __CSG_LOOP(ptr, op_val, op_string) ({ \
  101. long long old_val, new_val; \
  102. asm volatile( \
  103. " lg %0,%2\n" \
  104. "0: lgr %1,%0\n" \
  105. op_string " %1,%3\n" \
  106. " csg %0,%1,%2\n" \
  107. " jl 0b" \
  108. : "=&d" (old_val), "=&d" (new_val), \
  109. "=Q" (((atomic_t *)(ptr))->counter) \
  110. : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
  111. : "cc", "memory"); \
  112. new_val; \
  113. })
  114. static inline long long atomic64_read(const atomic64_t *v)
  115. {
  116. long long c;
  117. asm volatile(
  118. " lg %0,%1\n"
  119. : "=d" (c) : "Q" (v->counter));
  120. return c;
  121. }
  122. static inline void atomic64_set(atomic64_t *v, long long i)
  123. {
  124. asm volatile(
  125. " stg %1,%0\n"
  126. : "=Q" (v->counter) : "d" (i));
  127. }
  128. static inline long long atomic64_add_return(long long i, atomic64_t *v)
  129. {
  130. return __CSG_LOOP(v, i, "agr");
  131. }
  132. static inline long long atomic64_sub_return(long long i, atomic64_t *v)
  133. {
  134. return __CSG_LOOP(v, i, "sgr");
  135. }
  136. static inline void atomic64_clear_mask(unsigned long mask, atomic64_t *v)
  137. {
  138. __CSG_LOOP(v, ~mask, "ngr");
  139. }
  140. static inline void atomic64_set_mask(unsigned long mask, atomic64_t *v)
  141. {
  142. __CSG_LOOP(v, mask, "ogr");
  143. }
  144. #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
  145. static inline long long atomic64_cmpxchg(atomic64_t *v,
  146. long long old, long long new)
  147. {
  148. asm volatile(
  149. " csg %0,%2,%1"
  150. : "+d" (old), "=Q" (v->counter)
  151. : "d" (new), "Q" (v->counter)
  152. : "cc", "memory");
  153. return old;
  154. }
  155. #undef __CSG_LOOP
  156. #else /* CONFIG_64BIT */
  157. typedef struct {
  158. long long counter;
  159. } atomic64_t;
  160. static inline long long atomic64_read(const atomic64_t *v)
  161. {
  162. register_pair rp;
  163. asm volatile(
  164. " lm %0,%N0,%1"
  165. : "=&d" (rp) : "Q" (v->counter) );
  166. return rp.pair;
  167. }
  168. static inline void atomic64_set(atomic64_t *v, long long i)
  169. {
  170. register_pair rp = {.pair = i};
  171. asm volatile(
  172. " stm %1,%N1,%0"
  173. : "=Q" (v->counter) : "d" (rp) );
  174. }
  175. static inline long long atomic64_xchg(atomic64_t *v, long long new)
  176. {
  177. register_pair rp_new = {.pair = new};
  178. register_pair rp_old;
  179. asm volatile(
  180. " lm %0,%N0,%1\n"
  181. "0: cds %0,%2,%1\n"
  182. " jl 0b\n"
  183. : "=&d" (rp_old), "=Q" (v->counter)
  184. : "d" (rp_new), "Q" (v->counter)
  185. : "cc");
  186. return rp_old.pair;
  187. }
  188. static inline long long atomic64_cmpxchg(atomic64_t *v,
  189. long long old, long long new)
  190. {
  191. register_pair rp_old = {.pair = old};
  192. register_pair rp_new = {.pair = new};
  193. asm volatile(
  194. " cds %0,%2,%1"
  195. : "+&d" (rp_old), "=Q" (v->counter)
  196. : "d" (rp_new), "Q" (v->counter)
  197. : "cc");
  198. return rp_old.pair;
  199. }
  200. static inline long long atomic64_add_return(long long i, atomic64_t *v)
  201. {
  202. long long old, new;
  203. do {
  204. old = atomic64_read(v);
  205. new = old + i;
  206. } while (atomic64_cmpxchg(v, old, new) != old);
  207. return new;
  208. }
  209. static inline long long atomic64_sub_return(long long i, atomic64_t *v)
  210. {
  211. long long old, new;
  212. do {
  213. old = atomic64_read(v);
  214. new = old - i;
  215. } while (atomic64_cmpxchg(v, old, new) != old);
  216. return new;
  217. }
  218. static inline void atomic64_set_mask(unsigned long long mask, atomic64_t *v)
  219. {
  220. long long old, new;
  221. do {
  222. old = atomic64_read(v);
  223. new = old | mask;
  224. } while (atomic64_cmpxchg(v, old, new) != old);
  225. }
  226. static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v)
  227. {
  228. long long old, new;
  229. do {
  230. old = atomic64_read(v);
  231. new = old & mask;
  232. } while (atomic64_cmpxchg(v, old, new) != old);
  233. }
  234. #endif /* CONFIG_64BIT */
  235. static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u)
  236. {
  237. long long c, old;
  238. c = atomic64_read(v);
  239. for (;;) {
  240. if (unlikely(c == u))
  241. break;
  242. old = atomic64_cmpxchg(v, c, c + a);
  243. if (likely(old == c))
  244. break;
  245. c = old;
  246. }
  247. return c != u;
  248. }
  249. static inline long long atomic64_dec_if_positive(atomic64_t *v)
  250. {
  251. long long c, old, dec;
  252. c = atomic64_read(v);
  253. for (;;) {
  254. dec = c - 1;
  255. if (unlikely(dec < 0))
  256. break;
  257. old = atomic64_cmpxchg((v), c, dec);
  258. if (likely(old == c))
  259. break;
  260. c = old;
  261. }
  262. return dec;
  263. }
  264. #define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
  265. #define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
  266. #define atomic64_inc(_v) atomic64_add_return(1, _v)
  267. #define atomic64_inc_return(_v) atomic64_add_return(1, _v)
  268. #define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
  269. #define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
  270. #define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
  271. #define atomic64_dec(_v) atomic64_sub_return(1, _v)
  272. #define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
  273. #define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
  274. #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
  275. #define smp_mb__before_atomic_dec() smp_mb()
  276. #define smp_mb__after_atomic_dec() smp_mb()
  277. #define smp_mb__before_atomic_inc() smp_mb()
  278. #define smp_mb__after_atomic_inc() smp_mb()
  279. #include <asm-generic/atomic-long.h>
  280. #endif /* __ARCH_S390_ATOMIC__ */