ksi8560.c 6.0 KB

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  1. /*
  2. * Board setup routines for the Emerson KSI8560
  3. *
  4. * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5. *
  6. * Based on mpc85xx_ads.c maintained by Kumar Gala
  7. *
  8. * 2008 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. *
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/kdev_t.h>
  18. #include <linux/delay.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/of_platform.h>
  21. #include <asm/system.h>
  22. #include <asm/time.h>
  23. #include <asm/machdep.h>
  24. #include <asm/pci-bridge.h>
  25. #include <asm/mpic.h>
  26. #include <mm/mmu_decl.h>
  27. #include <asm/udbg.h>
  28. #include <asm/prom.h>
  29. #include <sysdev/fsl_soc.h>
  30. #include <sysdev/fsl_pci.h>
  31. #include <asm/cpm2.h>
  32. #include <sysdev/cpm2_pic.h>
  33. #define KSI8560_CPLD_HVR 0x04 /* Hardware Version Register */
  34. #define KSI8560_CPLD_PVR 0x08 /* PLD Version Register */
  35. #define KSI8560_CPLD_RCR1 0x30 /* Reset Command Register 1 */
  36. #define KSI8560_CPLD_RCR1_CPUHR 0x80 /* CPU Hard Reset */
  37. static void __iomem *cpld_base = NULL;
  38. static void machine_restart(char *cmd)
  39. {
  40. if (cpld_base)
  41. out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR);
  42. else
  43. printk(KERN_ERR "Can't find CPLD base, hang forever\n");
  44. for (;;);
  45. }
  46. static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
  47. {
  48. struct irq_chip *chip = irq_desc_get_chip(desc);
  49. int cascade_irq;
  50. while ((cascade_irq = cpm2_get_irq()) >= 0)
  51. generic_handle_irq(cascade_irq);
  52. chip->irq_eoi(&desc->irq_data);
  53. }
  54. static void __init ksi8560_pic_init(void)
  55. {
  56. struct mpic *mpic;
  57. struct resource r;
  58. struct device_node *np;
  59. #ifdef CONFIG_CPM2
  60. int irq;
  61. #endif
  62. np = of_find_node_by_type(NULL, "open-pic");
  63. if (np == NULL) {
  64. printk(KERN_ERR "Could not find open-pic node\n");
  65. return;
  66. }
  67. if (of_address_to_resource(np, 0, &r)) {
  68. printk(KERN_ERR "Could not map mpic register space\n");
  69. of_node_put(np);
  70. return;
  71. }
  72. mpic = mpic_alloc(np, r.start,
  73. MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  74. 0, 256, " OpenPIC ");
  75. BUG_ON(mpic == NULL);
  76. of_node_put(np);
  77. mpic_init(mpic);
  78. #ifdef CONFIG_CPM2
  79. /* Setup CPM2 PIC */
  80. np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  81. if (np == NULL) {
  82. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  83. return;
  84. }
  85. irq = irq_of_parse_and_map(np, 0);
  86. cpm2_pic_init(np);
  87. of_node_put(np);
  88. irq_set_chained_handler(irq, cpm2_cascade);
  89. #endif
  90. }
  91. #ifdef CONFIG_CPM2
  92. /*
  93. * Setup I/O ports
  94. */
  95. struct cpm_pin {
  96. int port, pin, flags;
  97. };
  98. static struct cpm_pin __initdata ksi8560_pins[] = {
  99. /* SCC1 */
  100. {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  101. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  102. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  103. /* SCC2 */
  104. {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  105. {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  106. {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  107. /* FCC1 */
  108. {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  109. {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  110. {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  111. {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  112. {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  113. {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  114. {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  115. {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  116. {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  117. {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  118. {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  119. {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  120. {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  121. {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  122. {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK9 */
  123. {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK10 */
  124. };
  125. static void __init init_ioports(void)
  126. {
  127. int i;
  128. for (i = 0; i < ARRAY_SIZE(ksi8560_pins); i++) {
  129. struct cpm_pin *pin = &ksi8560_pins[i];
  130. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  131. }
  132. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
  133. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
  134. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
  135. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
  136. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_RX);
  137. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
  138. }
  139. #endif
  140. /*
  141. * Setup the architecture
  142. */
  143. static void __init ksi8560_setup_arch(void)
  144. {
  145. struct device_node *cpld;
  146. cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld");
  147. if (cpld)
  148. cpld_base = of_iomap(cpld, 0);
  149. else
  150. printk(KERN_ERR "Can't find CPLD in device tree\n");
  151. if (ppc_md.progress)
  152. ppc_md.progress("ksi8560_setup_arch()", 0);
  153. #ifdef CONFIG_CPM2
  154. cpm2_reset();
  155. init_ioports();
  156. #endif
  157. }
  158. static void ksi8560_show_cpuinfo(struct seq_file *m)
  159. {
  160. uint pvid, svid, phid1;
  161. pvid = mfspr(SPRN_PVR);
  162. svid = mfspr(SPRN_SVR);
  163. seq_printf(m, "Vendor\t\t: Emerson Network Power\n");
  164. seq_printf(m, "Board\t\t: KSI8560\n");
  165. if (cpld_base) {
  166. seq_printf(m, "Hardware rev\t: %d\n",
  167. in_8(cpld_base + KSI8560_CPLD_HVR));
  168. seq_printf(m, "CPLD rev\t: %d\n",
  169. in_8(cpld_base + KSI8560_CPLD_PVR));
  170. } else
  171. seq_printf(m, "Unknown Hardware and CPLD revs\n");
  172. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  173. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  174. /* Display cpu Pll setting */
  175. phid1 = mfspr(SPRN_HID1);
  176. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  177. }
  178. static struct of_device_id __initdata of_bus_ids[] = {
  179. { .type = "soc", },
  180. { .type = "simple-bus", },
  181. { .name = "cpm", },
  182. { .name = "localbus", },
  183. { .compatible = "gianfar", },
  184. {},
  185. };
  186. static int __init declare_of_platform_devices(void)
  187. {
  188. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  189. return 0;
  190. }
  191. machine_device_initcall(ksi8560, declare_of_platform_devices);
  192. /*
  193. * Called very early, device-tree isn't unflattened
  194. */
  195. static int __init ksi8560_probe(void)
  196. {
  197. unsigned long root = of_get_flat_dt_root();
  198. return of_flat_dt_is_compatible(root, "emerson,KSI8560");
  199. }
  200. define_machine(ksi8560) {
  201. .name = "KSI8560",
  202. .probe = ksi8560_probe,
  203. .setup_arch = ksi8560_setup_arch,
  204. .init_IRQ = ksi8560_pic_init,
  205. .show_cpuinfo = ksi8560_show_cpuinfo,
  206. .get_irq = mpic_get_irq,
  207. .restart = machine_restart,
  208. .calibrate_decr = generic_calibrate_decr,
  209. };