smp.c 27 KB

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  1. /* SMP support routines.
  2. *
  3. * Copyright (C) 2006-2008 Panasonic Corporation
  4. * All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/interrupt.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/init.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/cpumask.h>
  20. #include <linux/err.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/profile.h>
  25. #include <linux/smp.h>
  26. #include <asm/tlbflush.h>
  27. #include <asm/system.h>
  28. #include <asm/bitops.h>
  29. #include <asm/processor.h>
  30. #include <asm/bug.h>
  31. #include <asm/exceptions.h>
  32. #include <asm/hardirq.h>
  33. #include <asm/fpu.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/thread_info.h>
  36. #include <asm/cpu-regs.h>
  37. #include <asm/intctl-regs.h>
  38. #include "internal.h"
  39. #ifdef CONFIG_HOTPLUG_CPU
  40. #include <linux/cpu.h>
  41. #include <asm/cacheflush.h>
  42. static unsigned long sleep_mode[NR_CPUS];
  43. static void run_sleep_cpu(unsigned int cpu);
  44. static void run_wakeup_cpu(unsigned int cpu);
  45. #endif /* CONFIG_HOTPLUG_CPU */
  46. /*
  47. * Debug Message function
  48. */
  49. #undef DEBUG_SMP
  50. #ifdef DEBUG_SMP
  51. #define Dprintk(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  52. #else
  53. #define Dprintk(fmt, ...) no_printk(KERN_DEBUG fmt, ##__VA_ARGS__)
  54. #endif
  55. /* timeout value in msec for smp_nmi_call_function. zero is no timeout. */
  56. #define CALL_FUNCTION_NMI_IPI_TIMEOUT 0
  57. /*
  58. * Structure and data for smp_nmi_call_function().
  59. */
  60. struct nmi_call_data_struct {
  61. smp_call_func_t func;
  62. void *info;
  63. cpumask_t started;
  64. cpumask_t finished;
  65. int wait;
  66. char size_alignment[0]
  67. __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  68. } __attribute__ ((__aligned__(SMP_CACHE_BYTES)));
  69. static DEFINE_SPINLOCK(smp_nmi_call_lock);
  70. static struct nmi_call_data_struct *nmi_call_data;
  71. /*
  72. * Data structures and variables
  73. */
  74. static cpumask_t cpu_callin_map; /* Bitmask of callin CPUs */
  75. static cpumask_t cpu_callout_map; /* Bitmask of callout CPUs */
  76. cpumask_t cpu_boot_map; /* Bitmask of boot APs */
  77. unsigned long start_stack[NR_CPUS - 1];
  78. /*
  79. * Per CPU parameters
  80. */
  81. struct mn10300_cpuinfo cpu_data[NR_CPUS] __cacheline_aligned;
  82. static int cpucount; /* The count of boot CPUs */
  83. static cpumask_t smp_commenced_mask;
  84. cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
  85. /*
  86. * Function Prototypes
  87. */
  88. static int do_boot_cpu(int);
  89. static void smp_show_cpu_info(int cpu_id);
  90. static void smp_callin(void);
  91. static void smp_online(void);
  92. static void smp_store_cpu_info(int);
  93. static void smp_cpu_init(void);
  94. static void smp_tune_scheduling(void);
  95. static void send_IPI_mask(const cpumask_t *cpumask, int irq);
  96. static void init_ipi(void);
  97. /*
  98. * IPI Initialization interrupt definitions
  99. */
  100. static void mn10300_ipi_disable(unsigned int irq);
  101. static void mn10300_ipi_enable(unsigned int irq);
  102. static void mn10300_ipi_chip_disable(struct irq_data *d);
  103. static void mn10300_ipi_chip_enable(struct irq_data *d);
  104. static void mn10300_ipi_ack(struct irq_data *d);
  105. static void mn10300_ipi_nop(struct irq_data *d);
  106. static struct irq_chip mn10300_ipi_type = {
  107. .name = "cpu_ipi",
  108. .irq_disable = mn10300_ipi_chip_disable,
  109. .irq_enable = mn10300_ipi_chip_enable,
  110. .irq_ack = mn10300_ipi_ack,
  111. .irq_eoi = mn10300_ipi_nop
  112. };
  113. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id);
  114. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id);
  115. static struct irqaction reschedule_ipi = {
  116. .handler = smp_reschedule_interrupt,
  117. .name = "smp reschedule IPI"
  118. };
  119. static struct irqaction call_function_ipi = {
  120. .handler = smp_call_function_interrupt,
  121. .name = "smp call function IPI"
  122. };
  123. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  124. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id);
  125. static struct irqaction local_timer_ipi = {
  126. .handler = smp_ipi_timer_interrupt,
  127. .flags = IRQF_DISABLED,
  128. .name = "smp local timer IPI"
  129. };
  130. #endif
  131. /**
  132. * init_ipi - Initialise the IPI mechanism
  133. */
  134. static void init_ipi(void)
  135. {
  136. unsigned long flags;
  137. u16 tmp16;
  138. /* set up the reschedule IPI */
  139. irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
  140. handle_percpu_irq);
  141. setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
  142. set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
  143. mn10300_ipi_enable(RESCHEDULE_IPI);
  144. /* set up the call function IPI */
  145. irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
  146. handle_percpu_irq);
  147. setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
  148. set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
  149. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  150. /* set up the local timer IPI */
  151. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  152. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  153. irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
  154. handle_percpu_irq);
  155. setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
  156. set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
  157. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  158. #endif
  159. #ifdef CONFIG_MN10300_CACHE_ENABLED
  160. /* set up the cache flush IPI */
  161. flags = arch_local_cli_save();
  162. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(FLUSH_CACHE_GxICR_LV),
  163. mn10300_low_ipi_handler);
  164. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  165. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  166. arch_local_irq_restore(flags);
  167. #endif
  168. /* set up the NMI call function IPI */
  169. flags = arch_local_cli_save();
  170. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  171. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  172. arch_local_irq_restore(flags);
  173. /* set up the SMP boot IPI */
  174. flags = arch_local_cli_save();
  175. __set_intr_stub(NUM2EXCEP_IRQ_LEVEL(SMP_BOOT_GxICR_LV),
  176. mn10300_low_ipi_handler);
  177. arch_local_irq_restore(flags);
  178. }
  179. /**
  180. * mn10300_ipi_shutdown - Shut down handling of an IPI
  181. * @irq: The IPI to be shut down.
  182. */
  183. static void mn10300_ipi_shutdown(unsigned int irq)
  184. {
  185. unsigned long flags;
  186. u16 tmp;
  187. flags = arch_local_cli_save();
  188. tmp = GxICR(irq);
  189. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
  190. tmp = GxICR(irq);
  191. arch_local_irq_restore(flags);
  192. }
  193. /**
  194. * mn10300_ipi_enable - Enable an IPI
  195. * @irq: The IPI to be enabled.
  196. */
  197. static void mn10300_ipi_enable(unsigned int irq)
  198. {
  199. unsigned long flags;
  200. u16 tmp;
  201. flags = arch_local_cli_save();
  202. tmp = GxICR(irq);
  203. GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
  204. tmp = GxICR(irq);
  205. arch_local_irq_restore(flags);
  206. }
  207. static void mn10300_ipi_chip_enable(struct irq_data *d)
  208. {
  209. mn10300_ipi_enable(d->irq);
  210. }
  211. /**
  212. * mn10300_ipi_disable - Disable an IPI
  213. * @irq: The IPI to be disabled.
  214. */
  215. static void mn10300_ipi_disable(unsigned int irq)
  216. {
  217. unsigned long flags;
  218. u16 tmp;
  219. flags = arch_local_cli_save();
  220. tmp = GxICR(irq);
  221. GxICR(irq) = tmp & GxICR_LEVEL;
  222. tmp = GxICR(irq);
  223. arch_local_irq_restore(flags);
  224. }
  225. static void mn10300_ipi_chip_disable(struct irq_data *d)
  226. {
  227. mn10300_ipi_disable(d->irq);
  228. }
  229. /**
  230. * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC
  231. * @irq: The IPI to be acknowledged.
  232. *
  233. * Clear the interrupt detection flag for the IPI on the appropriate interrupt
  234. * channel in the PIC.
  235. */
  236. static void mn10300_ipi_ack(struct irq_data *d)
  237. {
  238. unsigned int irq = d->irq;
  239. unsigned long flags;
  240. u16 tmp;
  241. flags = arch_local_cli_save();
  242. GxICR_u8(irq) = GxICR_DETECT;
  243. tmp = GxICR(irq);
  244. arch_local_irq_restore(flags);
  245. }
  246. /**
  247. * mn10300_ipi_nop - Dummy IPI action
  248. * @irq: The IPI to be acted upon.
  249. */
  250. static void mn10300_ipi_nop(struct irq_data *d)
  251. {
  252. }
  253. /**
  254. * send_IPI_mask - Send IPIs to all CPUs in list
  255. * @cpumask: The list of CPUs to target.
  256. * @irq: The IPI request to be sent.
  257. *
  258. * Send the specified IPI to all the CPUs in the list, not waiting for them to
  259. * finish before returning. The caller is responsible for synchronisation if
  260. * that is needed.
  261. */
  262. static void send_IPI_mask(const cpumask_t *cpumask, int irq)
  263. {
  264. int i;
  265. u16 tmp;
  266. for (i = 0; i < NR_CPUS; i++) {
  267. if (cpu_isset(i, *cpumask)) {
  268. /* send IPI */
  269. tmp = CROSS_GxICR(irq, i);
  270. CROSS_GxICR(irq, i) =
  271. tmp | GxICR_REQUEST | GxICR_DETECT;
  272. tmp = CROSS_GxICR(irq, i); /* flush write buffer */
  273. }
  274. }
  275. }
  276. /**
  277. * send_IPI_self - Send an IPI to this CPU.
  278. * @irq: The IPI request to be sent.
  279. *
  280. * Send the specified IPI to the current CPU.
  281. */
  282. void send_IPI_self(int irq)
  283. {
  284. send_IPI_mask(cpumask_of(smp_processor_id()), irq);
  285. }
  286. /**
  287. * send_IPI_allbutself - Send IPIs to all the other CPUs.
  288. * @irq: The IPI request to be sent.
  289. *
  290. * Send the specified IPI to all CPUs in the system barring the current one,
  291. * not waiting for them to finish before returning. The caller is responsible
  292. * for synchronisation if that is needed.
  293. */
  294. void send_IPI_allbutself(int irq)
  295. {
  296. cpumask_t cpumask;
  297. cpumask = cpu_online_map;
  298. cpu_clear(smp_processor_id(), cpumask);
  299. send_IPI_mask(&cpumask, irq);
  300. }
  301. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  302. {
  303. BUG();
  304. /*send_IPI_mask(mask, CALL_FUNCTION_IPI);*/
  305. }
  306. void arch_send_call_function_single_ipi(int cpu)
  307. {
  308. send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI);
  309. }
  310. /**
  311. * smp_send_reschedule - Send reschedule IPI to a CPU
  312. * @cpu: The CPU to target.
  313. */
  314. void smp_send_reschedule(int cpu)
  315. {
  316. send_IPI_mask(cpumask_of(cpu), RESCHEDULE_IPI);
  317. }
  318. /**
  319. * smp_nmi_call_function - Send a call function NMI IPI to all CPUs
  320. * @func: The function to ask to be run.
  321. * @info: The context data to pass to that function.
  322. * @wait: If true, wait (atomically) until function is run on all CPUs.
  323. *
  324. * Send a non-maskable request to all CPUs in the system, requesting them to
  325. * run the specified function with the given context data, and, potentially, to
  326. * wait for completion of that function on all CPUs.
  327. *
  328. * Returns 0 if successful, -ETIMEDOUT if we were asked to wait, but hit the
  329. * timeout.
  330. */
  331. int smp_nmi_call_function(smp_call_func_t func, void *info, int wait)
  332. {
  333. struct nmi_call_data_struct data;
  334. unsigned long flags;
  335. unsigned int cnt;
  336. int cpus, ret = 0;
  337. cpus = num_online_cpus() - 1;
  338. if (cpus < 1)
  339. return 0;
  340. data.func = func;
  341. data.info = info;
  342. data.started = cpu_online_map;
  343. cpu_clear(smp_processor_id(), data.started);
  344. data.wait = wait;
  345. if (wait)
  346. data.finished = data.started;
  347. spin_lock_irqsave(&smp_nmi_call_lock, flags);
  348. nmi_call_data = &data;
  349. smp_mb();
  350. /* Send a message to all other CPUs and wait for them to respond */
  351. send_IPI_allbutself(CALL_FUNCTION_NMI_IPI);
  352. /* Wait for response */
  353. if (CALL_FUNCTION_NMI_IPI_TIMEOUT > 0) {
  354. for (cnt = 0;
  355. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  356. !cpus_empty(data.started);
  357. cnt++)
  358. mdelay(1);
  359. if (wait && cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT) {
  360. for (cnt = 0;
  361. cnt < CALL_FUNCTION_NMI_IPI_TIMEOUT &&
  362. !cpus_empty(data.finished);
  363. cnt++)
  364. mdelay(1);
  365. }
  366. if (cnt >= CALL_FUNCTION_NMI_IPI_TIMEOUT)
  367. ret = -ETIMEDOUT;
  368. } else {
  369. /* If timeout value is zero, wait until cpumask has been
  370. * cleared */
  371. while (!cpus_empty(data.started))
  372. barrier();
  373. if (wait)
  374. while (!cpus_empty(data.finished))
  375. barrier();
  376. }
  377. spin_unlock_irqrestore(&smp_nmi_call_lock, flags);
  378. return ret;
  379. }
  380. /**
  381. * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI
  382. *
  383. * Send a non-maskable request to all other CPUs in the system, instructing
  384. * them to jump into the debugger. The caller is responsible for checking that
  385. * the other CPUs responded to the instruction.
  386. *
  387. * The caller should make sure that this CPU's debugger IPI is disabled.
  388. */
  389. void smp_jump_to_debugger(void)
  390. {
  391. if (num_online_cpus() > 1)
  392. /* Send a message to all other CPUs */
  393. send_IPI_allbutself(DEBUGGER_NMI_IPI);
  394. }
  395. /**
  396. * stop_this_cpu - Callback to stop a CPU.
  397. * @unused: Callback context (ignored).
  398. */
  399. void stop_this_cpu(void *unused)
  400. {
  401. static volatile int stopflag;
  402. unsigned long flags;
  403. #ifdef CONFIG_GDBSTUB
  404. /* In case of single stepping smp_send_stop by other CPU,
  405. * clear procindebug to avoid deadlock.
  406. */
  407. atomic_set(&procindebug[smp_processor_id()], 0);
  408. #endif /* CONFIG_GDBSTUB */
  409. flags = arch_local_cli_save();
  410. cpu_clear(smp_processor_id(), cpu_online_map);
  411. while (!stopflag)
  412. cpu_relax();
  413. cpu_set(smp_processor_id(), cpu_online_map);
  414. arch_local_irq_restore(flags);
  415. }
  416. /**
  417. * smp_send_stop - Send a stop request to all CPUs.
  418. */
  419. void smp_send_stop(void)
  420. {
  421. smp_nmi_call_function(stop_this_cpu, NULL, 0);
  422. }
  423. /**
  424. * smp_reschedule_interrupt - Reschedule IPI handler
  425. * @irq: The interrupt number.
  426. * @dev_id: The device ID.
  427. *
  428. * We need do nothing here, since the scheduling will be effected on our way
  429. * back through entry.S.
  430. *
  431. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  432. */
  433. static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
  434. {
  435. /* do nothing */
  436. return IRQ_HANDLED;
  437. }
  438. /**
  439. * smp_call_function_interrupt - Call function IPI handler
  440. * @irq: The interrupt number.
  441. * @dev_id: The device ID.
  442. *
  443. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  444. */
  445. static irqreturn_t smp_call_function_interrupt(int irq, void *dev_id)
  446. {
  447. /* generic_smp_call_function_interrupt(); */
  448. generic_smp_call_function_single_interrupt();
  449. return IRQ_HANDLED;
  450. }
  451. /**
  452. * smp_nmi_call_function_interrupt - Non-maskable call function IPI handler
  453. */
  454. void smp_nmi_call_function_interrupt(void)
  455. {
  456. smp_call_func_t func = nmi_call_data->func;
  457. void *info = nmi_call_data->info;
  458. int wait = nmi_call_data->wait;
  459. /* Notify the initiating CPU that I've grabbed the data and am about to
  460. * execute the function
  461. */
  462. smp_mb();
  463. cpu_clear(smp_processor_id(), nmi_call_data->started);
  464. (*func)(info);
  465. if (wait) {
  466. smp_mb();
  467. cpu_clear(smp_processor_id(), nmi_call_data->finished);
  468. }
  469. }
  470. #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
  471. defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
  472. /**
  473. * smp_ipi_timer_interrupt - Local timer IPI handler
  474. * @irq: The interrupt number.
  475. * @dev_id: The device ID.
  476. *
  477. * Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
  478. */
  479. static irqreturn_t smp_ipi_timer_interrupt(int irq, void *dev_id)
  480. {
  481. return local_timer_interrupt();
  482. }
  483. #endif
  484. void __init smp_init_cpus(void)
  485. {
  486. int i;
  487. for (i = 0; i < NR_CPUS; i++) {
  488. set_cpu_possible(i, true);
  489. set_cpu_present(i, true);
  490. }
  491. }
  492. /**
  493. * smp_cpu_init - Initialise AP in start_secondary.
  494. *
  495. * For this Application Processor, set up init_mm, initialise FPU and set
  496. * interrupt level 0-6 setting.
  497. */
  498. static void __init smp_cpu_init(void)
  499. {
  500. unsigned long flags;
  501. int cpu_id = smp_processor_id();
  502. u16 tmp16;
  503. if (test_and_set_bit(cpu_id, &cpu_initialized)) {
  504. printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
  505. for (;;)
  506. local_irq_enable();
  507. }
  508. printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
  509. atomic_inc(&init_mm.mm_count);
  510. current->active_mm = &init_mm;
  511. BUG_ON(current->mm);
  512. enter_lazy_tlb(&init_mm, current);
  513. /* Force FPU initialization */
  514. clear_using_fpu(current);
  515. GxICR(CALL_FUNC_SINGLE_IPI) = CALL_FUNCTION_GxICR_LV | GxICR_DETECT;
  516. mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
  517. GxICR(LOCAL_TIMER_IPI) = LOCAL_TIMER_GxICR_LV | GxICR_DETECT;
  518. mn10300_ipi_enable(LOCAL_TIMER_IPI);
  519. GxICR(RESCHEDULE_IPI) = RESCHEDULE_GxICR_LV | GxICR_DETECT;
  520. mn10300_ipi_enable(RESCHEDULE_IPI);
  521. #ifdef CONFIG_MN10300_CACHE_ENABLED
  522. GxICR(FLUSH_CACHE_IPI) = FLUSH_CACHE_GxICR_LV | GxICR_DETECT;
  523. mn10300_ipi_enable(FLUSH_CACHE_IPI);
  524. #endif
  525. mn10300_ipi_shutdown(SMP_BOOT_IRQ);
  526. /* Set up the non-maskable call function IPI */
  527. flags = arch_local_cli_save();
  528. GxICR(CALL_FUNCTION_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  529. tmp16 = GxICR(CALL_FUNCTION_NMI_IPI);
  530. arch_local_irq_restore(flags);
  531. }
  532. /**
  533. * smp_prepare_cpu_init - Initialise CPU in startup_secondary
  534. *
  535. * Set interrupt level 0-6 setting and init ICR of the kernel debugger.
  536. */
  537. void smp_prepare_cpu_init(void)
  538. {
  539. int loop;
  540. /* Set the interrupt vector registers */
  541. IVAR0 = EXCEP_IRQ_LEVEL0;
  542. IVAR1 = EXCEP_IRQ_LEVEL1;
  543. IVAR2 = EXCEP_IRQ_LEVEL2;
  544. IVAR3 = EXCEP_IRQ_LEVEL3;
  545. IVAR4 = EXCEP_IRQ_LEVEL4;
  546. IVAR5 = EXCEP_IRQ_LEVEL5;
  547. IVAR6 = EXCEP_IRQ_LEVEL6;
  548. /* Disable all interrupts and set to priority 6 (lowest) */
  549. for (loop = 0; loop < GxICR_NUM_IRQS; loop++)
  550. GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
  551. #ifdef CONFIG_KERNEL_DEBUGGER
  552. /* initialise the kernel debugger interrupt */
  553. do {
  554. unsigned long flags;
  555. u16 tmp16;
  556. flags = arch_local_cli_save();
  557. GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT;
  558. tmp16 = GxICR(DEBUGGER_NMI_IPI);
  559. arch_local_irq_restore(flags);
  560. } while (0);
  561. #endif
  562. }
  563. /**
  564. * start_secondary - Activate a secondary CPU (AP)
  565. * @unused: Thread parameter (ignored).
  566. */
  567. int __init start_secondary(void *unused)
  568. {
  569. smp_cpu_init();
  570. smp_callin();
  571. while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
  572. cpu_relax();
  573. local_flush_tlb();
  574. preempt_disable();
  575. smp_online();
  576. #ifdef CONFIG_GENERIC_CLOCKEVENTS
  577. init_clockevents();
  578. #endif
  579. cpu_idle();
  580. return 0;
  581. }
  582. /**
  583. * smp_prepare_cpus - Boot up secondary CPUs (APs)
  584. * @max_cpus: Maximum number of CPUs to boot.
  585. *
  586. * Call do_boot_cpu, and boot up APs.
  587. */
  588. void __init smp_prepare_cpus(unsigned int max_cpus)
  589. {
  590. int phy_id;
  591. /* Setup boot CPU information */
  592. smp_store_cpu_info(0);
  593. smp_tune_scheduling();
  594. init_ipi();
  595. /* If SMP should be disabled, then finish */
  596. if (max_cpus == 0) {
  597. printk(KERN_INFO "SMP mode deactivated.\n");
  598. goto smp_done;
  599. }
  600. /* Boot secondary CPUs (for which phy_id > 0) */
  601. for (phy_id = 0; phy_id < NR_CPUS; phy_id++) {
  602. /* Don't boot primary CPU */
  603. if (max_cpus <= cpucount + 1)
  604. continue;
  605. if (phy_id != 0)
  606. do_boot_cpu(phy_id);
  607. set_cpu_possible(phy_id, true);
  608. smp_show_cpu_info(phy_id);
  609. }
  610. smp_done:
  611. Dprintk("Boot done.\n");
  612. }
  613. /**
  614. * smp_store_cpu_info - Save a CPU's information
  615. * @cpu: The CPU to save for.
  616. *
  617. * Save boot_cpu_data and jiffy for the specified CPU.
  618. */
  619. static void __init smp_store_cpu_info(int cpu)
  620. {
  621. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  622. *ci = boot_cpu_data;
  623. ci->loops_per_jiffy = loops_per_jiffy;
  624. ci->type = CPUREV;
  625. }
  626. /**
  627. * smp_tune_scheduling - Set time slice value
  628. *
  629. * Nothing to do here.
  630. */
  631. static void __init smp_tune_scheduling(void)
  632. {
  633. }
  634. /**
  635. * do_boot_cpu: Boot up one CPU
  636. * @phy_id: Physical ID of CPU to boot.
  637. *
  638. * Send an IPI to a secondary CPU to boot it. Returns 0 on success, 1
  639. * otherwise.
  640. */
  641. static int __init do_boot_cpu(int phy_id)
  642. {
  643. struct task_struct *idle;
  644. unsigned long send_status, callin_status;
  645. int timeout, cpu_id;
  646. send_status = GxICR_REQUEST;
  647. callin_status = 0;
  648. timeout = 0;
  649. cpu_id = phy_id;
  650. cpucount++;
  651. /* Create idle thread for this CPU */
  652. idle = fork_idle(cpu_id);
  653. if (IS_ERR(idle))
  654. panic("Failed fork for CPU#%d.", cpu_id);
  655. idle->thread.pc = (unsigned long)start_secondary;
  656. printk(KERN_NOTICE "Booting CPU#%d\n", cpu_id);
  657. start_stack[cpu_id - 1] = idle->thread.sp;
  658. task_thread_info(idle)->cpu = cpu_id;
  659. /* Send boot IPI to AP */
  660. send_IPI_mask(cpumask_of(phy_id), SMP_BOOT_IRQ);
  661. Dprintk("Waiting for send to finish...\n");
  662. /* Wait for AP's IPI receive in 100[ms] */
  663. do {
  664. udelay(1000);
  665. send_status =
  666. CROSS_GxICR(SMP_BOOT_IRQ, phy_id) & GxICR_REQUEST;
  667. } while (send_status == GxICR_REQUEST && timeout++ < 100);
  668. Dprintk("Waiting for cpu_callin_map.\n");
  669. if (send_status == 0) {
  670. /* Allow AP to start initializing */
  671. cpu_set(cpu_id, cpu_callout_map);
  672. /* Wait for setting cpu_callin_map */
  673. timeout = 0;
  674. do {
  675. udelay(1000);
  676. callin_status = cpu_isset(cpu_id, cpu_callin_map);
  677. } while (callin_status == 0 && timeout++ < 5000);
  678. if (callin_status == 0)
  679. Dprintk("Not responding.\n");
  680. } else {
  681. printk(KERN_WARNING "IPI not delivered.\n");
  682. }
  683. if (send_status == GxICR_REQUEST || callin_status == 0) {
  684. cpu_clear(cpu_id, cpu_callout_map);
  685. cpu_clear(cpu_id, cpu_callin_map);
  686. cpu_clear(cpu_id, cpu_initialized);
  687. cpucount--;
  688. return 1;
  689. }
  690. return 0;
  691. }
  692. /**
  693. * smp_show_cpu_info - Show SMP CPU information
  694. * @cpu: The CPU of interest.
  695. */
  696. static void __init smp_show_cpu_info(int cpu)
  697. {
  698. struct mn10300_cpuinfo *ci = &cpu_data[cpu];
  699. printk(KERN_INFO
  700. "CPU#%d : ioclk speed: %lu.%02luMHz : bogomips : %lu.%02lu\n",
  701. cpu,
  702. MN10300_IOCLK / 1000000,
  703. (MN10300_IOCLK / 10000) % 100,
  704. ci->loops_per_jiffy / (500000 / HZ),
  705. (ci->loops_per_jiffy / (5000 / HZ)) % 100);
  706. }
  707. /**
  708. * smp_callin - Set cpu_callin_map of the current CPU ID
  709. */
  710. static void __init smp_callin(void)
  711. {
  712. unsigned long timeout;
  713. int cpu;
  714. cpu = smp_processor_id();
  715. timeout = jiffies + (2 * HZ);
  716. if (cpu_isset(cpu, cpu_callin_map)) {
  717. printk(KERN_ERR "CPU#%d already present.\n", cpu);
  718. BUG();
  719. }
  720. Dprintk("CPU#%d waiting for CALLOUT\n", cpu);
  721. /* Wait for AP startup 2s total */
  722. while (time_before(jiffies, timeout)) {
  723. if (cpu_isset(cpu, cpu_callout_map))
  724. break;
  725. cpu_relax();
  726. }
  727. if (!time_before(jiffies, timeout)) {
  728. printk(KERN_ERR
  729. "BUG: CPU#%d started up but did not get a callout!\n",
  730. cpu);
  731. BUG();
  732. }
  733. #ifdef CONFIG_CALIBRATE_DELAY
  734. calibrate_delay(); /* Get our bogomips */
  735. #endif
  736. /* Save our processor parameters */
  737. smp_store_cpu_info(cpu);
  738. /* Allow the boot processor to continue */
  739. cpu_set(cpu, cpu_callin_map);
  740. }
  741. /**
  742. * smp_online - Set cpu_online_map
  743. */
  744. static void __init smp_online(void)
  745. {
  746. int cpu;
  747. cpu = smp_processor_id();
  748. local_irq_enable();
  749. cpu_set(cpu, cpu_online_map);
  750. smp_wmb();
  751. }
  752. /**
  753. * smp_cpus_done -
  754. * @max_cpus: Maximum CPU count.
  755. *
  756. * Do nothing.
  757. */
  758. void __init smp_cpus_done(unsigned int max_cpus)
  759. {
  760. }
  761. /*
  762. * smp_prepare_boot_cpu - Set up stuff for the boot processor.
  763. *
  764. * Set up the cpu_online_map, cpu_callout_map and cpu_callin_map of the boot
  765. * processor (CPU 0).
  766. */
  767. void __devinit smp_prepare_boot_cpu(void)
  768. {
  769. cpu_set(0, cpu_callout_map);
  770. cpu_set(0, cpu_callin_map);
  771. current_thread_info()->cpu = 0;
  772. }
  773. /*
  774. * initialize_secondary - Initialise a secondary CPU (Application Processor).
  775. *
  776. * Set SP register and jump to thread's PC address.
  777. */
  778. void initialize_secondary(void)
  779. {
  780. asm volatile (
  781. "mov %0,sp \n"
  782. "jmp (%1) \n"
  783. :
  784. : "a"(current->thread.sp), "a"(current->thread.pc));
  785. }
  786. /**
  787. * __cpu_up - Set smp_commenced_mask for the nominated CPU
  788. * @cpu: The target CPU.
  789. */
  790. int __devinit __cpu_up(unsigned int cpu)
  791. {
  792. int timeout;
  793. #ifdef CONFIG_HOTPLUG_CPU
  794. if (num_online_cpus() == 1)
  795. disable_hlt();
  796. if (sleep_mode[cpu])
  797. run_wakeup_cpu(cpu);
  798. #endif /* CONFIG_HOTPLUG_CPU */
  799. cpu_set(cpu, smp_commenced_mask);
  800. /* Wait 5s total for a response */
  801. for (timeout = 0 ; timeout < 5000 ; timeout++) {
  802. if (cpu_isset(cpu, cpu_online_map))
  803. break;
  804. udelay(1000);
  805. }
  806. BUG_ON(!cpu_isset(cpu, cpu_online_map));
  807. return 0;
  808. }
  809. /**
  810. * setup_profiling_timer - Set up the profiling timer
  811. * @multiplier - The frequency multiplier to use
  812. *
  813. * The frequency of the profiling timer can be changed by writing a multiplier
  814. * value into /proc/profile.
  815. */
  816. int setup_profiling_timer(unsigned int multiplier)
  817. {
  818. return -EINVAL;
  819. }
  820. /*
  821. * CPU hotplug routines
  822. */
  823. #ifdef CONFIG_HOTPLUG_CPU
  824. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  825. static int __init topology_init(void)
  826. {
  827. int cpu, ret;
  828. for_each_cpu(cpu) {
  829. ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
  830. if (ret)
  831. printk(KERN_WARNING
  832. "topology_init: register_cpu %d failed (%d)\n",
  833. cpu, ret);
  834. }
  835. return 0;
  836. }
  837. subsys_initcall(topology_init);
  838. int __cpu_disable(void)
  839. {
  840. int cpu = smp_processor_id();
  841. if (cpu == 0)
  842. return -EBUSY;
  843. migrate_irqs();
  844. cpu_clear(cpu, current->active_mm->cpu_vm_mask);
  845. return 0;
  846. }
  847. void __cpu_die(unsigned int cpu)
  848. {
  849. run_sleep_cpu(cpu);
  850. if (num_online_cpus() == 1)
  851. enable_hlt();
  852. }
  853. #ifdef CONFIG_MN10300_CACHE_ENABLED
  854. static inline void hotplug_cpu_disable_cache(void)
  855. {
  856. int tmp;
  857. asm volatile(
  858. " movhu (%1),%0 \n"
  859. " and %2,%0 \n"
  860. " movhu %0,(%1) \n"
  861. "1: movhu (%1),%0 \n"
  862. " btst %3,%0 \n"
  863. " bne 1b \n"
  864. : "=&r"(tmp)
  865. : "a"(&CHCTR),
  866. "i"(~(CHCTR_ICEN | CHCTR_DCEN)),
  867. "i"(CHCTR_ICBUSY | CHCTR_DCBUSY)
  868. : "memory", "cc");
  869. }
  870. static inline void hotplug_cpu_enable_cache(void)
  871. {
  872. int tmp;
  873. asm volatile(
  874. "movhu (%1),%0 \n"
  875. "or %2,%0 \n"
  876. "movhu %0,(%1) \n"
  877. : "=&r"(tmp)
  878. : "a"(&CHCTR),
  879. "i"(CHCTR_ICEN | CHCTR_DCEN)
  880. : "memory", "cc");
  881. }
  882. static inline void hotplug_cpu_invalidate_cache(void)
  883. {
  884. int tmp;
  885. asm volatile (
  886. "movhu (%1),%0 \n"
  887. "or %2,%0 \n"
  888. "movhu %0,(%1) \n"
  889. : "=&r"(tmp)
  890. : "a"(&CHCTR),
  891. "i"(CHCTR_ICINV | CHCTR_DCINV)
  892. : "cc");
  893. }
  894. #else /* CONFIG_MN10300_CACHE_ENABLED */
  895. #define hotplug_cpu_disable_cache() do {} while (0)
  896. #define hotplug_cpu_enable_cache() do {} while (0)
  897. #define hotplug_cpu_invalidate_cache() do {} while (0)
  898. #endif /* CONFIG_MN10300_CACHE_ENABLED */
  899. /**
  900. * hotplug_cpu_nmi_call_function - Call a function on other CPUs for hotplug
  901. * @cpumask: List of target CPUs.
  902. * @func: The function to call on those CPUs.
  903. * @info: The context data for the function to be called.
  904. * @wait: Whether to wait for the calls to complete.
  905. *
  906. * Non-maskably call a function on another CPU for hotplug purposes.
  907. *
  908. * This function must be called with maskable interrupts disabled.
  909. */
  910. static int hotplug_cpu_nmi_call_function(cpumask_t cpumask,
  911. smp_call_func_t func, void *info,
  912. int wait)
  913. {
  914. /*
  915. * The address and the size of nmi_call_func_mask_data
  916. * need to be aligned on L1_CACHE_BYTES.
  917. */
  918. static struct nmi_call_data_struct nmi_call_func_mask_data
  919. __cacheline_aligned;
  920. unsigned long start, end;
  921. start = (unsigned long)&nmi_call_func_mask_data;
  922. end = start + sizeof(struct nmi_call_data_struct);
  923. nmi_call_func_mask_data.func = func;
  924. nmi_call_func_mask_data.info = info;
  925. nmi_call_func_mask_data.started = cpumask;
  926. nmi_call_func_mask_data.wait = wait;
  927. if (wait)
  928. nmi_call_func_mask_data.finished = cpumask;
  929. spin_lock(&smp_nmi_call_lock);
  930. nmi_call_data = &nmi_call_func_mask_data;
  931. mn10300_local_dcache_flush_range(start, end);
  932. smp_wmb();
  933. send_IPI_mask(cpumask, CALL_FUNCTION_NMI_IPI);
  934. do {
  935. mn10300_local_dcache_inv_range(start, end);
  936. barrier();
  937. } while (!cpus_empty(nmi_call_func_mask_data.started));
  938. if (wait) {
  939. do {
  940. mn10300_local_dcache_inv_range(start, end);
  941. barrier();
  942. } while (!cpus_empty(nmi_call_func_mask_data.finished));
  943. }
  944. spin_unlock(&smp_nmi_call_lock);
  945. return 0;
  946. }
  947. static void restart_wakeup_cpu(void)
  948. {
  949. unsigned int cpu = smp_processor_id();
  950. cpu_set(cpu, cpu_callin_map);
  951. local_flush_tlb();
  952. cpu_set(cpu, cpu_online_map);
  953. smp_wmb();
  954. }
  955. static void prepare_sleep_cpu(void *unused)
  956. {
  957. sleep_mode[smp_processor_id()] = 1;
  958. smp_mb();
  959. mn10300_local_dcache_flush_inv();
  960. hotplug_cpu_disable_cache();
  961. hotplug_cpu_invalidate_cache();
  962. }
  963. /* when this function called, IE=0, NMID=0. */
  964. static void sleep_cpu(void *unused)
  965. {
  966. unsigned int cpu_id = smp_processor_id();
  967. /*
  968. * CALL_FUNCTION_NMI_IPI for wakeup_cpu() shall not be requested,
  969. * before this cpu goes in SLEEP mode.
  970. */
  971. do {
  972. smp_mb();
  973. __sleep_cpu();
  974. } while (sleep_mode[cpu_id]);
  975. restart_wakeup_cpu();
  976. }
  977. static void run_sleep_cpu(unsigned int cpu)
  978. {
  979. unsigned long flags;
  980. cpumask_t cpumask = cpumask_of(cpu);
  981. flags = arch_local_cli_save();
  982. hotplug_cpu_nmi_call_function(cpumask, prepare_sleep_cpu, NULL, 1);
  983. hotplug_cpu_nmi_call_function(cpumask, sleep_cpu, NULL, 0);
  984. udelay(1); /* delay for the cpu to sleep. */
  985. arch_local_irq_restore(flags);
  986. }
  987. static void wakeup_cpu(void)
  988. {
  989. hotplug_cpu_invalidate_cache();
  990. hotplug_cpu_enable_cache();
  991. smp_mb();
  992. sleep_mode[smp_processor_id()] = 0;
  993. }
  994. static void run_wakeup_cpu(unsigned int cpu)
  995. {
  996. unsigned long flags;
  997. flags = arch_local_cli_save();
  998. #if NR_CPUS == 2
  999. mn10300_local_dcache_flush_inv();
  1000. #else
  1001. /*
  1002. * Before waking up the cpu,
  1003. * all online cpus should stop and flush D-Cache for global data.
  1004. */
  1005. #error not support NR_CPUS > 2, when CONFIG_HOTPLUG_CPU=y.
  1006. #endif
  1007. hotplug_cpu_nmi_call_function(cpumask_of(cpu), wakeup_cpu, NULL, 1);
  1008. arch_local_irq_restore(flags);
  1009. }
  1010. #endif /* CONFIG_HOTPLUG_CPU */