spinlock.h 4.2 KB

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  1. /* MN10300 spinlock support
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #ifndef _ASM_SPINLOCK_H
  12. #define _ASM_SPINLOCK_H
  13. #include <asm/atomic.h>
  14. #include <asm/rwlock.h>
  15. #include <asm/page.h>
  16. /*
  17. * Simple spin lock operations. There are two variants, one clears IRQ's
  18. * on the local processor, one does not.
  19. *
  20. * We make no fairness assumptions. They have a cost.
  21. */
  22. #define arch_spin_is_locked(x) (*(volatile signed char *)(&(x)->slock) != 0)
  23. #define arch_spin_unlock_wait(x) do { barrier(); } while (arch_spin_is_locked(x))
  24. static inline void arch_spin_unlock(arch_spinlock_t *lock)
  25. {
  26. asm volatile(
  27. " bclr 1,(0,%0) \n"
  28. :
  29. : "a"(&lock->slock)
  30. : "memory", "cc");
  31. }
  32. static inline int arch_spin_trylock(arch_spinlock_t *lock)
  33. {
  34. int ret;
  35. asm volatile(
  36. " mov 1,%0 \n"
  37. " bset %0,(%1) \n"
  38. " bne 1f \n"
  39. " clr %0 \n"
  40. "1: xor 1,%0 \n"
  41. : "=d"(ret)
  42. : "a"(&lock->slock)
  43. : "memory", "cc");
  44. return ret;
  45. }
  46. static inline void arch_spin_lock(arch_spinlock_t *lock)
  47. {
  48. asm volatile(
  49. "1: bset 1,(0,%0) \n"
  50. " bne 1b \n"
  51. :
  52. : "a"(&lock->slock)
  53. : "memory", "cc");
  54. }
  55. static inline void arch_spin_lock_flags(arch_spinlock_t *lock,
  56. unsigned long flags)
  57. {
  58. int temp;
  59. asm volatile(
  60. "1: bset 1,(0,%2) \n"
  61. " beq 3f \n"
  62. " mov %1,epsw \n"
  63. "2: mov (0,%2),%0 \n"
  64. " or %0,%0 \n"
  65. " bne 2b \n"
  66. " mov %3,%0 \n"
  67. " mov %0,epsw \n"
  68. " nop \n"
  69. " nop \n"
  70. " bra 1b\n"
  71. "3: \n"
  72. : "=&d" (temp)
  73. : "d" (flags), "a"(&lock->slock), "i"(EPSW_IE | MN10300_CLI_LEVEL)
  74. : "memory", "cc");
  75. }
  76. #ifdef __KERNEL__
  77. /*
  78. * Read-write spinlocks, allowing multiple readers
  79. * but only one writer.
  80. *
  81. * NOTE! it is quite common to have readers in interrupts
  82. * but no interrupt writers. For those circumstances we
  83. * can "mix" irq-safe locks - any writer needs to get a
  84. * irq-safe write-lock, but readers can get non-irqsafe
  85. * read-locks.
  86. */
  87. /**
  88. * read_can_lock - would read_trylock() succeed?
  89. * @lock: the rwlock in question.
  90. */
  91. #define arch_read_can_lock(x) ((int)(x)->lock > 0)
  92. /**
  93. * write_can_lock - would write_trylock() succeed?
  94. * @lock: the rwlock in question.
  95. */
  96. #define arch_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
  97. /*
  98. * On mn10300, we implement read-write locks as a 32-bit counter
  99. * with the high bit (sign) being the "contended" bit.
  100. */
  101. static inline void arch_read_lock(arch_rwlock_t *rw)
  102. {
  103. #if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
  104. __build_read_lock(rw, "__read_lock_failed");
  105. #else
  106. {
  107. atomic_t *count = (atomic_t *)rw;
  108. while (atomic_dec_return(count) < 0)
  109. atomic_inc(count);
  110. }
  111. #endif
  112. }
  113. static inline void arch_write_lock(arch_rwlock_t *rw)
  114. {
  115. #if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
  116. __build_write_lock(rw, "__write_lock_failed");
  117. #else
  118. {
  119. atomic_t *count = (atomic_t *)rw;
  120. while (!atomic_sub_and_test(RW_LOCK_BIAS, count))
  121. atomic_add(RW_LOCK_BIAS, count);
  122. }
  123. #endif
  124. }
  125. static inline void arch_read_unlock(arch_rwlock_t *rw)
  126. {
  127. #if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
  128. __build_read_unlock(rw);
  129. #else
  130. {
  131. atomic_t *count = (atomic_t *)rw;
  132. atomic_inc(count);
  133. }
  134. #endif
  135. }
  136. static inline void arch_write_unlock(arch_rwlock_t *rw)
  137. {
  138. #if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
  139. __build_write_unlock(rw);
  140. #else
  141. {
  142. atomic_t *count = (atomic_t *)rw;
  143. atomic_add(RW_LOCK_BIAS, count);
  144. }
  145. #endif
  146. }
  147. static inline int arch_read_trylock(arch_rwlock_t *lock)
  148. {
  149. atomic_t *count = (atomic_t *)lock;
  150. atomic_dec(count);
  151. if (atomic_read(count) >= 0)
  152. return 1;
  153. atomic_inc(count);
  154. return 0;
  155. }
  156. static inline int arch_write_trylock(arch_rwlock_t *lock)
  157. {
  158. atomic_t *count = (atomic_t *)lock;
  159. if (atomic_sub_and_test(RW_LOCK_BIAS, count))
  160. return 1;
  161. atomic_add(RW_LOCK_BIAS, count);
  162. return 0;
  163. }
  164. #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
  165. #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
  166. #define _raw_spin_relax(lock) cpu_relax()
  167. #define _raw_read_relax(lock) cpu_relax()
  168. #define _raw_write_relax(lock) cpu_relax()
  169. #endif /* __KERNEL__ */
  170. #endif /* _ASM_SPINLOCK_H */