io_init.c 10 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/slab.h>
  9. #include <asm/sn/types.h>
  10. #include <asm/sn/addrs.h>
  11. #include <asm/sn/io.h>
  12. #include <asm/sn/module.h>
  13. #include <asm/sn/intr.h>
  14. #include <asm/sn/pcibus_provider_defs.h>
  15. #include <asm/sn/pcidev.h>
  16. #include <asm/sn/sn_sal.h>
  17. #include "xtalk/hubdev.h"
  18. /*
  19. * The code in this file will only be executed when running with
  20. * a PROM that does _not_ have base ACPI IO support.
  21. * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
  22. */
  23. static int max_segment_number; /* Default highest segment number */
  24. static int max_pcibus_number = 255; /* Default highest pci bus number */
  25. /*
  26. * Retrieve the hub device info structure for the given nasid.
  27. */
  28. static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
  29. {
  30. struct ia64_sal_retval ret_stuff;
  31. ret_stuff.status = 0;
  32. ret_stuff.v0 = 0;
  33. SAL_CALL_NOLOCK(ret_stuff,
  34. (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
  35. (u64) handle, (u64) address, 0, 0, 0, 0, 0);
  36. return ret_stuff.v0;
  37. }
  38. /*
  39. * Retrieve the pci bus information given the bus number.
  40. */
  41. static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
  42. {
  43. struct ia64_sal_retval ret_stuff;
  44. ret_stuff.status = 0;
  45. ret_stuff.v0 = 0;
  46. SAL_CALL_NOLOCK(ret_stuff,
  47. (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
  48. (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
  49. return ret_stuff.v0;
  50. }
  51. /*
  52. * Retrieve the pci device information given the bus and device|function number.
  53. */
  54. static inline u64
  55. sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
  56. u64 sn_irq_info)
  57. {
  58. struct ia64_sal_retval ret_stuff;
  59. ret_stuff.status = 0;
  60. ret_stuff.v0 = 0;
  61. SAL_CALL_NOLOCK(ret_stuff,
  62. (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
  63. (u64) segment, (u64) bus_number, (u64) devfn,
  64. (u64) pci_dev,
  65. sn_irq_info, 0, 0);
  66. return ret_stuff.v0;
  67. }
  68. /*
  69. * sn_fixup_ionodes() - This routine initializes the HUB data structure for
  70. * each node in the system. This function is only
  71. * executed when running with a non-ACPI capable PROM.
  72. */
  73. static void __init sn_fixup_ionodes(void)
  74. {
  75. struct hubdev_info *hubdev;
  76. u64 status;
  77. u64 nasid;
  78. int i;
  79. extern void sn_common_hubdev_init(struct hubdev_info *);
  80. /*
  81. * Get SGI Specific HUB chipset information.
  82. * Inform Prom that this kernel can support domain bus numbering.
  83. */
  84. for (i = 0; i < num_cnodes; i++) {
  85. hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
  86. nasid = cnodeid_to_nasid(i);
  87. hubdev->max_segment_number = 0xffffffff;
  88. hubdev->max_pcibus_number = 0xff;
  89. status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
  90. if (status)
  91. continue;
  92. /* Save the largest Domain and pcibus numbers found. */
  93. if (hubdev->max_segment_number) {
  94. /*
  95. * Dealing with a Prom that supports segments.
  96. */
  97. max_segment_number = hubdev->max_segment_number;
  98. max_pcibus_number = hubdev->max_pcibus_number;
  99. }
  100. sn_common_hubdev_init(hubdev);
  101. }
  102. }
  103. /*
  104. * sn_pci_legacy_window_fixup - Create PCI controller windows for
  105. * legacy IO and MEM space. This needs to
  106. * be done here, as the PROM does not have
  107. * ACPI support defining the root buses
  108. * and their resources (_CRS),
  109. */
  110. static void
  111. sn_legacy_pci_window_fixup(struct pci_controller *controller,
  112. u64 legacy_io, u64 legacy_mem)
  113. {
  114. controller->window = kcalloc(2, sizeof(struct pci_window),
  115. GFP_KERNEL);
  116. BUG_ON(controller->window == NULL);
  117. controller->window[0].offset = legacy_io;
  118. controller->window[0].resource.name = "legacy_io";
  119. controller->window[0].resource.flags = IORESOURCE_IO;
  120. controller->window[0].resource.start = legacy_io;
  121. controller->window[0].resource.end =
  122. controller->window[0].resource.start + 0xffff;
  123. controller->window[0].resource.parent = &ioport_resource;
  124. controller->window[1].offset = legacy_mem;
  125. controller->window[1].resource.name = "legacy_mem";
  126. controller->window[1].resource.flags = IORESOURCE_MEM;
  127. controller->window[1].resource.start = legacy_mem;
  128. controller->window[1].resource.end =
  129. controller->window[1].resource.start + (1024 * 1024) - 1;
  130. controller->window[1].resource.parent = &iomem_resource;
  131. controller->windows = 2;
  132. }
  133. /*
  134. * sn_pci_window_fixup() - Create a pci_window for each device resource.
  135. * It will setup pci_windows for use by
  136. * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
  137. * etc.
  138. */
  139. static void
  140. sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
  141. s64 * pci_addrs)
  142. {
  143. struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
  144. unsigned int i;
  145. unsigned int idx;
  146. unsigned int new_count;
  147. struct pci_window *new_window;
  148. if (count == 0)
  149. return;
  150. idx = controller->windows;
  151. new_count = controller->windows + count;
  152. new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
  153. BUG_ON(new_window == NULL);
  154. if (controller->window) {
  155. memcpy(new_window, controller->window,
  156. sizeof(struct pci_window) * controller->windows);
  157. kfree(controller->window);
  158. }
  159. /* Setup a pci_window for each device resource. */
  160. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  161. if (pci_addrs[i] == -1)
  162. continue;
  163. new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
  164. new_window[idx].resource = dev->resource[i];
  165. idx++;
  166. }
  167. controller->windows = new_count;
  168. controller->window = new_window;
  169. }
  170. /*
  171. * sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
  172. * and need to convert the pci_dev->resource
  173. * 'start' and 'end' addresses to mapped addresses,
  174. * and setup the pci_controller->window array entries.
  175. */
  176. void
  177. sn_io_slot_fixup(struct pci_dev *dev)
  178. {
  179. unsigned int count = 0;
  180. int idx;
  181. s64 pci_addrs[PCI_ROM_RESOURCE + 1];
  182. unsigned long addr, end, size, start;
  183. struct pcidev_info *pcidev_info;
  184. struct sn_irq_info *sn_irq_info;
  185. int status;
  186. pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
  187. if (!pcidev_info)
  188. panic("%s: Unable to alloc memory for pcidev_info", __func__);
  189. sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
  190. if (!sn_irq_info)
  191. panic("%s: Unable to alloc memory for sn_irq_info", __func__);
  192. /* Call to retrieve pci device information needed by kernel. */
  193. status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
  194. (u64) dev->bus->number,
  195. dev->devfn,
  196. (u64) __pa(pcidev_info),
  197. (u64) __pa(sn_irq_info));
  198. BUG_ON(status); /* Cannot get platform pci device information */
  199. /* Copy over PIO Mapped Addresses */
  200. for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
  201. if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
  202. pci_addrs[idx] = -1;
  203. continue;
  204. }
  205. start = dev->resource[idx].start;
  206. end = dev->resource[idx].end;
  207. size = end - start;
  208. if (size == 0) {
  209. pci_addrs[idx] = -1;
  210. continue;
  211. }
  212. pci_addrs[idx] = start;
  213. count++;
  214. addr = pcidev_info->pdi_pio_mapped_addr[idx];
  215. addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
  216. dev->resource[idx].start = addr;
  217. dev->resource[idx].end = addr + size;
  218. /*
  219. * if it's already in the device structure, remove it before
  220. * inserting
  221. */
  222. if (dev->resource[idx].parent && dev->resource[idx].parent->child)
  223. release_resource(&dev->resource[idx]);
  224. if (dev->resource[idx].flags & IORESOURCE_IO)
  225. insert_resource(&ioport_resource, &dev->resource[idx]);
  226. else
  227. insert_resource(&iomem_resource, &dev->resource[idx]);
  228. /*
  229. * If ROM, set the actual ROM image size, and mark as
  230. * shadowed in PROM.
  231. */
  232. if (idx == PCI_ROM_RESOURCE) {
  233. size_t image_size;
  234. void __iomem *rom;
  235. rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
  236. size + 1);
  237. image_size = pci_get_rom_size(dev, rom, size + 1);
  238. dev->resource[PCI_ROM_RESOURCE].end =
  239. dev->resource[PCI_ROM_RESOURCE].start +
  240. image_size - 1;
  241. dev->resource[PCI_ROM_RESOURCE].flags |=
  242. IORESOURCE_ROM_BIOS_COPY;
  243. }
  244. }
  245. /* Create a pci_window in the pci_controller struct for
  246. * each device resource.
  247. */
  248. if (count > 0)
  249. sn_pci_window_fixup(dev, count, pci_addrs);
  250. sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
  251. }
  252. EXPORT_SYMBOL(sn_io_slot_fixup);
  253. /*
  254. * sn_pci_controller_fixup() - This routine sets up a bus's resources
  255. * consistent with the Linux PCI abstraction layer.
  256. */
  257. static void __init
  258. sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
  259. {
  260. s64 status = 0;
  261. struct pci_controller *controller;
  262. struct pcibus_bussoft *prom_bussoft_ptr;
  263. status = sal_get_pcibus_info((u64) segment, (u64) busnum,
  264. (u64) ia64_tpa(&prom_bussoft_ptr));
  265. if (status > 0)
  266. return; /*bus # does not exist */
  267. prom_bussoft_ptr = __va(prom_bussoft_ptr);
  268. controller = kzalloc(sizeof(*controller), GFP_KERNEL);
  269. BUG_ON(!controller);
  270. controller->segment = segment;
  271. /*
  272. * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
  273. * (platform_data will be overwritten later in sn_common_bus_fixup())
  274. */
  275. controller->platform_data = prom_bussoft_ptr;
  276. bus = pci_scan_bus(busnum, &pci_root_ops, controller);
  277. if (bus == NULL)
  278. goto error_return; /* error, or bus already scanned */
  279. bus->sysdata = controller;
  280. return;
  281. error_return:
  282. kfree(controller);
  283. return;
  284. }
  285. /*
  286. * sn_bus_fixup
  287. */
  288. void
  289. sn_bus_fixup(struct pci_bus *bus)
  290. {
  291. struct pci_dev *pci_dev = NULL;
  292. struct pcibus_bussoft *prom_bussoft_ptr;
  293. if (!bus->parent) { /* If root bus */
  294. prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
  295. if (prom_bussoft_ptr == NULL) {
  296. printk(KERN_ERR
  297. "sn_bus_fixup: 0x%04x:0x%02x Unable to "
  298. "obtain prom_bussoft_ptr\n",
  299. pci_domain_nr(bus), bus->number);
  300. return;
  301. }
  302. sn_common_bus_fixup(bus, prom_bussoft_ptr);
  303. sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
  304. prom_bussoft_ptr->bs_legacy_io,
  305. prom_bussoft_ptr->bs_legacy_mem);
  306. }
  307. list_for_each_entry(pci_dev, &bus->devices, bus_list) {
  308. sn_io_slot_fixup(pci_dev);
  309. }
  310. }
  311. /*
  312. * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
  313. * so we need to do things the hard way, including initiating the
  314. * bus scanning ourselves.
  315. */
  316. void __init sn_io_init(void)
  317. {
  318. int i, j;
  319. sn_fixup_ionodes();
  320. /* busses are not known yet ... */
  321. for (i = 0; i <= max_segment_number; i++)
  322. for (j = 0; j <= max_pcibus_number; j++)
  323. sn_pci_controller_fixup(i, j, NULL);
  324. }