ptrace.c 10 KB

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  1. /*
  2. * Copyright (C) 2000-2007, Axis Communications AB.
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/sched.h>
  6. #include <linux/mm.h>
  7. #include <linux/smp.h>
  8. #include <linux/errno.h>
  9. #include <linux/ptrace.h>
  10. #include <linux/user.h>
  11. #include <linux/signal.h>
  12. #include <linux/security.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/page.h>
  15. #include <asm/pgtable.h>
  16. #include <asm/system.h>
  17. #include <asm/processor.h>
  18. #include <arch/hwregs/supp_reg.h>
  19. /*
  20. * Determines which bits in CCS the user has access to.
  21. * 1 = access, 0 = no access.
  22. */
  23. #define CCS_MASK 0x00087c00 /* SXNZVC */
  24. #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
  25. static int put_debugreg(long pid, unsigned int regno, long data);
  26. static long get_debugreg(long pid, unsigned int regno);
  27. static unsigned long get_pseudo_pc(struct task_struct *child);
  28. void deconfigure_bp(long pid);
  29. extern unsigned long cris_signal_return_page;
  30. /*
  31. * Get contents of register REGNO in task TASK.
  32. */
  33. long get_reg(struct task_struct *task, unsigned int regno)
  34. {
  35. /* USP is a special case, it's not in the pt_regs struct but
  36. * in the tasks thread struct
  37. */
  38. unsigned long ret;
  39. if (regno <= PT_EDA)
  40. ret = ((unsigned long *)task_pt_regs(task))[regno];
  41. else if (regno == PT_USP)
  42. ret = task->thread.usp;
  43. else if (regno == PT_PPC)
  44. ret = get_pseudo_pc(task);
  45. else if (regno <= PT_MAX)
  46. ret = get_debugreg(task->pid, regno);
  47. else
  48. ret = 0;
  49. return ret;
  50. }
  51. /*
  52. * Write contents of register REGNO in task TASK.
  53. */
  54. int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
  55. {
  56. if (regno <= PT_EDA)
  57. ((unsigned long *)task_pt_regs(task))[regno] = data;
  58. else if (regno == PT_USP)
  59. task->thread.usp = data;
  60. else if (regno == PT_PPC) {
  61. /* Write pseudo-PC to ERP only if changed. */
  62. if (data != get_pseudo_pc(task))
  63. task_pt_regs(task)->erp = data;
  64. } else if (regno <= PT_MAX)
  65. return put_debugreg(task->pid, regno, data);
  66. else
  67. return -1;
  68. return 0;
  69. }
  70. void user_enable_single_step(struct task_struct *child)
  71. {
  72. unsigned long tmp;
  73. /*
  74. * Set up SPC if not set already (in which case we have no other
  75. * choice but to trust it).
  76. */
  77. if (!get_reg(child, PT_SPC)) {
  78. /* In case we're stopped in a delay slot. */
  79. tmp = get_reg(child, PT_ERP) & ~1;
  80. put_reg(child, PT_SPC, tmp);
  81. }
  82. tmp = get_reg(child, PT_CCS) | SBIT_USER;
  83. put_reg(child, PT_CCS, tmp);
  84. }
  85. void user_disable_single_step(struct task_struct *child)
  86. {
  87. put_reg(child, PT_SPC, 0);
  88. if (!get_debugreg(child->pid, PT_BP_CTRL)) {
  89. unsigned long tmp;
  90. /* If no h/w bp configured, disable S bit. */
  91. tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
  92. put_reg(child, PT_CCS, tmp);
  93. }
  94. }
  95. /*
  96. * Called by kernel/ptrace.c when detaching.
  97. *
  98. * Make sure the single step bit is not set.
  99. */
  100. void
  101. ptrace_disable(struct task_struct *child)
  102. {
  103. unsigned long tmp;
  104. /* Deconfigure SPC and S-bit. */
  105. user_disable_single_step(child);
  106. put_reg(child, PT_SPC, 0);
  107. /* Deconfigure any watchpoints associated with the child. */
  108. deconfigure_bp(child->pid);
  109. }
  110. long arch_ptrace(struct task_struct *child, long request,
  111. unsigned long addr, unsigned long data)
  112. {
  113. int ret;
  114. unsigned int regno = addr >> 2;
  115. unsigned long __user *datap = (unsigned long __user *)data;
  116. switch (request) {
  117. /* Read word at location address. */
  118. case PTRACE_PEEKTEXT:
  119. case PTRACE_PEEKDATA: {
  120. unsigned long tmp;
  121. int copied;
  122. ret = -EIO;
  123. /* The signal trampoline page is outside the normal user-addressable
  124. * space but still accessible. This is hack to make it possible to
  125. * access the signal handler code in GDB.
  126. */
  127. if ((addr & PAGE_MASK) == cris_signal_return_page) {
  128. /* The trampoline page is globally mapped, no page table to traverse.*/
  129. tmp = *(unsigned long*)addr;
  130. } else {
  131. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  132. if (copied != sizeof(tmp))
  133. break;
  134. }
  135. ret = put_user(tmp,datap);
  136. break;
  137. }
  138. /* Read the word at location address in the USER area. */
  139. case PTRACE_PEEKUSR: {
  140. unsigned long tmp;
  141. ret = -EIO;
  142. if ((addr & 3) || regno > PT_MAX)
  143. break;
  144. tmp = get_reg(child, regno);
  145. ret = put_user(tmp, datap);
  146. break;
  147. }
  148. /* Write the word at location address. */
  149. case PTRACE_POKETEXT:
  150. case PTRACE_POKEDATA:
  151. ret = generic_ptrace_pokedata(child, addr, data);
  152. break;
  153. /* Write the word at location address in the USER area. */
  154. case PTRACE_POKEUSR:
  155. ret = -EIO;
  156. if ((addr & 3) || regno > PT_MAX)
  157. break;
  158. if (regno == PT_CCS) {
  159. /* don't allow the tracing process to change stuff like
  160. * interrupt enable, kernel/user bit, dma enables etc.
  161. */
  162. data &= CCS_MASK;
  163. data |= get_reg(child, PT_CCS) & ~CCS_MASK;
  164. }
  165. if (put_reg(child, regno, data))
  166. break;
  167. ret = 0;
  168. break;
  169. /* Get all GP registers from the child. */
  170. case PTRACE_GETREGS: {
  171. int i;
  172. unsigned long tmp;
  173. for (i = 0; i <= PT_MAX; i++) {
  174. tmp = get_reg(child, i);
  175. if (put_user(tmp, datap)) {
  176. ret = -EFAULT;
  177. goto out_tsk;
  178. }
  179. datap++;
  180. }
  181. ret = 0;
  182. break;
  183. }
  184. /* Set all GP registers in the child. */
  185. case PTRACE_SETREGS: {
  186. int i;
  187. unsigned long tmp;
  188. for (i = 0; i <= PT_MAX; i++) {
  189. if (get_user(tmp, datap)) {
  190. ret = -EFAULT;
  191. goto out_tsk;
  192. }
  193. if (i == PT_CCS) {
  194. tmp &= CCS_MASK;
  195. tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
  196. }
  197. put_reg(child, i, tmp);
  198. datap++;
  199. }
  200. ret = 0;
  201. break;
  202. }
  203. default:
  204. ret = ptrace_request(child, request, addr, data);
  205. break;
  206. }
  207. out_tsk:
  208. return ret;
  209. }
  210. void do_syscall_trace(void)
  211. {
  212. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  213. return;
  214. if (!(current->ptrace & PT_PTRACED))
  215. return;
  216. /* the 0x80 provides a way for the tracing parent to distinguish
  217. between a syscall stop and SIGTRAP delivery */
  218. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  219. ? 0x80 : 0));
  220. /*
  221. * This isn't the same as continuing with a signal, but it will do for
  222. * normal use.
  223. */
  224. if (current->exit_code) {
  225. send_sig(current->exit_code, current, 1);
  226. current->exit_code = 0;
  227. }
  228. }
  229. /* Returns the size of an instruction that has a delay slot. */
  230. static int insn_size(struct task_struct *child, unsigned long pc)
  231. {
  232. unsigned long opcode;
  233. int copied;
  234. int opsize = 0;
  235. /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
  236. copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
  237. if (copied != sizeof(opcode))
  238. return 0;
  239. switch ((opcode & 0x0f00) >> 8) {
  240. case 0x0:
  241. case 0x9:
  242. case 0xb:
  243. opsize = 2;
  244. break;
  245. case 0xe:
  246. case 0xf:
  247. opsize = 6;
  248. break;
  249. case 0xd:
  250. /* Could be 4 or 6; check more bits. */
  251. if ((opcode & 0xff) == 0xff)
  252. opsize = 4;
  253. else
  254. opsize = 6;
  255. break;
  256. default:
  257. panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
  258. opcode, pc);
  259. }
  260. return opsize;
  261. }
  262. static unsigned long get_pseudo_pc(struct task_struct *child)
  263. {
  264. /* Default value for PC is ERP. */
  265. unsigned long pc = get_reg(child, PT_ERP);
  266. if (pc & 0x1) {
  267. unsigned long spc = get_reg(child, PT_SPC);
  268. /* Delay slot bit set. Report as stopped on proper
  269. instruction. */
  270. if (spc) {
  271. /* Rely on SPC if set. FIXME: We might want to check
  272. that EXS indicates we stopped due to a single-step
  273. exception. */
  274. pc = spc;
  275. } else {
  276. /* Calculate the PC from the size of the instruction
  277. that the delay slot we're in belongs to. */
  278. pc += insn_size(child, pc & ~1) - 1;
  279. }
  280. }
  281. return pc;
  282. }
  283. static long bp_owner = 0;
  284. /* Reachable from exit_thread in signal.c, so not static. */
  285. void deconfigure_bp(long pid)
  286. {
  287. int bp;
  288. /* Only deconfigure if the pid is the owner. */
  289. if (bp_owner != pid)
  290. return;
  291. for (bp = 0; bp < 6; bp++) {
  292. unsigned long tmp;
  293. /* Deconfigure start and end address (also gets rid of ownership). */
  294. put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
  295. put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
  296. /* Deconfigure relevant bits in control register. */
  297. tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
  298. put_debugreg(pid, PT_BP_CTRL, tmp);
  299. }
  300. /* No owner now. */
  301. bp_owner = 0;
  302. }
  303. static int put_debugreg(long pid, unsigned int regno, long data)
  304. {
  305. int ret = 0;
  306. register int old_srs;
  307. #ifdef CONFIG_ETRAX_KGDB
  308. /* Ignore write, but pretend it was ok if value is 0
  309. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  310. return (data == 0) ? ret : -1;
  311. #endif
  312. /* Simple owner management. */
  313. if (!bp_owner)
  314. bp_owner = pid;
  315. else if (bp_owner != pid) {
  316. /* Ignore write, but pretend it was ok if value is 0
  317. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  318. return (data == 0) ? ret : -1;
  319. }
  320. /* Remember old SRS. */
  321. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  322. /* Switch to BP bank. */
  323. SUPP_BANK_SEL(BANK_BP);
  324. switch (regno - PT_BP) {
  325. case 0:
  326. SUPP_REG_WR(0, data); break;
  327. case 1:
  328. case 2:
  329. if (data)
  330. ret = -1;
  331. break;
  332. case 3:
  333. SUPP_REG_WR(3, data); break;
  334. case 4:
  335. SUPP_REG_WR(4, data); break;
  336. case 5:
  337. SUPP_REG_WR(5, data); break;
  338. case 6:
  339. SUPP_REG_WR(6, data); break;
  340. case 7:
  341. SUPP_REG_WR(7, data); break;
  342. case 8:
  343. SUPP_REG_WR(8, data); break;
  344. case 9:
  345. SUPP_REG_WR(9, data); break;
  346. case 10:
  347. SUPP_REG_WR(10, data); break;
  348. case 11:
  349. SUPP_REG_WR(11, data); break;
  350. case 12:
  351. SUPP_REG_WR(12, data); break;
  352. case 13:
  353. SUPP_REG_WR(13, data); break;
  354. case 14:
  355. SUPP_REG_WR(14, data); break;
  356. default:
  357. ret = -1;
  358. break;
  359. }
  360. /* Restore SRS. */
  361. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  362. /* Just for show. */
  363. NOP();
  364. NOP();
  365. NOP();
  366. return ret;
  367. }
  368. static long get_debugreg(long pid, unsigned int regno)
  369. {
  370. register int old_srs;
  371. register long data;
  372. if (pid != bp_owner) {
  373. return 0;
  374. }
  375. /* Remember old SRS. */
  376. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  377. /* Switch to BP bank. */
  378. SUPP_BANK_SEL(BANK_BP);
  379. switch (regno - PT_BP) {
  380. case 0:
  381. SUPP_REG_RD(0, data); break;
  382. case 1:
  383. case 2:
  384. /* error return value? */
  385. data = 0;
  386. break;
  387. case 3:
  388. SUPP_REG_RD(3, data); break;
  389. case 4:
  390. SUPP_REG_RD(4, data); break;
  391. case 5:
  392. SUPP_REG_RD(5, data); break;
  393. case 6:
  394. SUPP_REG_RD(6, data); break;
  395. case 7:
  396. SUPP_REG_RD(7, data); break;
  397. case 8:
  398. SUPP_REG_RD(8, data); break;
  399. case 9:
  400. SUPP_REG_RD(9, data); break;
  401. case 10:
  402. SUPP_REG_RD(10, data); break;
  403. case 11:
  404. SUPP_REG_RD(11, data); break;
  405. case 12:
  406. SUPP_REG_RD(12, data); break;
  407. case 13:
  408. SUPP_REG_RD(13, data); break;
  409. case 14:
  410. SUPP_REG_RD(14, data); break;
  411. default:
  412. /* error return value? */
  413. data = 0;
  414. }
  415. /* Restore SRS. */
  416. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  417. /* Just for show. */
  418. NOP();
  419. NOP();
  420. NOP();
  421. return data;
  422. }