pll.h 1.2 KB

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  1. /*
  2. * Copyright 2005-2010 Analog Devices Inc.
  3. *
  4. * Licensed under the GPL-2 or later.
  5. */
  6. #ifndef _MACH_PLL_H
  7. #define _MACH_PLL_H
  8. #ifndef __ASSEMBLY__
  9. #ifdef CONFIG_SMP
  10. #include <asm/blackfin.h>
  11. #include <asm/irqflags.h>
  12. #include <mach/irq.h>
  13. #define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32)
  14. static inline void
  15. bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2)
  16. {
  17. unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
  18. bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0);
  19. bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1);
  20. }
  21. #define bfin_iwr_restore bfin_iwr_restore
  22. static inline void
  23. bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2,
  24. unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
  25. {
  26. unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0);
  27. *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF);
  28. *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF);
  29. bfin_iwr_restore(niwr0, niwr1, niwr2);
  30. }
  31. #define bfin_iwr_save bfin_iwr_save
  32. static inline void
  33. bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
  34. {
  35. bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP), 0, iwr0, iwr1, iwr2);
  36. }
  37. #endif
  38. #endif
  39. #include <mach-common/pll.h>
  40. #endif