ezkit.c 34 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/portmux.h>
  25. #include <asm/bfin_sdh.h>
  26. #include <mach/bf54x_keys.h>
  27. #include <linux/input.h>
  28. #include <linux/spi/ad7877.h>
  29. /*
  30. * Name the Board for the /proc/cpuinfo
  31. */
  32. const char bfin_board_name[] = "ADI BF548-EZKIT";
  33. /*
  34. * Driver needs to know address, irq and flag pin.
  35. */
  36. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  37. #include <linux/usb/isp1760.h>
  38. static struct resource bfin_isp1760_resources[] = {
  39. [0] = {
  40. .start = 0x2C0C0000,
  41. .end = 0x2C0C0000 + 0xfffff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_PG7,
  46. .end = IRQ_PG7,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. };
  50. static struct isp1760_platform_data isp1760_priv = {
  51. .is_isp1761 = 0,
  52. .bus_width_16 = 1,
  53. .port1_otg = 0,
  54. .analog_oc = 0,
  55. .dack_polarity_high = 0,
  56. .dreq_polarity_high = 0,
  57. };
  58. static struct platform_device bfin_isp1760_device = {
  59. .name = "isp1760",
  60. .id = 0,
  61. .dev = {
  62. .platform_data = &isp1760_priv,
  63. },
  64. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  65. .resource = bfin_isp1760_resources,
  66. };
  67. #endif
  68. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  69. #include <mach/bf54x-lq043.h>
  70. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  71. .width = 95,
  72. .height = 54,
  73. .xres = {480, 480, 480},
  74. .yres = {272, 272, 272},
  75. .bpp = {24, 24, 24},
  76. .disp = GPIO_PE3,
  77. };
  78. static struct resource bf54x_lq043_resources[] = {
  79. {
  80. .start = IRQ_EPPI0_ERR,
  81. .end = IRQ_EPPI0_ERR,
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. static struct platform_device bf54x_lq043_device = {
  86. .name = "bf54x-lq043",
  87. .id = -1,
  88. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  89. .resource = bf54x_lq043_resources,
  90. .dev = {
  91. .platform_data = &bf54x_lq043_data,
  92. },
  93. };
  94. #endif
  95. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  96. static const unsigned int bf548_keymap[] = {
  97. KEYVAL(0, 0, KEY_ENTER),
  98. KEYVAL(0, 1, KEY_HELP),
  99. KEYVAL(0, 2, KEY_0),
  100. KEYVAL(0, 3, KEY_BACKSPACE),
  101. KEYVAL(1, 0, KEY_TAB),
  102. KEYVAL(1, 1, KEY_9),
  103. KEYVAL(1, 2, KEY_8),
  104. KEYVAL(1, 3, KEY_7),
  105. KEYVAL(2, 0, KEY_DOWN),
  106. KEYVAL(2, 1, KEY_6),
  107. KEYVAL(2, 2, KEY_5),
  108. KEYVAL(2, 3, KEY_4),
  109. KEYVAL(3, 0, KEY_UP),
  110. KEYVAL(3, 1, KEY_3),
  111. KEYVAL(3, 2, KEY_2),
  112. KEYVAL(3, 3, KEY_1),
  113. };
  114. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  115. .rows = 4,
  116. .cols = 4,
  117. .keymap = bf548_keymap,
  118. .keymapsize = ARRAY_SIZE(bf548_keymap),
  119. .repeat = 0,
  120. .debounce_time = 5000, /* ns (5ms) */
  121. .coldrive_time = 1000, /* ns (1ms) */
  122. .keyup_test_interval = 50, /* ms (50ms) */
  123. };
  124. static struct resource bf54x_kpad_resources[] = {
  125. {
  126. .start = IRQ_KEY,
  127. .end = IRQ_KEY,
  128. .flags = IORESOURCE_IRQ,
  129. },
  130. };
  131. static struct platform_device bf54x_kpad_device = {
  132. .name = "bf54x-keys",
  133. .id = -1,
  134. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  135. .resource = bf54x_kpad_resources,
  136. .dev = {
  137. .platform_data = &bf54x_kpad_data,
  138. },
  139. };
  140. #endif
  141. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  142. #include <asm/bfin_rotary.h>
  143. static struct bfin_rotary_platform_data bfin_rotary_data = {
  144. /*.rotary_up_key = KEY_UP,*/
  145. /*.rotary_down_key = KEY_DOWN,*/
  146. .rotary_rel_code = REL_WHEEL,
  147. .rotary_button_key = KEY_ENTER,
  148. .debounce = 10, /* 0..17 */
  149. .mode = ROT_QUAD_ENC | ROT_DEBE,
  150. };
  151. static struct resource bfin_rotary_resources[] = {
  152. {
  153. .start = IRQ_CNT,
  154. .end = IRQ_CNT,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. };
  158. static struct platform_device bfin_rotary_device = {
  159. .name = "bfin-rotary",
  160. .id = -1,
  161. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  162. .resource = bfin_rotary_resources,
  163. .dev = {
  164. .platform_data = &bfin_rotary_data,
  165. },
  166. };
  167. #endif
  168. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  169. #include <linux/input/adxl34x.h>
  170. static const struct adxl34x_platform_data adxl34x_info = {
  171. .x_axis_offset = 0,
  172. .y_axis_offset = 0,
  173. .z_axis_offset = 0,
  174. .tap_threshold = 0x31,
  175. .tap_duration = 0x10,
  176. .tap_latency = 0x60,
  177. .tap_window = 0xF0,
  178. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  179. .act_axis_control = 0xFF,
  180. .activity_threshold = 5,
  181. .inactivity_threshold = 3,
  182. .inactivity_time = 4,
  183. .free_fall_threshold = 0x7,
  184. .free_fall_time = 0x20,
  185. .data_rate = 0x8,
  186. .data_range = ADXL_FULL_RES,
  187. .ev_type = EV_ABS,
  188. .ev_code_x = ABS_X, /* EV_REL */
  189. .ev_code_y = ABS_Y, /* EV_REL */
  190. .ev_code_z = ABS_Z, /* EV_REL */
  191. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  192. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  193. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  194. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  195. .fifo_mode = ADXL_FIFO_STREAM,
  196. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  197. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  198. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  199. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  200. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  201. };
  202. #endif
  203. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  204. static struct platform_device rtc_device = {
  205. .name = "rtc-bfin",
  206. .id = -1,
  207. };
  208. #endif
  209. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  210. #ifdef CONFIG_SERIAL_BFIN_UART0
  211. static struct resource bfin_uart0_resources[] = {
  212. {
  213. .start = UART0_DLL,
  214. .end = UART0_RBR+2,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. {
  218. .start = IRQ_UART0_RX,
  219. .end = IRQ_UART0_RX+1,
  220. .flags = IORESOURCE_IRQ,
  221. },
  222. {
  223. .start = IRQ_UART0_ERROR,
  224. .end = IRQ_UART0_ERROR,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. {
  228. .start = CH_UART0_TX,
  229. .end = CH_UART0_TX,
  230. .flags = IORESOURCE_DMA,
  231. },
  232. {
  233. .start = CH_UART0_RX,
  234. .end = CH_UART0_RX,
  235. .flags = IORESOURCE_DMA,
  236. },
  237. };
  238. static unsigned short bfin_uart0_peripherals[] = {
  239. P_UART0_TX, P_UART0_RX, 0
  240. };
  241. static struct platform_device bfin_uart0_device = {
  242. .name = "bfin-uart",
  243. .id = 0,
  244. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  245. .resource = bfin_uart0_resources,
  246. .dev = {
  247. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  248. },
  249. };
  250. #endif
  251. #ifdef CONFIG_SERIAL_BFIN_UART1
  252. static struct resource bfin_uart1_resources[] = {
  253. {
  254. .start = UART1_DLL,
  255. .end = UART1_RBR+2,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. {
  259. .start = IRQ_UART1_RX,
  260. .end = IRQ_UART1_RX+1,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. {
  264. .start = IRQ_UART1_ERROR,
  265. .end = IRQ_UART1_ERROR,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. {
  269. .start = CH_UART1_TX,
  270. .end = CH_UART1_TX,
  271. .flags = IORESOURCE_DMA,
  272. },
  273. {
  274. .start = CH_UART1_RX,
  275. .end = CH_UART1_RX,
  276. .flags = IORESOURCE_DMA,
  277. },
  278. #ifdef CONFIG_BFIN_UART1_CTSRTS
  279. { /* CTS pin -- 0 means not supported */
  280. .start = GPIO_PE10,
  281. .end = GPIO_PE10,
  282. .flags = IORESOURCE_IO,
  283. },
  284. { /* RTS pin -- 0 means not supported */
  285. .start = GPIO_PE9,
  286. .end = GPIO_PE9,
  287. .flags = IORESOURCE_IO,
  288. },
  289. #endif
  290. };
  291. static unsigned short bfin_uart1_peripherals[] = {
  292. P_UART1_TX, P_UART1_RX,
  293. #ifdef CONFIG_BFIN_UART1_CTSRTS
  294. P_UART1_RTS, P_UART1_CTS,
  295. #endif
  296. 0
  297. };
  298. static struct platform_device bfin_uart1_device = {
  299. .name = "bfin-uart",
  300. .id = 1,
  301. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  302. .resource = bfin_uart1_resources,
  303. .dev = {
  304. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  305. },
  306. };
  307. #endif
  308. #ifdef CONFIG_SERIAL_BFIN_UART2
  309. static struct resource bfin_uart2_resources[] = {
  310. {
  311. .start = UART2_DLL,
  312. .end = UART2_RBR+2,
  313. .flags = IORESOURCE_MEM,
  314. },
  315. {
  316. .start = IRQ_UART2_RX,
  317. .end = IRQ_UART2_RX+1,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. {
  321. .start = IRQ_UART2_ERROR,
  322. .end = IRQ_UART2_ERROR,
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. {
  326. .start = CH_UART2_TX,
  327. .end = CH_UART2_TX,
  328. .flags = IORESOURCE_DMA,
  329. },
  330. {
  331. .start = CH_UART2_RX,
  332. .end = CH_UART2_RX,
  333. .flags = IORESOURCE_DMA,
  334. },
  335. };
  336. static unsigned short bfin_uart2_peripherals[] = {
  337. P_UART2_TX, P_UART2_RX, 0
  338. };
  339. static struct platform_device bfin_uart2_device = {
  340. .name = "bfin-uart",
  341. .id = 2,
  342. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  343. .resource = bfin_uart2_resources,
  344. .dev = {
  345. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  346. },
  347. };
  348. #endif
  349. #ifdef CONFIG_SERIAL_BFIN_UART3
  350. static struct resource bfin_uart3_resources[] = {
  351. {
  352. .start = UART3_DLL,
  353. .end = UART3_RBR+2,
  354. .flags = IORESOURCE_MEM,
  355. },
  356. {
  357. .start = IRQ_UART3_RX,
  358. .end = IRQ_UART3_RX+1,
  359. .flags = IORESOURCE_IRQ,
  360. },
  361. {
  362. .start = IRQ_UART3_ERROR,
  363. .end = IRQ_UART3_ERROR,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. {
  367. .start = CH_UART3_TX,
  368. .end = CH_UART3_TX,
  369. .flags = IORESOURCE_DMA,
  370. },
  371. {
  372. .start = CH_UART3_RX,
  373. .end = CH_UART3_RX,
  374. .flags = IORESOURCE_DMA,
  375. },
  376. #ifdef CONFIG_BFIN_UART3_CTSRTS
  377. { /* CTS pin -- 0 means not supported */
  378. .start = GPIO_PB3,
  379. .end = GPIO_PB3,
  380. .flags = IORESOURCE_IO,
  381. },
  382. { /* RTS pin -- 0 means not supported */
  383. .start = GPIO_PB2,
  384. .end = GPIO_PB2,
  385. .flags = IORESOURCE_IO,
  386. },
  387. #endif
  388. };
  389. static unsigned short bfin_uart3_peripherals[] = {
  390. P_UART3_TX, P_UART3_RX,
  391. #ifdef CONFIG_BFIN_UART3_CTSRTS
  392. P_UART3_RTS, P_UART3_CTS,
  393. #endif
  394. 0
  395. };
  396. static struct platform_device bfin_uart3_device = {
  397. .name = "bfin-uart",
  398. .id = 3,
  399. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  400. .resource = bfin_uart3_resources,
  401. .dev = {
  402. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  403. },
  404. };
  405. #endif
  406. #endif
  407. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  408. #ifdef CONFIG_BFIN_SIR0
  409. static struct resource bfin_sir0_resources[] = {
  410. {
  411. .start = 0xFFC00400,
  412. .end = 0xFFC004FF,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = IRQ_UART0_RX,
  417. .end = IRQ_UART0_RX+1,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. {
  421. .start = CH_UART0_RX,
  422. .end = CH_UART0_RX+1,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. static struct platform_device bfin_sir0_device = {
  427. .name = "bfin_sir",
  428. .id = 0,
  429. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  430. .resource = bfin_sir0_resources,
  431. };
  432. #endif
  433. #ifdef CONFIG_BFIN_SIR1
  434. static struct resource bfin_sir1_resources[] = {
  435. {
  436. .start = 0xFFC02000,
  437. .end = 0xFFC020FF,
  438. .flags = IORESOURCE_MEM,
  439. },
  440. {
  441. .start = IRQ_UART1_RX,
  442. .end = IRQ_UART1_RX+1,
  443. .flags = IORESOURCE_IRQ,
  444. },
  445. {
  446. .start = CH_UART1_RX,
  447. .end = CH_UART1_RX+1,
  448. .flags = IORESOURCE_DMA,
  449. },
  450. };
  451. static struct platform_device bfin_sir1_device = {
  452. .name = "bfin_sir",
  453. .id = 1,
  454. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  455. .resource = bfin_sir1_resources,
  456. };
  457. #endif
  458. #ifdef CONFIG_BFIN_SIR2
  459. static struct resource bfin_sir2_resources[] = {
  460. {
  461. .start = 0xFFC02100,
  462. .end = 0xFFC021FF,
  463. .flags = IORESOURCE_MEM,
  464. },
  465. {
  466. .start = IRQ_UART2_RX,
  467. .end = IRQ_UART2_RX+1,
  468. .flags = IORESOURCE_IRQ,
  469. },
  470. {
  471. .start = CH_UART2_RX,
  472. .end = CH_UART2_RX+1,
  473. .flags = IORESOURCE_DMA,
  474. },
  475. };
  476. static struct platform_device bfin_sir2_device = {
  477. .name = "bfin_sir",
  478. .id = 2,
  479. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  480. .resource = bfin_sir2_resources,
  481. };
  482. #endif
  483. #ifdef CONFIG_BFIN_SIR3
  484. static struct resource bfin_sir3_resources[] = {
  485. {
  486. .start = 0xFFC03100,
  487. .end = 0xFFC031FF,
  488. .flags = IORESOURCE_MEM,
  489. },
  490. {
  491. .start = IRQ_UART3_RX,
  492. .end = IRQ_UART3_RX+1,
  493. .flags = IORESOURCE_IRQ,
  494. },
  495. {
  496. .start = CH_UART3_RX,
  497. .end = CH_UART3_RX+1,
  498. .flags = IORESOURCE_DMA,
  499. },
  500. };
  501. static struct platform_device bfin_sir3_device = {
  502. .name = "bfin_sir",
  503. .id = 3,
  504. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  505. .resource = bfin_sir3_resources,
  506. };
  507. #endif
  508. #endif
  509. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  510. #include <linux/smsc911x.h>
  511. static struct resource smsc911x_resources[] = {
  512. {
  513. .name = "smsc911x-memory",
  514. .start = 0x24000000,
  515. .end = 0x24000000 + 0xFF,
  516. .flags = IORESOURCE_MEM,
  517. },
  518. {
  519. .start = IRQ_PE8,
  520. .end = IRQ_PE8,
  521. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  522. },
  523. };
  524. static struct smsc911x_platform_config smsc911x_config = {
  525. .flags = SMSC911X_USE_32BIT,
  526. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  527. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  528. .phy_interface = PHY_INTERFACE_MODE_MII,
  529. };
  530. static struct platform_device smsc911x_device = {
  531. .name = "smsc911x",
  532. .id = 0,
  533. .num_resources = ARRAY_SIZE(smsc911x_resources),
  534. .resource = smsc911x_resources,
  535. .dev = {
  536. .platform_data = &smsc911x_config,
  537. },
  538. };
  539. #endif
  540. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  541. static struct resource musb_resources[] = {
  542. [0] = {
  543. .start = 0xFFC03C00,
  544. .end = 0xFFC040FF,
  545. .flags = IORESOURCE_MEM,
  546. },
  547. [1] = { /* general IRQ */
  548. .start = IRQ_USB_INT0,
  549. .end = IRQ_USB_INT0,
  550. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  551. .name = "mc"
  552. },
  553. [2] = { /* DMA IRQ */
  554. .start = IRQ_USB_DMA,
  555. .end = IRQ_USB_DMA,
  556. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  557. .name = "dma"
  558. },
  559. };
  560. static struct musb_hdrc_config musb_config = {
  561. .multipoint = 0,
  562. .dyn_fifo = 0,
  563. .soft_con = 1,
  564. .dma = 1,
  565. .num_eps = 8,
  566. .dma_channels = 8,
  567. .gpio_vrsel = GPIO_PE7,
  568. /* Some custom boards need to be active low, just set it to "0"
  569. * if it is the case.
  570. */
  571. .gpio_vrsel_active = 1,
  572. .clkin = 24, /* musb CLKIN in MHZ */
  573. };
  574. static struct musb_hdrc_platform_data musb_plat = {
  575. #if defined(CONFIG_USB_MUSB_OTG)
  576. .mode = MUSB_OTG,
  577. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  578. .mode = MUSB_HOST,
  579. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  580. .mode = MUSB_PERIPHERAL,
  581. #endif
  582. .config = &musb_config,
  583. };
  584. static u64 musb_dmamask = ~(u32)0;
  585. static struct platform_device musb_device = {
  586. .name = "musb-blackfin",
  587. .id = 0,
  588. .dev = {
  589. .dma_mask = &musb_dmamask,
  590. .coherent_dma_mask = 0xffffffff,
  591. .platform_data = &musb_plat,
  592. },
  593. .num_resources = ARRAY_SIZE(musb_resources),
  594. .resource = musb_resources,
  595. };
  596. #endif
  597. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  598. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  599. static struct resource bfin_sport0_uart_resources[] = {
  600. {
  601. .start = SPORT0_TCR1,
  602. .end = SPORT0_MRCS3+4,
  603. .flags = IORESOURCE_MEM,
  604. },
  605. {
  606. .start = IRQ_SPORT0_RX,
  607. .end = IRQ_SPORT0_RX+1,
  608. .flags = IORESOURCE_IRQ,
  609. },
  610. {
  611. .start = IRQ_SPORT0_ERROR,
  612. .end = IRQ_SPORT0_ERROR,
  613. .flags = IORESOURCE_IRQ,
  614. },
  615. };
  616. static unsigned short bfin_sport0_peripherals[] = {
  617. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  618. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  619. };
  620. static struct platform_device bfin_sport0_uart_device = {
  621. .name = "bfin-sport-uart",
  622. .id = 0,
  623. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  624. .resource = bfin_sport0_uart_resources,
  625. .dev = {
  626. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  627. },
  628. };
  629. #endif
  630. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  631. static struct resource bfin_sport1_uart_resources[] = {
  632. {
  633. .start = SPORT1_TCR1,
  634. .end = SPORT1_MRCS3+4,
  635. .flags = IORESOURCE_MEM,
  636. },
  637. {
  638. .start = IRQ_SPORT1_RX,
  639. .end = IRQ_SPORT1_RX+1,
  640. .flags = IORESOURCE_IRQ,
  641. },
  642. {
  643. .start = IRQ_SPORT1_ERROR,
  644. .end = IRQ_SPORT1_ERROR,
  645. .flags = IORESOURCE_IRQ,
  646. },
  647. };
  648. static unsigned short bfin_sport1_peripherals[] = {
  649. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  650. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  651. };
  652. static struct platform_device bfin_sport1_uart_device = {
  653. .name = "bfin-sport-uart",
  654. .id = 1,
  655. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  656. .resource = bfin_sport1_uart_resources,
  657. .dev = {
  658. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  659. },
  660. };
  661. #endif
  662. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  663. static struct resource bfin_sport2_uart_resources[] = {
  664. {
  665. .start = SPORT2_TCR1,
  666. .end = SPORT2_MRCS3+4,
  667. .flags = IORESOURCE_MEM,
  668. },
  669. {
  670. .start = IRQ_SPORT2_RX,
  671. .end = IRQ_SPORT2_RX+1,
  672. .flags = IORESOURCE_IRQ,
  673. },
  674. {
  675. .start = IRQ_SPORT2_ERROR,
  676. .end = IRQ_SPORT2_ERROR,
  677. .flags = IORESOURCE_IRQ,
  678. },
  679. };
  680. static unsigned short bfin_sport2_peripherals[] = {
  681. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  682. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  683. };
  684. static struct platform_device bfin_sport2_uart_device = {
  685. .name = "bfin-sport-uart",
  686. .id = 2,
  687. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  688. .resource = bfin_sport2_uart_resources,
  689. .dev = {
  690. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  691. },
  692. };
  693. #endif
  694. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  695. static struct resource bfin_sport3_uart_resources[] = {
  696. {
  697. .start = SPORT3_TCR1,
  698. .end = SPORT3_MRCS3+4,
  699. .flags = IORESOURCE_MEM,
  700. },
  701. {
  702. .start = IRQ_SPORT3_RX,
  703. .end = IRQ_SPORT3_RX+1,
  704. .flags = IORESOURCE_IRQ,
  705. },
  706. {
  707. .start = IRQ_SPORT3_ERROR,
  708. .end = IRQ_SPORT3_ERROR,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. };
  712. static unsigned short bfin_sport3_peripherals[] = {
  713. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  714. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  715. };
  716. static struct platform_device bfin_sport3_uart_device = {
  717. .name = "bfin-sport-uart",
  718. .id = 3,
  719. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  720. .resource = bfin_sport3_uart_resources,
  721. .dev = {
  722. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  723. },
  724. };
  725. #endif
  726. #endif
  727. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  728. static unsigned short bfin_can0_peripherals[] = {
  729. P_CAN0_RX, P_CAN0_TX, 0
  730. };
  731. static struct resource bfin_can0_resources[] = {
  732. {
  733. .start = 0xFFC02A00,
  734. .end = 0xFFC02FFF,
  735. .flags = IORESOURCE_MEM,
  736. },
  737. {
  738. .start = IRQ_CAN0_RX,
  739. .end = IRQ_CAN0_RX,
  740. .flags = IORESOURCE_IRQ,
  741. },
  742. {
  743. .start = IRQ_CAN0_TX,
  744. .end = IRQ_CAN0_TX,
  745. .flags = IORESOURCE_IRQ,
  746. },
  747. {
  748. .start = IRQ_CAN0_ERROR,
  749. .end = IRQ_CAN0_ERROR,
  750. .flags = IORESOURCE_IRQ,
  751. },
  752. };
  753. static struct platform_device bfin_can0_device = {
  754. .name = "bfin_can",
  755. .id = 0,
  756. .num_resources = ARRAY_SIZE(bfin_can0_resources),
  757. .resource = bfin_can0_resources,
  758. .dev = {
  759. .platform_data = &bfin_can0_peripherals, /* Passed to driver */
  760. },
  761. };
  762. static unsigned short bfin_can1_peripherals[] = {
  763. P_CAN1_RX, P_CAN1_TX, 0
  764. };
  765. static struct resource bfin_can1_resources[] = {
  766. {
  767. .start = 0xFFC03200,
  768. .end = 0xFFC037FF,
  769. .flags = IORESOURCE_MEM,
  770. },
  771. {
  772. .start = IRQ_CAN1_RX,
  773. .end = IRQ_CAN1_RX,
  774. .flags = IORESOURCE_IRQ,
  775. },
  776. {
  777. .start = IRQ_CAN1_TX,
  778. .end = IRQ_CAN1_TX,
  779. .flags = IORESOURCE_IRQ,
  780. },
  781. {
  782. .start = IRQ_CAN1_ERROR,
  783. .end = IRQ_CAN1_ERROR,
  784. .flags = IORESOURCE_IRQ,
  785. },
  786. };
  787. static struct platform_device bfin_can1_device = {
  788. .name = "bfin_can",
  789. .id = 1,
  790. .num_resources = ARRAY_SIZE(bfin_can1_resources),
  791. .resource = bfin_can1_resources,
  792. .dev = {
  793. .platform_data = &bfin_can1_peripherals, /* Passed to driver */
  794. },
  795. };
  796. #endif
  797. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  798. static struct resource bfin_atapi_resources[] = {
  799. {
  800. .start = 0xFFC03800,
  801. .end = 0xFFC0386F,
  802. .flags = IORESOURCE_MEM,
  803. },
  804. {
  805. .start = IRQ_ATAPI_ERR,
  806. .end = IRQ_ATAPI_ERR,
  807. .flags = IORESOURCE_IRQ,
  808. },
  809. };
  810. static struct platform_device bfin_atapi_device = {
  811. .name = "pata-bf54x",
  812. .id = -1,
  813. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  814. .resource = bfin_atapi_resources,
  815. };
  816. #endif
  817. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  818. static struct mtd_partition partition_info[] = {
  819. {
  820. .name = "bootloader(nand)",
  821. .offset = 0,
  822. .size = 0x80000,
  823. }, {
  824. .name = "linux kernel(nand)",
  825. .offset = MTDPART_OFS_APPEND,
  826. .size = 4 * 1024 * 1024,
  827. },
  828. {
  829. .name = "file system(nand)",
  830. .offset = MTDPART_OFS_APPEND,
  831. .size = MTDPART_SIZ_FULL,
  832. },
  833. };
  834. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  835. .data_width = NFC_NWIDTH_8,
  836. .partitions = partition_info,
  837. .nr_partitions = ARRAY_SIZE(partition_info),
  838. .rd_dly = 3,
  839. .wr_dly = 3,
  840. };
  841. static struct resource bf5xx_nand_resources[] = {
  842. {
  843. .start = 0xFFC03B00,
  844. .end = 0xFFC03B4F,
  845. .flags = IORESOURCE_MEM,
  846. },
  847. {
  848. .start = CH_NFC,
  849. .end = CH_NFC,
  850. .flags = IORESOURCE_IRQ,
  851. },
  852. };
  853. static struct platform_device bf5xx_nand_device = {
  854. .name = "bf5xx-nand",
  855. .id = 0,
  856. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  857. .resource = bf5xx_nand_resources,
  858. .dev = {
  859. .platform_data = &bf5xx_nand_platform,
  860. },
  861. };
  862. #endif
  863. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  864. static struct bfin_sd_host bfin_sdh_data = {
  865. .dma_chan = CH_SDH,
  866. .irq_int0 = IRQ_SDH_MASK0,
  867. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  868. };
  869. static struct platform_device bf54x_sdh_device = {
  870. .name = "bfin-sdh",
  871. .id = 0,
  872. .dev = {
  873. .platform_data = &bfin_sdh_data,
  874. },
  875. };
  876. #endif
  877. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  878. static struct mtd_partition ezkit_partitions[] = {
  879. {
  880. .name = "bootloader(nor)",
  881. .size = 0x80000,
  882. .offset = 0,
  883. }, {
  884. .name = "linux kernel(nor)",
  885. .size = 0x400000,
  886. .offset = MTDPART_OFS_APPEND,
  887. }, {
  888. .name = "file system(nor)",
  889. .size = MTDPART_SIZ_FULL,
  890. .offset = MTDPART_OFS_APPEND,
  891. }
  892. };
  893. static struct physmap_flash_data ezkit_flash_data = {
  894. .width = 2,
  895. .parts = ezkit_partitions,
  896. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  897. };
  898. static struct resource ezkit_flash_resource = {
  899. .start = 0x20000000,
  900. .end = 0x21ffffff,
  901. .flags = IORESOURCE_MEM,
  902. };
  903. static struct platform_device ezkit_flash_device = {
  904. .name = "physmap-flash",
  905. .id = 0,
  906. .dev = {
  907. .platform_data = &ezkit_flash_data,
  908. },
  909. .num_resources = 1,
  910. .resource = &ezkit_flash_resource,
  911. };
  912. #endif
  913. #if defined(CONFIG_MTD_M25P80) \
  914. || defined(CONFIG_MTD_M25P80_MODULE)
  915. /* SPI flash chip (m25p16) */
  916. static struct mtd_partition bfin_spi_flash_partitions[] = {
  917. {
  918. .name = "bootloader(spi)",
  919. .size = 0x00080000,
  920. .offset = 0,
  921. .mask_flags = MTD_CAP_ROM
  922. }, {
  923. .name = "linux kernel(spi)",
  924. .size = MTDPART_SIZ_FULL,
  925. .offset = MTDPART_OFS_APPEND,
  926. }
  927. };
  928. static struct flash_platform_data bfin_spi_flash_data = {
  929. .name = "m25p80",
  930. .parts = bfin_spi_flash_partitions,
  931. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  932. .type = "m25p16",
  933. };
  934. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  935. .enable_dma = 0, /* use dma transfer with this chip*/
  936. .bits_per_word = 8,
  937. };
  938. #endif
  939. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  940. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  941. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  942. .enable_dma = 0,
  943. .bits_per_word = 16,
  944. };
  945. #endif
  946. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  947. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  948. .enable_dma = 0,
  949. .bits_per_word = 16,
  950. };
  951. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  952. .model = 7877,
  953. .vref_delay_usecs = 50, /* internal, no capacitor */
  954. .x_plate_ohms = 419,
  955. .y_plate_ohms = 486,
  956. .pressure_max = 1000,
  957. .pressure_min = 0,
  958. .stopacq_polarity = 1,
  959. .first_conversion_delay = 3,
  960. .acquisition_time = 1,
  961. .averaging = 1,
  962. .pen_down_acc_interval = 1,
  963. };
  964. #endif
  965. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  966. static struct bfin5xx_spi_chip spidev_chip_info = {
  967. .enable_dma = 0,
  968. .bits_per_word = 8,
  969. };
  970. #endif
  971. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  972. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  973. .enable_dma = 0, /* use dma transfer with this chip*/
  974. .bits_per_word = 8,
  975. };
  976. #endif
  977. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  978. #if defined(CONFIG_MTD_M25P80) \
  979. || defined(CONFIG_MTD_M25P80_MODULE)
  980. {
  981. /* the modalias must be the same as spi device driver name */
  982. .modalias = "m25p80", /* Name of spi_driver for this device */
  983. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  984. .bus_num = 0, /* Framework bus number */
  985. .chip_select = 1, /* SPI_SSEL1*/
  986. .platform_data = &bfin_spi_flash_data,
  987. .controller_data = &spi_flash_chip_info,
  988. .mode = SPI_MODE_3,
  989. },
  990. #endif
  991. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  992. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  993. {
  994. .modalias = "ad183x",
  995. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  996. .bus_num = 1,
  997. .chip_select = 4,
  998. .controller_data = &ad1836_spi_chip_info,
  999. },
  1000. #endif
  1001. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1002. {
  1003. .modalias = "ad7877",
  1004. .platform_data = &bfin_ad7877_ts_info,
  1005. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  1006. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1007. .bus_num = 0,
  1008. .chip_select = 2,
  1009. .controller_data = &spi_ad7877_chip_info,
  1010. },
  1011. #endif
  1012. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1013. {
  1014. .modalias = "spidev",
  1015. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1016. .bus_num = 0,
  1017. .chip_select = 1,
  1018. .controller_data = &spidev_chip_info,
  1019. },
  1020. #endif
  1021. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1022. {
  1023. .modalias = "adxl34x",
  1024. .platform_data = &adxl34x_info,
  1025. .irq = IRQ_PC5,
  1026. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1027. .bus_num = 1,
  1028. .chip_select = 2,
  1029. .controller_data = &spi_adxl34x_chip_info,
  1030. .mode = SPI_MODE_3,
  1031. },
  1032. #endif
  1033. };
  1034. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1035. /* SPI (0) */
  1036. static struct resource bfin_spi0_resource[] = {
  1037. [0] = {
  1038. .start = SPI0_REGBASE,
  1039. .end = SPI0_REGBASE + 0xFF,
  1040. .flags = IORESOURCE_MEM,
  1041. },
  1042. [1] = {
  1043. .start = CH_SPI0,
  1044. .end = CH_SPI0,
  1045. .flags = IORESOURCE_DMA,
  1046. },
  1047. [2] = {
  1048. .start = IRQ_SPI0,
  1049. .end = IRQ_SPI0,
  1050. .flags = IORESOURCE_IRQ,
  1051. }
  1052. };
  1053. /* SPI (1) */
  1054. static struct resource bfin_spi1_resource[] = {
  1055. [0] = {
  1056. .start = SPI1_REGBASE,
  1057. .end = SPI1_REGBASE + 0xFF,
  1058. .flags = IORESOURCE_MEM,
  1059. },
  1060. [1] = {
  1061. .start = CH_SPI1,
  1062. .end = CH_SPI1,
  1063. .flags = IORESOURCE_DMA,
  1064. },
  1065. [2] = {
  1066. .start = IRQ_SPI1,
  1067. .end = IRQ_SPI1,
  1068. .flags = IORESOURCE_IRQ,
  1069. }
  1070. };
  1071. /* SPI controller data */
  1072. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  1073. .num_chipselect = 4,
  1074. .enable_dma = 1, /* master has the ability to do dma transfer */
  1075. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1076. };
  1077. static struct platform_device bf54x_spi_master0 = {
  1078. .name = "bfin-spi",
  1079. .id = 0, /* Bus number */
  1080. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1081. .resource = bfin_spi0_resource,
  1082. .dev = {
  1083. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  1084. },
  1085. };
  1086. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  1087. .num_chipselect = 4,
  1088. .enable_dma = 1, /* master has the ability to do dma transfer */
  1089. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  1090. };
  1091. static struct platform_device bf54x_spi_master1 = {
  1092. .name = "bfin-spi",
  1093. .id = 1, /* Bus number */
  1094. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  1095. .resource = bfin_spi1_resource,
  1096. .dev = {
  1097. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  1098. },
  1099. };
  1100. #endif /* spi master and devices */
  1101. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1102. static struct resource bfin_twi0_resource[] = {
  1103. [0] = {
  1104. .start = TWI0_REGBASE,
  1105. .end = TWI0_REGBASE + 0xFF,
  1106. .flags = IORESOURCE_MEM,
  1107. },
  1108. [1] = {
  1109. .start = IRQ_TWI0,
  1110. .end = IRQ_TWI0,
  1111. .flags = IORESOURCE_IRQ,
  1112. },
  1113. };
  1114. static struct platform_device i2c_bfin_twi0_device = {
  1115. .name = "i2c-bfin-twi",
  1116. .id = 0,
  1117. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1118. .resource = bfin_twi0_resource,
  1119. };
  1120. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1121. static struct resource bfin_twi1_resource[] = {
  1122. [0] = {
  1123. .start = TWI1_REGBASE,
  1124. .end = TWI1_REGBASE + 0xFF,
  1125. .flags = IORESOURCE_MEM,
  1126. },
  1127. [1] = {
  1128. .start = IRQ_TWI1,
  1129. .end = IRQ_TWI1,
  1130. .flags = IORESOURCE_IRQ,
  1131. },
  1132. };
  1133. static struct platform_device i2c_bfin_twi1_device = {
  1134. .name = "i2c-bfin-twi",
  1135. .id = 1,
  1136. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1137. .resource = bfin_twi1_resource,
  1138. };
  1139. #endif
  1140. #endif
  1141. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1142. };
  1143. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1144. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1145. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1146. {
  1147. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1148. },
  1149. #endif
  1150. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1151. {
  1152. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1153. .irq = 212,
  1154. },
  1155. #endif
  1156. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1157. {
  1158. I2C_BOARD_INFO("adxl34x", 0x53),
  1159. .irq = IRQ_PC5,
  1160. .platform_data = (void *)&adxl34x_info,
  1161. },
  1162. #endif
  1163. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1164. {
  1165. I2C_BOARD_INFO("ad5252", 0x2f),
  1166. },
  1167. #endif
  1168. };
  1169. #endif
  1170. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1171. #include <linux/gpio_keys.h>
  1172. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  1173. {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
  1174. {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
  1175. {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
  1176. {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
  1177. };
  1178. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  1179. .buttons = bfin_gpio_keys_table,
  1180. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  1181. };
  1182. static struct platform_device bfin_device_gpiokeys = {
  1183. .name = "gpio-keys",
  1184. .dev = {
  1185. .platform_data = &bfin_gpio_keys_data,
  1186. },
  1187. };
  1188. #endif
  1189. static const unsigned int cclk_vlev_datasheet[] =
  1190. {
  1191. /*
  1192. * Internal VLEV BF54XSBBC1533
  1193. ****temporarily using these values until data sheet is updated
  1194. */
  1195. VRPAIR(VLEV_085, 150000000),
  1196. VRPAIR(VLEV_090, 250000000),
  1197. VRPAIR(VLEV_110, 276000000),
  1198. VRPAIR(VLEV_115, 301000000),
  1199. VRPAIR(VLEV_120, 525000000),
  1200. VRPAIR(VLEV_125, 550000000),
  1201. VRPAIR(VLEV_130, 600000000),
  1202. };
  1203. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1204. .tuple_tab = cclk_vlev_datasheet,
  1205. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1206. .vr_settling_time = 25 /* us */,
  1207. };
  1208. static struct platform_device bfin_dpmc = {
  1209. .name = "bfin dpmc",
  1210. .dev = {
  1211. .platform_data = &bfin_dmpc_vreg_data,
  1212. },
  1213. };
  1214. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1215. static struct platform_device bfin_i2s = {
  1216. .name = "bfin-i2s",
  1217. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1218. /* TODO: add platform data here */
  1219. };
  1220. #endif
  1221. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1222. static struct platform_device bfin_tdm = {
  1223. .name = "bfin-tdm",
  1224. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1225. /* TODO: add platform data here */
  1226. };
  1227. #endif
  1228. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1229. static struct platform_device bfin_ac97 = {
  1230. .name = "bfin-ac97",
  1231. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1232. /* TODO: add platform data here */
  1233. };
  1234. #endif
  1235. static struct platform_device *ezkit_devices[] __initdata = {
  1236. &bfin_dpmc,
  1237. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1238. &rtc_device,
  1239. #endif
  1240. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1241. #ifdef CONFIG_SERIAL_BFIN_UART0
  1242. &bfin_uart0_device,
  1243. #endif
  1244. #ifdef CONFIG_SERIAL_BFIN_UART1
  1245. &bfin_uart1_device,
  1246. #endif
  1247. #ifdef CONFIG_SERIAL_BFIN_UART2
  1248. &bfin_uart2_device,
  1249. #endif
  1250. #ifdef CONFIG_SERIAL_BFIN_UART3
  1251. &bfin_uart3_device,
  1252. #endif
  1253. #endif
  1254. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1255. #ifdef CONFIG_BFIN_SIR0
  1256. &bfin_sir0_device,
  1257. #endif
  1258. #ifdef CONFIG_BFIN_SIR1
  1259. &bfin_sir1_device,
  1260. #endif
  1261. #ifdef CONFIG_BFIN_SIR2
  1262. &bfin_sir2_device,
  1263. #endif
  1264. #ifdef CONFIG_BFIN_SIR3
  1265. &bfin_sir3_device,
  1266. #endif
  1267. #endif
  1268. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1269. &bf54x_lq043_device,
  1270. #endif
  1271. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1272. &smsc911x_device,
  1273. #endif
  1274. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1275. &musb_device,
  1276. #endif
  1277. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1278. &bfin_isp1760_device,
  1279. #endif
  1280. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1281. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1282. &bfin_sport0_uart_device,
  1283. #endif
  1284. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1285. &bfin_sport1_uart_device,
  1286. #endif
  1287. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1288. &bfin_sport2_uart_device,
  1289. #endif
  1290. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1291. &bfin_sport3_uart_device,
  1292. #endif
  1293. #endif
  1294. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1295. &bfin_can0_device,
  1296. &bfin_can1_device,
  1297. #endif
  1298. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1299. &bfin_atapi_device,
  1300. #endif
  1301. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1302. &bf5xx_nand_device,
  1303. #endif
  1304. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1305. &bf54x_sdh_device,
  1306. #endif
  1307. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1308. &bf54x_spi_master0,
  1309. &bf54x_spi_master1,
  1310. #endif
  1311. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1312. &bf54x_kpad_device,
  1313. #endif
  1314. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1315. &bfin_rotary_device,
  1316. #endif
  1317. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1318. &i2c_bfin_twi0_device,
  1319. #if !defined(CONFIG_BF542)
  1320. &i2c_bfin_twi1_device,
  1321. #endif
  1322. #endif
  1323. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1324. &bfin_device_gpiokeys,
  1325. #endif
  1326. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1327. &ezkit_flash_device,
  1328. #endif
  1329. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1330. &bfin_i2s,
  1331. #endif
  1332. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1333. &bfin_tdm,
  1334. #endif
  1335. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1336. &bfin_ac97,
  1337. #endif
  1338. };
  1339. static int __init ezkit_init(void)
  1340. {
  1341. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1342. i2c_register_board_info(0, bfin_i2c_board_info0,
  1343. ARRAY_SIZE(bfin_i2c_board_info0));
  1344. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1345. i2c_register_board_info(1, bfin_i2c_board_info1,
  1346. ARRAY_SIZE(bfin_i2c_board_info1));
  1347. #endif
  1348. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1349. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1350. return 0;
  1351. }
  1352. arch_initcall(ezkit_init);
  1353. static struct platform_device *ezkit_early_devices[] __initdata = {
  1354. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1355. #ifdef CONFIG_SERIAL_BFIN_UART0
  1356. &bfin_uart0_device,
  1357. #endif
  1358. #ifdef CONFIG_SERIAL_BFIN_UART1
  1359. &bfin_uart1_device,
  1360. #endif
  1361. #ifdef CONFIG_SERIAL_BFIN_UART2
  1362. &bfin_uart2_device,
  1363. #endif
  1364. #ifdef CONFIG_SERIAL_BFIN_UART3
  1365. &bfin_uart3_device,
  1366. #endif
  1367. #endif
  1368. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1369. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1370. &bfin_sport0_uart_device,
  1371. #endif
  1372. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1373. &bfin_sport1_uart_device,
  1374. #endif
  1375. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1376. &bfin_sport2_uart_device,
  1377. #endif
  1378. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1379. &bfin_sport3_uart_device,
  1380. #endif
  1381. #endif
  1382. };
  1383. void __init native_machine_early_platform_add_devices(void)
  1384. {
  1385. printk(KERN_INFO "register early platform devices\n");
  1386. early_platform_add_devices(ezkit_early_devices,
  1387. ARRAY_SIZE(ezkit_early_devices));
  1388. }