ezkit.c 23 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/physmap.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/dma.h>
  19. #include <asm/gpio.h>
  20. #include <asm/nand.h>
  21. #include <asm/portmux.h>
  22. #include <asm/dpmc.h>
  23. #include <linux/input.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "ADI BF538-EZKIT";
  28. /*
  29. * Driver needs to know address, irq and flag pin.
  30. */
  31. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  32. static struct platform_device rtc_device = {
  33. .name = "rtc-bfin",
  34. .id = -1,
  35. };
  36. #endif
  37. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  38. #ifdef CONFIG_SERIAL_BFIN_UART0
  39. static struct resource bfin_uart0_resources[] = {
  40. {
  41. .start = UART0_THR,
  42. .end = UART0_GCTL+2,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. {
  46. .start = IRQ_UART0_RX,
  47. .end = IRQ_UART0_RX+1,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. {
  51. .start = IRQ_UART0_ERROR,
  52. .end = IRQ_UART0_ERROR,
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. {
  56. .start = CH_UART0_TX,
  57. .end = CH_UART0_TX,
  58. .flags = IORESOURCE_DMA,
  59. },
  60. {
  61. .start = CH_UART0_RX,
  62. .end = CH_UART0_RX,
  63. .flags = IORESOURCE_DMA,
  64. },
  65. #ifdef CONFIG_BFIN_UART0_CTSRTS
  66. { /* CTS pin */
  67. .start = GPIO_PG7,
  68. .end = GPIO_PG7,
  69. .flags = IORESOURCE_IO,
  70. },
  71. { /* RTS pin */
  72. .start = GPIO_PG6,
  73. .end = GPIO_PG6,
  74. .flags = IORESOURCE_IO,
  75. },
  76. #endif
  77. };
  78. static unsigned short bfin_uart0_peripherals[] = {
  79. P_UART0_TX, P_UART0_RX, 0
  80. };
  81. static struct platform_device bfin_uart0_device = {
  82. .name = "bfin-uart",
  83. .id = 0,
  84. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  85. .resource = bfin_uart0_resources,
  86. .dev = {
  87. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  88. },
  89. };
  90. #endif
  91. #ifdef CONFIG_SERIAL_BFIN_UART1
  92. static struct resource bfin_uart1_resources[] = {
  93. {
  94. .start = UART1_THR,
  95. .end = UART1_GCTL+2,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. {
  99. .start = IRQ_UART1_RX,
  100. .end = IRQ_UART1_RX+1,
  101. .flags = IORESOURCE_IRQ,
  102. },
  103. {
  104. .start = IRQ_UART1_ERROR,
  105. .end = IRQ_UART1_ERROR,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. {
  109. .start = CH_UART1_TX,
  110. .end = CH_UART1_TX,
  111. .flags = IORESOURCE_DMA,
  112. },
  113. {
  114. .start = CH_UART1_RX,
  115. .end = CH_UART1_RX,
  116. .flags = IORESOURCE_DMA,
  117. },
  118. };
  119. static unsigned short bfin_uart1_peripherals[] = {
  120. P_UART1_TX, P_UART1_RX, 0
  121. };
  122. static struct platform_device bfin_uart1_device = {
  123. .name = "bfin-uart",
  124. .id = 1,
  125. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  126. .resource = bfin_uart1_resources,
  127. .dev = {
  128. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  129. },
  130. };
  131. #endif
  132. #ifdef CONFIG_SERIAL_BFIN_UART2
  133. static struct resource bfin_uart2_resources[] = {
  134. {
  135. .start = UART2_THR,
  136. .end = UART2_GCTL+2,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. {
  140. .start = IRQ_UART2_RX,
  141. .end = IRQ_UART2_RX+1,
  142. .flags = IORESOURCE_IRQ,
  143. },
  144. {
  145. .start = IRQ_UART2_ERROR,
  146. .end = IRQ_UART2_ERROR,
  147. .flags = IORESOURCE_IRQ,
  148. },
  149. {
  150. .start = CH_UART2_TX,
  151. .end = CH_UART2_TX,
  152. .flags = IORESOURCE_DMA,
  153. },
  154. {
  155. .start = CH_UART2_RX,
  156. .end = CH_UART2_RX,
  157. .flags = IORESOURCE_DMA,
  158. },
  159. };
  160. static unsigned short bfin_uart2_peripherals[] = {
  161. P_UART2_TX, P_UART2_RX, 0
  162. };
  163. static struct platform_device bfin_uart2_device = {
  164. .name = "bfin-uart",
  165. .id = 2,
  166. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  167. .resource = bfin_uart2_resources,
  168. .dev = {
  169. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  170. },
  171. };
  172. #endif
  173. #endif
  174. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  175. #ifdef CONFIG_BFIN_SIR0
  176. static struct resource bfin_sir0_resources[] = {
  177. {
  178. .start = 0xFFC00400,
  179. .end = 0xFFC004FF,
  180. .flags = IORESOURCE_MEM,
  181. },
  182. {
  183. .start = IRQ_UART0_RX,
  184. .end = IRQ_UART0_RX+1,
  185. .flags = IORESOURCE_IRQ,
  186. },
  187. {
  188. .start = CH_UART0_RX,
  189. .end = CH_UART0_RX+1,
  190. .flags = IORESOURCE_DMA,
  191. },
  192. };
  193. static struct platform_device bfin_sir0_device = {
  194. .name = "bfin_sir",
  195. .id = 0,
  196. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  197. .resource = bfin_sir0_resources,
  198. };
  199. #endif
  200. #ifdef CONFIG_BFIN_SIR1
  201. static struct resource bfin_sir1_resources[] = {
  202. {
  203. .start = 0xFFC02000,
  204. .end = 0xFFC020FF,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. {
  208. .start = IRQ_UART1_RX,
  209. .end = IRQ_UART1_RX+1,
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. {
  213. .start = CH_UART1_RX,
  214. .end = CH_UART1_RX+1,
  215. .flags = IORESOURCE_DMA,
  216. },
  217. };
  218. static struct platform_device bfin_sir1_device = {
  219. .name = "bfin_sir",
  220. .id = 1,
  221. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  222. .resource = bfin_sir1_resources,
  223. };
  224. #endif
  225. #ifdef CONFIG_BFIN_SIR2
  226. static struct resource bfin_sir2_resources[] = {
  227. {
  228. .start = 0xFFC02100,
  229. .end = 0xFFC021FF,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. {
  233. .start = IRQ_UART2_RX,
  234. .end = IRQ_UART2_RX+1,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. {
  238. .start = CH_UART2_RX,
  239. .end = CH_UART2_RX+1,
  240. .flags = IORESOURCE_DMA,
  241. },
  242. };
  243. static struct platform_device bfin_sir2_device = {
  244. .name = "bfin_sir",
  245. .id = 2,
  246. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  247. .resource = bfin_sir2_resources,
  248. };
  249. #endif
  250. #endif
  251. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  252. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  253. static struct resource bfin_sport0_uart_resources[] = {
  254. {
  255. .start = SPORT0_TCR1,
  256. .end = SPORT0_MRCS3+4,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. {
  260. .start = IRQ_SPORT0_RX,
  261. .end = IRQ_SPORT0_RX+1,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. {
  265. .start = IRQ_SPORT0_ERROR,
  266. .end = IRQ_SPORT0_ERROR,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. };
  270. static unsigned short bfin_sport0_peripherals[] = {
  271. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  272. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  273. };
  274. static struct platform_device bfin_sport0_uart_device = {
  275. .name = "bfin-sport-uart",
  276. .id = 0,
  277. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  278. .resource = bfin_sport0_uart_resources,
  279. .dev = {
  280. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  281. },
  282. };
  283. #endif
  284. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  285. static struct resource bfin_sport1_uart_resources[] = {
  286. {
  287. .start = SPORT1_TCR1,
  288. .end = SPORT1_MRCS3+4,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. {
  292. .start = IRQ_SPORT1_RX,
  293. .end = IRQ_SPORT1_RX+1,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. {
  297. .start = IRQ_SPORT1_ERROR,
  298. .end = IRQ_SPORT1_ERROR,
  299. .flags = IORESOURCE_IRQ,
  300. },
  301. };
  302. static unsigned short bfin_sport1_peripherals[] = {
  303. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  304. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  305. };
  306. static struct platform_device bfin_sport1_uart_device = {
  307. .name = "bfin-sport-uart",
  308. .id = 1,
  309. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  310. .resource = bfin_sport1_uart_resources,
  311. .dev = {
  312. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  313. },
  314. };
  315. #endif
  316. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  317. static struct resource bfin_sport2_uart_resources[] = {
  318. {
  319. .start = SPORT2_TCR1,
  320. .end = SPORT2_MRCS3+4,
  321. .flags = IORESOURCE_MEM,
  322. },
  323. {
  324. .start = IRQ_SPORT2_RX,
  325. .end = IRQ_SPORT2_RX+1,
  326. .flags = IORESOURCE_IRQ,
  327. },
  328. {
  329. .start = IRQ_SPORT2_ERROR,
  330. .end = IRQ_SPORT2_ERROR,
  331. .flags = IORESOURCE_IRQ,
  332. },
  333. };
  334. static unsigned short bfin_sport2_peripherals[] = {
  335. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  336. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  337. };
  338. static struct platform_device bfin_sport2_uart_device = {
  339. .name = "bfin-sport-uart",
  340. .id = 2,
  341. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  342. .resource = bfin_sport2_uart_resources,
  343. .dev = {
  344. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  345. },
  346. };
  347. #endif
  348. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  349. static struct resource bfin_sport3_uart_resources[] = {
  350. {
  351. .start = SPORT3_TCR1,
  352. .end = SPORT3_MRCS3+4,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. {
  356. .start = IRQ_SPORT3_RX,
  357. .end = IRQ_SPORT3_RX+1,
  358. .flags = IORESOURCE_IRQ,
  359. },
  360. {
  361. .start = IRQ_SPORT3_ERROR,
  362. .end = IRQ_SPORT3_ERROR,
  363. .flags = IORESOURCE_IRQ,
  364. },
  365. };
  366. static unsigned short bfin_sport3_peripherals[] = {
  367. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  368. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  369. };
  370. static struct platform_device bfin_sport3_uart_device = {
  371. .name = "bfin-sport-uart",
  372. .id = 3,
  373. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  374. .resource = bfin_sport3_uart_resources,
  375. .dev = {
  376. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  377. },
  378. };
  379. #endif
  380. #endif
  381. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  382. static unsigned short bfin_can_peripherals[] = {
  383. P_CAN0_RX, P_CAN0_TX, 0
  384. };
  385. static struct resource bfin_can_resources[] = {
  386. {
  387. .start = 0xFFC02A00,
  388. .end = 0xFFC02FFF,
  389. .flags = IORESOURCE_MEM,
  390. },
  391. {
  392. .start = IRQ_CAN_RX,
  393. .end = IRQ_CAN_RX,
  394. .flags = IORESOURCE_IRQ,
  395. },
  396. {
  397. .start = IRQ_CAN_TX,
  398. .end = IRQ_CAN_TX,
  399. .flags = IORESOURCE_IRQ,
  400. },
  401. {
  402. .start = IRQ_CAN_ERROR,
  403. .end = IRQ_CAN_ERROR,
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. };
  407. static struct platform_device bfin_can_device = {
  408. .name = "bfin_can",
  409. .num_resources = ARRAY_SIZE(bfin_can_resources),
  410. .resource = bfin_can_resources,
  411. .dev = {
  412. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  413. },
  414. };
  415. #endif
  416. /*
  417. * USB-LAN EzExtender board
  418. * Driver needs to know address, irq and flag pin.
  419. */
  420. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  421. #include <linux/smc91x.h>
  422. static struct smc91x_platdata smc91x_info = {
  423. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  424. .leda = RPC_LED_100_10,
  425. .ledb = RPC_LED_TX_RX,
  426. };
  427. static struct resource smc91x_resources[] = {
  428. {
  429. .name = "smc91x-regs",
  430. .start = 0x20310300,
  431. .end = 0x20310300 + 16,
  432. .flags = IORESOURCE_MEM,
  433. }, {
  434. .start = IRQ_PF0,
  435. .end = IRQ_PF0,
  436. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  437. },
  438. };
  439. static struct platform_device smc91x_device = {
  440. .name = "smc91x",
  441. .id = 0,
  442. .num_resources = ARRAY_SIZE(smc91x_resources),
  443. .resource = smc91x_resources,
  444. .dev = {
  445. .platform_data = &smc91x_info,
  446. },
  447. };
  448. #endif
  449. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  450. /* all SPI peripherals info goes here */
  451. #if defined(CONFIG_MTD_M25P80) \
  452. || defined(CONFIG_MTD_M25P80_MODULE)
  453. /* SPI flash chip (m25p16) */
  454. static struct mtd_partition bfin_spi_flash_partitions[] = {
  455. {
  456. .name = "bootloader(spi)",
  457. .size = 0x00040000,
  458. .offset = 0,
  459. .mask_flags = MTD_CAP_ROM
  460. }, {
  461. .name = "linux kernel(spi)",
  462. .size = 0x1c0000,
  463. .offset = 0x40000
  464. }
  465. };
  466. static struct flash_platform_data bfin_spi_flash_data = {
  467. .name = "m25p80",
  468. .parts = bfin_spi_flash_partitions,
  469. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  470. .type = "m25p16",
  471. };
  472. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  473. .enable_dma = 0, /* use dma transfer with this chip*/
  474. .bits_per_word = 8,
  475. };
  476. #endif
  477. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  478. #include <linux/spi/ad7879.h>
  479. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  480. .model = 7879, /* Model = AD7879 */
  481. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  482. .pressure_max = 10000,
  483. .pressure_min = 0,
  484. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  485. .acquisition_time = 1, /* 4us acquisition time per sample */
  486. .median = 2, /* do 8 measurements */
  487. .averaging = 1, /* take the average of 4 middle samples */
  488. .pen_down_acc_interval = 255, /* 9.4 ms */
  489. .gpio_export = 1, /* Export GPIO to gpiolib */
  490. .gpio_base = -1, /* Dynamic allocation */
  491. };
  492. #endif
  493. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  494. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  495. .enable_dma = 0,
  496. .bits_per_word = 16,
  497. };
  498. #endif
  499. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  500. #include <asm/bfin-lq035q1.h>
  501. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  502. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  503. .ppi_mode = USE_RGB565_16_BIT_PPI,
  504. .use_bl = 0, /* let something else control the LCD Blacklight */
  505. .gpio_bl = GPIO_PF7,
  506. };
  507. static struct resource bfin_lq035q1_resources[] = {
  508. {
  509. .start = IRQ_PPI_ERROR,
  510. .end = IRQ_PPI_ERROR,
  511. .flags = IORESOURCE_IRQ,
  512. },
  513. };
  514. static struct platform_device bfin_lq035q1_device = {
  515. .name = "bfin-lq035q1",
  516. .id = -1,
  517. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  518. .resource = bfin_lq035q1_resources,
  519. .dev = {
  520. .platform_data = &bfin_lq035q1_data,
  521. },
  522. };
  523. #endif
  524. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  525. static struct bfin5xx_spi_chip spidev_chip_info = {
  526. .enable_dma = 0,
  527. .bits_per_word = 8,
  528. };
  529. #endif
  530. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  531. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  532. .enable_dma = 0,
  533. .bits_per_word = 8,
  534. };
  535. #endif
  536. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  537. #if defined(CONFIG_MTD_M25P80) \
  538. || defined(CONFIG_MTD_M25P80_MODULE)
  539. {
  540. /* the modalias must be the same as spi device driver name */
  541. .modalias = "m25p80", /* Name of spi_driver for this device */
  542. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  543. .bus_num = 0, /* Framework bus number */
  544. .chip_select = 1, /* SPI_SSEL1*/
  545. .platform_data = &bfin_spi_flash_data,
  546. .controller_data = &spi_flash_chip_info,
  547. .mode = SPI_MODE_3,
  548. },
  549. #endif
  550. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  551. {
  552. .modalias = "ad7879",
  553. .platform_data = &bfin_ad7879_ts_info,
  554. .irq = IRQ_PF3,
  555. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  556. .bus_num = 0,
  557. .chip_select = 1,
  558. .controller_data = &spi_ad7879_chip_info,
  559. .mode = SPI_CPHA | SPI_CPOL,
  560. },
  561. #endif
  562. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  563. {
  564. .modalias = "bfin-lq035q1-spi",
  565. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  566. .bus_num = 0,
  567. .chip_select = 2,
  568. .controller_data = &lq035q1_spi_chip_info,
  569. .mode = SPI_CPHA | SPI_CPOL,
  570. },
  571. #endif
  572. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  573. {
  574. .modalias = "spidev",
  575. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  576. .bus_num = 0,
  577. .chip_select = 1,
  578. .controller_data = &spidev_chip_info,
  579. },
  580. #endif
  581. };
  582. /* SPI (0) */
  583. static struct resource bfin_spi0_resource[] = {
  584. [0] = {
  585. .start = SPI0_REGBASE,
  586. .end = SPI0_REGBASE + 0xFF,
  587. .flags = IORESOURCE_MEM,
  588. },
  589. [1] = {
  590. .start = CH_SPI0,
  591. .end = CH_SPI0,
  592. .flags = IORESOURCE_DMA,
  593. },
  594. [2] = {
  595. .start = IRQ_SPI0,
  596. .end = IRQ_SPI0,
  597. .flags = IORESOURCE_IRQ,
  598. }
  599. };
  600. /* SPI (1) */
  601. static struct resource bfin_spi1_resource[] = {
  602. [0] = {
  603. .start = SPI1_REGBASE,
  604. .end = SPI1_REGBASE + 0xFF,
  605. .flags = IORESOURCE_MEM,
  606. },
  607. [1] = {
  608. .start = CH_SPI1,
  609. .end = CH_SPI1,
  610. .flags = IORESOURCE_DMA,
  611. },
  612. [2] = {
  613. .start = IRQ_SPI1,
  614. .end = IRQ_SPI1,
  615. .flags = IORESOURCE_IRQ,
  616. }
  617. };
  618. /* SPI (2) */
  619. static struct resource bfin_spi2_resource[] = {
  620. [0] = {
  621. .start = SPI2_REGBASE,
  622. .end = SPI2_REGBASE + 0xFF,
  623. .flags = IORESOURCE_MEM,
  624. },
  625. [1] = {
  626. .start = CH_SPI2,
  627. .end = CH_SPI2,
  628. .flags = IORESOURCE_DMA,
  629. },
  630. [2] = {
  631. .start = IRQ_SPI2,
  632. .end = IRQ_SPI2,
  633. .flags = IORESOURCE_IRQ,
  634. }
  635. };
  636. /* SPI controller data */
  637. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  638. .num_chipselect = 8,
  639. .enable_dma = 1, /* master has the ability to do dma transfer */
  640. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  641. };
  642. static struct platform_device bf538_spi_master0 = {
  643. .name = "bfin-spi",
  644. .id = 0, /* Bus number */
  645. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  646. .resource = bfin_spi0_resource,
  647. .dev = {
  648. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  649. },
  650. };
  651. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  652. .num_chipselect = 2,
  653. .enable_dma = 1, /* master has the ability to do dma transfer */
  654. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  655. };
  656. static struct platform_device bf538_spi_master1 = {
  657. .name = "bfin-spi",
  658. .id = 1, /* Bus number */
  659. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  660. .resource = bfin_spi1_resource,
  661. .dev = {
  662. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  663. },
  664. };
  665. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  666. .num_chipselect = 2,
  667. .enable_dma = 1, /* master has the ability to do dma transfer */
  668. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  669. };
  670. static struct platform_device bf538_spi_master2 = {
  671. .name = "bfin-spi",
  672. .id = 2, /* Bus number */
  673. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  674. .resource = bfin_spi2_resource,
  675. .dev = {
  676. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  677. },
  678. };
  679. #endif /* spi master and devices */
  680. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  681. static struct resource bfin_twi0_resource[] = {
  682. [0] = {
  683. .start = TWI0_REGBASE,
  684. .end = TWI0_REGBASE + 0xFF,
  685. .flags = IORESOURCE_MEM,
  686. },
  687. [1] = {
  688. .start = IRQ_TWI0,
  689. .end = IRQ_TWI0,
  690. .flags = IORESOURCE_IRQ,
  691. },
  692. };
  693. static struct platform_device i2c_bfin_twi0_device = {
  694. .name = "i2c-bfin-twi",
  695. .id = 0,
  696. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  697. .resource = bfin_twi0_resource,
  698. };
  699. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  700. static struct resource bfin_twi1_resource[] = {
  701. [0] = {
  702. .start = TWI1_REGBASE,
  703. .end = TWI1_REGBASE + 0xFF,
  704. .flags = IORESOURCE_MEM,
  705. },
  706. [1] = {
  707. .start = IRQ_TWI1,
  708. .end = IRQ_TWI1,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. };
  712. static struct platform_device i2c_bfin_twi1_device = {
  713. .name = "i2c-bfin-twi",
  714. .id = 1,
  715. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  716. .resource = bfin_twi1_resource,
  717. };
  718. #endif
  719. #endif
  720. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  721. #include <linux/gpio_keys.h>
  722. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  723. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  724. };
  725. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  726. .buttons = bfin_gpio_keys_table,
  727. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  728. };
  729. static struct platform_device bfin_device_gpiokeys = {
  730. .name = "gpio-keys",
  731. .dev = {
  732. .platform_data = &bfin_gpio_keys_data,
  733. },
  734. };
  735. #endif
  736. static const unsigned int cclk_vlev_datasheet[] =
  737. {
  738. /*
  739. * Internal VLEV BF538SBBC1533
  740. ****temporarily using these values until data sheet is updated
  741. */
  742. VRPAIR(VLEV_100, 150000000),
  743. VRPAIR(VLEV_100, 250000000),
  744. VRPAIR(VLEV_110, 276000000),
  745. VRPAIR(VLEV_115, 301000000),
  746. VRPAIR(VLEV_120, 525000000),
  747. VRPAIR(VLEV_125, 550000000),
  748. VRPAIR(VLEV_130, 600000000),
  749. };
  750. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  751. .tuple_tab = cclk_vlev_datasheet,
  752. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  753. .vr_settling_time = 25 /* us */,
  754. };
  755. static struct platform_device bfin_dpmc = {
  756. .name = "bfin dpmc",
  757. .dev = {
  758. .platform_data = &bfin_dmpc_vreg_data,
  759. },
  760. };
  761. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  762. static struct mtd_partition ezkit_partitions[] = {
  763. {
  764. .name = "bootloader(nor)",
  765. .size = 0x40000,
  766. .offset = 0,
  767. }, {
  768. .name = "linux kernel(nor)",
  769. .size = 0x180000,
  770. .offset = MTDPART_OFS_APPEND,
  771. }, {
  772. .name = "file system(nor)",
  773. .size = MTDPART_SIZ_FULL,
  774. .offset = MTDPART_OFS_APPEND,
  775. }
  776. };
  777. static struct physmap_flash_data ezkit_flash_data = {
  778. .width = 2,
  779. .parts = ezkit_partitions,
  780. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  781. };
  782. static struct resource ezkit_flash_resource = {
  783. .start = 0x20000000,
  784. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  785. .end = 0x202fffff,
  786. #else
  787. .end = 0x203fffff,
  788. #endif
  789. .flags = IORESOURCE_MEM,
  790. };
  791. static struct platform_device ezkit_flash_device = {
  792. .name = "physmap-flash",
  793. .id = 0,
  794. .dev = {
  795. .platform_data = &ezkit_flash_data,
  796. },
  797. .num_resources = 1,
  798. .resource = &ezkit_flash_resource,
  799. };
  800. #endif
  801. static struct platform_device *cm_bf538_devices[] __initdata = {
  802. &bfin_dpmc,
  803. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  804. &rtc_device,
  805. #endif
  806. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  807. #ifdef CONFIG_SERIAL_BFIN_UART0
  808. &bfin_uart0_device,
  809. #endif
  810. #ifdef CONFIG_SERIAL_BFIN_UART1
  811. &bfin_uart1_device,
  812. #endif
  813. #ifdef CONFIG_SERIAL_BFIN_UART2
  814. &bfin_uart2_device,
  815. #endif
  816. #endif
  817. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  818. &bf538_spi_master0,
  819. &bf538_spi_master1,
  820. &bf538_spi_master2,
  821. #endif
  822. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  823. &i2c_bfin_twi0_device,
  824. &i2c_bfin_twi1_device,
  825. #endif
  826. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  827. #ifdef CONFIG_BFIN_SIR0
  828. &bfin_sir0_device,
  829. #endif
  830. #ifdef CONFIG_BFIN_SIR1
  831. &bfin_sir1_device,
  832. #endif
  833. #ifdef CONFIG_BFIN_SIR2
  834. &bfin_sir2_device,
  835. #endif
  836. #endif
  837. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  838. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  839. &bfin_sport0_uart_device,
  840. #endif
  841. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  842. &bfin_sport1_uart_device,
  843. #endif
  844. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  845. &bfin_sport2_uart_device,
  846. #endif
  847. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  848. &bfin_sport3_uart_device,
  849. #endif
  850. #endif
  851. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  852. &bfin_can_device,
  853. #endif
  854. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  855. &smc91x_device,
  856. #endif
  857. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  858. &bfin_lq035q1_device,
  859. #endif
  860. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  861. &bfin_device_gpiokeys,
  862. #endif
  863. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  864. &ezkit_flash_device,
  865. #endif
  866. };
  867. static int __init ezkit_init(void)
  868. {
  869. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  870. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  871. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  872. spi_register_board_info(bf538_spi_board_info,
  873. ARRAY_SIZE(bf538_spi_board_info));
  874. #endif
  875. return 0;
  876. }
  877. arch_initcall(ezkit_init);
  878. static struct platform_device *ezkit_early_devices[] __initdata = {
  879. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  880. #ifdef CONFIG_SERIAL_BFIN_UART0
  881. &bfin_uart0_device,
  882. #endif
  883. #ifdef CONFIG_SERIAL_BFIN_UART1
  884. &bfin_uart1_device,
  885. #endif
  886. #ifdef CONFIG_SERIAL_BFIN_UART2
  887. &bfin_uart2_device,
  888. #endif
  889. #endif
  890. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  891. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  892. &bfin_sport0_uart_device,
  893. #endif
  894. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  895. &bfin_sport1_uart_device,
  896. #endif
  897. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  898. &bfin_sport2_uart_device,
  899. #endif
  900. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  901. &bfin_sport3_uart_device,
  902. #endif
  903. #endif
  904. };
  905. void __init native_machine_early_platform_add_devices(void)
  906. {
  907. printk(KERN_INFO "register early platform devices\n");
  908. early_platform_add_devices(ezkit_early_devices,
  909. ARRAY_SIZE(ezkit_early_devices));
  910. }