cm_bf527.c 24 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. .name = "mc"
  79. },
  80. [2] = { /* DMA IRQ */
  81. .start = IRQ_USB_DMA,
  82. .end = IRQ_USB_DMA,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. .name = "dma"
  85. },
  86. };
  87. static struct musb_hdrc_config musb_config = {
  88. .multipoint = 0,
  89. .dyn_fifo = 0,
  90. .soft_con = 1,
  91. .dma = 1,
  92. .num_eps = 8,
  93. .dma_channels = 8,
  94. .gpio_vrsel = GPIO_PF11,
  95. /* Some custom boards need to be active low, just set it to "0"
  96. * if it is the case.
  97. */
  98. .gpio_vrsel_active = 1,
  99. .clkin = 24, /* musb CLKIN in MHZ */
  100. };
  101. static struct musb_hdrc_platform_data musb_plat = {
  102. #if defined(CONFIG_USB_MUSB_OTG)
  103. .mode = MUSB_OTG,
  104. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  105. .mode = MUSB_HOST,
  106. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  107. .mode = MUSB_PERIPHERAL,
  108. #endif
  109. .config = &musb_config,
  110. };
  111. static u64 musb_dmamask = ~(u32)0;
  112. static struct platform_device musb_device = {
  113. .name = "musb-blackfin",
  114. .id = 0,
  115. .dev = {
  116. .dma_mask = &musb_dmamask,
  117. .coherent_dma_mask = 0xffffffff,
  118. .platform_data = &musb_plat,
  119. },
  120. .num_resources = ARRAY_SIZE(musb_resources),
  121. .resource = musb_resources,
  122. };
  123. #endif
  124. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  125. static struct mtd_partition partition_info[] = {
  126. {
  127. .name = "linux kernel(nand)",
  128. .offset = 0,
  129. .size = 4 * 1024 * 1024,
  130. },
  131. {
  132. .name = "file system(nand)",
  133. .offset = MTDPART_OFS_APPEND,
  134. .size = MTDPART_SIZ_FULL,
  135. },
  136. };
  137. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  138. .data_width = NFC_NWIDTH_8,
  139. .partitions = partition_info,
  140. .nr_partitions = ARRAY_SIZE(partition_info),
  141. .rd_dly = 3,
  142. .wr_dly = 3,
  143. };
  144. static struct resource bf5xx_nand_resources[] = {
  145. {
  146. .start = NFC_CTL,
  147. .end = NFC_DATA_RD + 2,
  148. .flags = IORESOURCE_MEM,
  149. },
  150. {
  151. .start = CH_NFC,
  152. .end = CH_NFC,
  153. .flags = IORESOURCE_IRQ,
  154. },
  155. };
  156. static struct platform_device bf5xx_nand_device = {
  157. .name = "bf5xx-nand",
  158. .id = 0,
  159. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  160. .resource = bf5xx_nand_resources,
  161. .dev = {
  162. .platform_data = &bf5xx_nand_platform,
  163. },
  164. };
  165. #endif
  166. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  167. static struct resource bfin_pcmcia_cf_resources[] = {
  168. {
  169. .start = 0x20310000, /* IO PORT */
  170. .end = 0x20312000,
  171. .flags = IORESOURCE_MEM,
  172. }, {
  173. .start = 0x20311000, /* Attribute Memory */
  174. .end = 0x20311FFF,
  175. .flags = IORESOURCE_MEM,
  176. }, {
  177. .start = IRQ_PF4,
  178. .end = IRQ_PF4,
  179. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  180. }, {
  181. .start = 6, /* Card Detect PF6 */
  182. .end = 6,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. };
  186. static struct platform_device bfin_pcmcia_cf_device = {
  187. .name = "bfin_cf_pcmcia",
  188. .id = -1,
  189. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  190. .resource = bfin_pcmcia_cf_resources,
  191. };
  192. #endif
  193. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  194. static struct platform_device rtc_device = {
  195. .name = "rtc-bfin",
  196. .id = -1,
  197. };
  198. #endif
  199. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  200. #include <linux/smc91x.h>
  201. static struct smc91x_platdata smc91x_info = {
  202. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  203. .leda = RPC_LED_100_10,
  204. .ledb = RPC_LED_TX_RX,
  205. };
  206. static struct resource smc91x_resources[] = {
  207. {
  208. .name = "smc91x-regs",
  209. .start = 0x20300300,
  210. .end = 0x20300300 + 16,
  211. .flags = IORESOURCE_MEM,
  212. }, {
  213. .start = IRQ_PF7,
  214. .end = IRQ_PF7,
  215. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  216. },
  217. };
  218. static struct platform_device smc91x_device = {
  219. .name = "smc91x",
  220. .id = 0,
  221. .num_resources = ARRAY_SIZE(smc91x_resources),
  222. .resource = smc91x_resources,
  223. .dev = {
  224. .platform_data = &smc91x_info,
  225. },
  226. };
  227. #endif
  228. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  229. static struct resource dm9000_resources[] = {
  230. [0] = {
  231. .start = 0x203FB800,
  232. .end = 0x203FB800 + 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [1] = {
  236. .start = 0x203FB804,
  237. .end = 0x203FB804 + 1,
  238. .flags = IORESOURCE_MEM,
  239. },
  240. [2] = {
  241. .start = IRQ_PF9,
  242. .end = IRQ_PF9,
  243. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  244. },
  245. };
  246. static struct platform_device dm9000_device = {
  247. .name = "dm9000",
  248. .id = -1,
  249. .num_resources = ARRAY_SIZE(dm9000_resources),
  250. .resource = dm9000_resources,
  251. };
  252. #endif
  253. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  254. #include <linux/bfin_mac.h>
  255. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  256. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  257. {
  258. .addr = 1,
  259. .irq = IRQ_MAC_PHYINT,
  260. },
  261. };
  262. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  263. .phydev_number = 1,
  264. .phydev_data = bfin_phydev_data,
  265. .phy_mode = PHY_INTERFACE_MODE_RMII,
  266. .mac_peripherals = bfin_mac_peripherals,
  267. };
  268. static struct platform_device bfin_mii_bus = {
  269. .name = "bfin_mii_bus",
  270. .dev = {
  271. .platform_data = &bfin_mii_bus_data,
  272. }
  273. };
  274. static struct platform_device bfin_mac_device = {
  275. .name = "bfin_mac",
  276. .dev = {
  277. .platform_data = &bfin_mii_bus,
  278. }
  279. };
  280. #endif
  281. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  282. static struct resource net2272_bfin_resources[] = {
  283. {
  284. .start = 0x20300000,
  285. .end = 0x20300000 + 0x100,
  286. .flags = IORESOURCE_MEM,
  287. }, {
  288. .start = IRQ_PF7,
  289. .end = IRQ_PF7,
  290. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  291. },
  292. };
  293. static struct platform_device net2272_bfin_device = {
  294. .name = "net2272",
  295. .id = -1,
  296. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  297. .resource = net2272_bfin_resources,
  298. };
  299. #endif
  300. #if defined(CONFIG_MTD_M25P80) \
  301. || defined(CONFIG_MTD_M25P80_MODULE)
  302. static struct mtd_partition bfin_spi_flash_partitions[] = {
  303. {
  304. .name = "bootloader(spi)",
  305. .size = 0x00040000,
  306. .offset = 0,
  307. .mask_flags = MTD_CAP_ROM
  308. }, {
  309. .name = "linux kernel(spi)",
  310. .size = MTDPART_SIZ_FULL,
  311. .offset = MTDPART_OFS_APPEND,
  312. }
  313. };
  314. static struct flash_platform_data bfin_spi_flash_data = {
  315. .name = "m25p80",
  316. .parts = bfin_spi_flash_partitions,
  317. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  318. .type = "m25p16",
  319. };
  320. /* SPI flash chip (m25p64) */
  321. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  322. .enable_dma = 0, /* use dma transfer with this chip*/
  323. .bits_per_word = 8,
  324. };
  325. #endif
  326. #if defined(CONFIG_BFIN_SPI_ADC) \
  327. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  328. /* SPI ADC chip */
  329. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  330. .enable_dma = 1, /* use dma transfer with this chip*/
  331. .bits_per_word = 16,
  332. };
  333. #endif
  334. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  335. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  336. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  337. .enable_dma = 0,
  338. .bits_per_word = 16,
  339. };
  340. #endif
  341. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  342. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  343. .enable_dma = 0,
  344. .bits_per_word = 8,
  345. };
  346. #endif
  347. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  348. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  349. .enable_dma = 0,
  350. .bits_per_word = 16,
  351. };
  352. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  353. .model = 7877,
  354. .vref_delay_usecs = 50, /* internal, no capacitor */
  355. .x_plate_ohms = 419,
  356. .y_plate_ohms = 486,
  357. .pressure_max = 1000,
  358. .pressure_min = 0,
  359. .stopacq_polarity = 1,
  360. .first_conversion_delay = 3,
  361. .acquisition_time = 1,
  362. .averaging = 1,
  363. .pen_down_acc_interval = 1,
  364. };
  365. #endif
  366. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  367. && defined(CONFIG_SND_SOC_WM8731_SPI)
  368. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  369. .enable_dma = 0,
  370. .bits_per_word = 16,
  371. };
  372. #endif
  373. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  374. static struct bfin5xx_spi_chip spidev_chip_info = {
  375. .enable_dma = 0,
  376. .bits_per_word = 8,
  377. };
  378. #endif
  379. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  380. #if defined(CONFIG_MTD_M25P80) \
  381. || defined(CONFIG_MTD_M25P80_MODULE)
  382. {
  383. /* the modalias must be the same as spi device driver name */
  384. .modalias = "m25p80", /* Name of spi_driver for this device */
  385. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  386. .bus_num = 0, /* Framework bus number */
  387. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  388. .platform_data = &bfin_spi_flash_data,
  389. .controller_data = &spi_flash_chip_info,
  390. .mode = SPI_MODE_3,
  391. },
  392. #endif
  393. #if defined(CONFIG_BFIN_SPI_ADC) \
  394. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  395. {
  396. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  397. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  398. .bus_num = 0, /* Framework bus number */
  399. .chip_select = 1, /* Framework chip select. */
  400. .platform_data = NULL, /* No spi_driver specific config */
  401. .controller_data = &spi_adc_chip_info,
  402. },
  403. #endif
  404. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  405. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  406. {
  407. .modalias = "ad183x",
  408. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  409. .bus_num = 0,
  410. .chip_select = 4,
  411. .controller_data = &ad1836_spi_chip_info,
  412. },
  413. #endif
  414. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  415. {
  416. .modalias = "mmc_spi",
  417. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  418. .bus_num = 0,
  419. .chip_select = 5,
  420. .controller_data = &mmc_spi_chip_info,
  421. .mode = SPI_MODE_3,
  422. },
  423. #endif
  424. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  425. {
  426. .modalias = "ad7877",
  427. .platform_data = &bfin_ad7877_ts_info,
  428. .irq = IRQ_PF8,
  429. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  430. .bus_num = 0,
  431. .chip_select = 2,
  432. .controller_data = &spi_ad7877_chip_info,
  433. },
  434. #endif
  435. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  436. && defined(CONFIG_SND_SOC_WM8731_SPI)
  437. {
  438. .modalias = "wm8731",
  439. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  440. .bus_num = 0,
  441. .chip_select = 5,
  442. .controller_data = &spi_wm8731_chip_info,
  443. .mode = SPI_MODE_0,
  444. },
  445. #endif
  446. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  447. {
  448. .modalias = "spidev",
  449. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  450. .bus_num = 0,
  451. .chip_select = 1,
  452. .controller_data = &spidev_chip_info,
  453. },
  454. #endif
  455. };
  456. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  457. /* SPI controller data */
  458. static struct bfin5xx_spi_master bfin_spi0_info = {
  459. .num_chipselect = 8,
  460. .enable_dma = 1, /* master has the ability to do dma transfer */
  461. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  462. };
  463. /* SPI (0) */
  464. static struct resource bfin_spi0_resource[] = {
  465. [0] = {
  466. .start = SPI0_REGBASE,
  467. .end = SPI0_REGBASE + 0xFF,
  468. .flags = IORESOURCE_MEM,
  469. },
  470. [1] = {
  471. .start = CH_SPI,
  472. .end = CH_SPI,
  473. .flags = IORESOURCE_DMA,
  474. },
  475. [2] = {
  476. .start = IRQ_SPI,
  477. .end = IRQ_SPI,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static struct platform_device bfin_spi0_device = {
  482. .name = "bfin-spi",
  483. .id = 0, /* Bus number */
  484. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  485. .resource = bfin_spi0_resource,
  486. .dev = {
  487. .platform_data = &bfin_spi0_info, /* Passed to driver */
  488. },
  489. };
  490. #endif /* spi master and devices */
  491. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  492. static struct mtd_partition cm_partitions[] = {
  493. {
  494. .name = "bootloader(nor)",
  495. .size = 0x40000,
  496. .offset = 0,
  497. }, {
  498. .name = "linux kernel(nor)",
  499. .size = 0x100000,
  500. .offset = MTDPART_OFS_APPEND,
  501. }, {
  502. .name = "file system(nor)",
  503. .size = MTDPART_SIZ_FULL,
  504. .offset = MTDPART_OFS_APPEND,
  505. }
  506. };
  507. static struct physmap_flash_data cm_flash_data = {
  508. .width = 2,
  509. .parts = cm_partitions,
  510. .nr_parts = ARRAY_SIZE(cm_partitions),
  511. };
  512. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  513. static struct resource cm_flash_resource[] = {
  514. {
  515. .name = "cfi_probe",
  516. .start = 0x20000000,
  517. .end = 0x201fffff,
  518. .flags = IORESOURCE_MEM,
  519. }, {
  520. .start = (unsigned long)cm_flash_gpios,
  521. .end = ARRAY_SIZE(cm_flash_gpios),
  522. .flags = IORESOURCE_IRQ,
  523. }
  524. };
  525. static struct platform_device cm_flash_device = {
  526. .name = "gpio-addr-flash",
  527. .id = 0,
  528. .dev = {
  529. .platform_data = &cm_flash_data,
  530. },
  531. .num_resources = ARRAY_SIZE(cm_flash_resource),
  532. .resource = cm_flash_resource,
  533. };
  534. #endif
  535. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  536. #ifdef CONFIG_SERIAL_BFIN_UART0
  537. static struct resource bfin_uart0_resources[] = {
  538. {
  539. .start = UART0_THR,
  540. .end = UART0_GCTL+2,
  541. .flags = IORESOURCE_MEM,
  542. },
  543. {
  544. .start = IRQ_UART0_RX,
  545. .end = IRQ_UART0_RX+1,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. {
  549. .start = IRQ_UART0_ERROR,
  550. .end = IRQ_UART0_ERROR,
  551. .flags = IORESOURCE_IRQ,
  552. },
  553. {
  554. .start = CH_UART0_TX,
  555. .end = CH_UART0_TX,
  556. .flags = IORESOURCE_DMA,
  557. },
  558. {
  559. .start = CH_UART0_RX,
  560. .end = CH_UART0_RX,
  561. .flags = IORESOURCE_DMA,
  562. },
  563. };
  564. static unsigned short bfin_uart0_peripherals[] = {
  565. P_UART0_TX, P_UART0_RX, 0
  566. };
  567. static struct platform_device bfin_uart0_device = {
  568. .name = "bfin-uart",
  569. .id = 0,
  570. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  571. .resource = bfin_uart0_resources,
  572. .dev = {
  573. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  574. },
  575. };
  576. #endif
  577. #ifdef CONFIG_SERIAL_BFIN_UART1
  578. static struct resource bfin_uart1_resources[] = {
  579. {
  580. .start = UART1_THR,
  581. .end = UART1_GCTL+2,
  582. .flags = IORESOURCE_MEM,
  583. },
  584. {
  585. .start = IRQ_UART1_RX,
  586. .end = IRQ_UART1_RX+1,
  587. .flags = IORESOURCE_IRQ,
  588. },
  589. {
  590. .start = IRQ_UART1_ERROR,
  591. .end = IRQ_UART1_ERROR,
  592. .flags = IORESOURCE_IRQ,
  593. },
  594. {
  595. .start = CH_UART1_TX,
  596. .end = CH_UART1_TX,
  597. .flags = IORESOURCE_DMA,
  598. },
  599. {
  600. .start = CH_UART1_RX,
  601. .end = CH_UART1_RX,
  602. .flags = IORESOURCE_DMA,
  603. },
  604. #ifdef CONFIG_BFIN_UART1_CTSRTS
  605. { /* CTS pin */
  606. .start = GPIO_PF9,
  607. .end = GPIO_PF9,
  608. .flags = IORESOURCE_IO,
  609. },
  610. { /* RTS pin */
  611. .start = GPIO_PF10,
  612. .end = GPIO_PF10,
  613. .flags = IORESOURCE_IO,
  614. },
  615. #endif
  616. };
  617. static unsigned short bfin_uart1_peripherals[] = {
  618. P_UART1_TX, P_UART1_RX, 0
  619. };
  620. static struct platform_device bfin_uart1_device = {
  621. .name = "bfin-uart",
  622. .id = 1,
  623. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  624. .resource = bfin_uart1_resources,
  625. .dev = {
  626. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  627. },
  628. };
  629. #endif
  630. #endif
  631. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  632. #ifdef CONFIG_BFIN_SIR0
  633. static struct resource bfin_sir0_resources[] = {
  634. {
  635. .start = 0xFFC00400,
  636. .end = 0xFFC004FF,
  637. .flags = IORESOURCE_MEM,
  638. },
  639. {
  640. .start = IRQ_UART0_RX,
  641. .end = IRQ_UART0_RX+1,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. {
  645. .start = CH_UART0_RX,
  646. .end = CH_UART0_RX+1,
  647. .flags = IORESOURCE_DMA,
  648. },
  649. };
  650. static struct platform_device bfin_sir0_device = {
  651. .name = "bfin_sir",
  652. .id = 0,
  653. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  654. .resource = bfin_sir0_resources,
  655. };
  656. #endif
  657. #ifdef CONFIG_BFIN_SIR1
  658. static struct resource bfin_sir1_resources[] = {
  659. {
  660. .start = 0xFFC02000,
  661. .end = 0xFFC020FF,
  662. .flags = IORESOURCE_MEM,
  663. },
  664. {
  665. .start = IRQ_UART1_RX,
  666. .end = IRQ_UART1_RX+1,
  667. .flags = IORESOURCE_IRQ,
  668. },
  669. {
  670. .start = CH_UART1_RX,
  671. .end = CH_UART1_RX+1,
  672. .flags = IORESOURCE_DMA,
  673. },
  674. };
  675. static struct platform_device bfin_sir1_device = {
  676. .name = "bfin_sir",
  677. .id = 1,
  678. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  679. .resource = bfin_sir1_resources,
  680. };
  681. #endif
  682. #endif
  683. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  684. static struct resource bfin_twi0_resource[] = {
  685. [0] = {
  686. .start = TWI0_REGBASE,
  687. .end = TWI0_REGBASE,
  688. .flags = IORESOURCE_MEM,
  689. },
  690. [1] = {
  691. .start = IRQ_TWI,
  692. .end = IRQ_TWI,
  693. .flags = IORESOURCE_IRQ,
  694. },
  695. };
  696. static struct platform_device i2c_bfin_twi_device = {
  697. .name = "i2c-bfin-twi",
  698. .id = 0,
  699. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  700. .resource = bfin_twi0_resource,
  701. };
  702. #endif
  703. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  704. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  705. {
  706. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  707. },
  708. #endif
  709. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  710. {
  711. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  712. .irq = IRQ_PF8,
  713. },
  714. #endif
  715. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  716. {
  717. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  718. },
  719. #endif
  720. };
  721. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  722. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  723. static struct resource bfin_sport0_uart_resources[] = {
  724. {
  725. .start = SPORT0_TCR1,
  726. .end = SPORT0_MRCS3+4,
  727. .flags = IORESOURCE_MEM,
  728. },
  729. {
  730. .start = IRQ_SPORT0_RX,
  731. .end = IRQ_SPORT0_RX+1,
  732. .flags = IORESOURCE_IRQ,
  733. },
  734. {
  735. .start = IRQ_SPORT0_ERROR,
  736. .end = IRQ_SPORT0_ERROR,
  737. .flags = IORESOURCE_IRQ,
  738. },
  739. };
  740. static unsigned short bfin_sport0_peripherals[] = {
  741. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  742. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  743. };
  744. static struct platform_device bfin_sport0_uart_device = {
  745. .name = "bfin-sport-uart",
  746. .id = 0,
  747. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  748. .resource = bfin_sport0_uart_resources,
  749. .dev = {
  750. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  751. },
  752. };
  753. #endif
  754. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  755. static struct resource bfin_sport1_uart_resources[] = {
  756. {
  757. .start = SPORT1_TCR1,
  758. .end = SPORT1_MRCS3+4,
  759. .flags = IORESOURCE_MEM,
  760. },
  761. {
  762. .start = IRQ_SPORT1_RX,
  763. .end = IRQ_SPORT1_RX+1,
  764. .flags = IORESOURCE_IRQ,
  765. },
  766. {
  767. .start = IRQ_SPORT1_ERROR,
  768. .end = IRQ_SPORT1_ERROR,
  769. .flags = IORESOURCE_IRQ,
  770. },
  771. };
  772. static unsigned short bfin_sport1_peripherals[] = {
  773. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  774. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  775. };
  776. static struct platform_device bfin_sport1_uart_device = {
  777. .name = "bfin-sport-uart",
  778. .id = 1,
  779. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  780. .resource = bfin_sport1_uart_resources,
  781. .dev = {
  782. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  783. },
  784. };
  785. #endif
  786. #endif
  787. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  788. #include <linux/input.h>
  789. #include <linux/gpio_keys.h>
  790. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  791. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  792. };
  793. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  794. .buttons = bfin_gpio_keys_table,
  795. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  796. };
  797. static struct platform_device bfin_device_gpiokeys = {
  798. .name = "gpio-keys",
  799. .dev = {
  800. .platform_data = &bfin_gpio_keys_data,
  801. },
  802. };
  803. #endif
  804. static const unsigned int cclk_vlev_datasheet[] =
  805. {
  806. VRPAIR(VLEV_100, 400000000),
  807. VRPAIR(VLEV_105, 426000000),
  808. VRPAIR(VLEV_110, 500000000),
  809. VRPAIR(VLEV_115, 533000000),
  810. VRPAIR(VLEV_120, 600000000),
  811. };
  812. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  813. .tuple_tab = cclk_vlev_datasheet,
  814. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  815. .vr_settling_time = 25 /* us */,
  816. };
  817. static struct platform_device bfin_dpmc = {
  818. .name = "bfin dpmc",
  819. .dev = {
  820. .platform_data = &bfin_dmpc_vreg_data,
  821. },
  822. };
  823. static struct platform_device *cmbf527_devices[] __initdata = {
  824. &bfin_dpmc,
  825. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  826. &bf5xx_nand_device,
  827. #endif
  828. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  829. &bfin_pcmcia_cf_device,
  830. #endif
  831. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  832. &rtc_device,
  833. #endif
  834. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  835. &bfin_isp1760_device,
  836. #endif
  837. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  838. &musb_device,
  839. #endif
  840. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  841. &smc91x_device,
  842. #endif
  843. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  844. &dm9000_device,
  845. #endif
  846. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  847. &bfin_mii_bus,
  848. &bfin_mac_device,
  849. #endif
  850. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  851. &net2272_bfin_device,
  852. #endif
  853. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  854. &bfin_spi0_device,
  855. #endif
  856. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  857. #ifdef CONFIG_SERIAL_BFIN_UART0
  858. &bfin_uart0_device,
  859. #endif
  860. #ifdef CONFIG_SERIAL_BFIN_UART1
  861. &bfin_uart1_device,
  862. #endif
  863. #endif
  864. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  865. #ifdef CONFIG_BFIN_SIR0
  866. &bfin_sir0_device,
  867. #endif
  868. #ifdef CONFIG_BFIN_SIR1
  869. &bfin_sir1_device,
  870. #endif
  871. #endif
  872. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  873. &i2c_bfin_twi_device,
  874. #endif
  875. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  876. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  877. &bfin_sport0_uart_device,
  878. #endif
  879. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  880. &bfin_sport1_uart_device,
  881. #endif
  882. #endif
  883. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  884. &bfin_device_gpiokeys,
  885. #endif
  886. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  887. &cm_flash_device,
  888. #endif
  889. };
  890. static int __init cm_init(void)
  891. {
  892. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  893. i2c_register_board_info(0, bfin_i2c_board_info,
  894. ARRAY_SIZE(bfin_i2c_board_info));
  895. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  896. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  897. return 0;
  898. }
  899. arch_initcall(cm_init);
  900. static struct platform_device *cmbf527_early_devices[] __initdata = {
  901. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  902. #ifdef CONFIG_SERIAL_BFIN_UART0
  903. &bfin_uart0_device,
  904. #endif
  905. #ifdef CONFIG_SERIAL_BFIN_UART1
  906. &bfin_uart1_device,
  907. #endif
  908. #endif
  909. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  910. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  911. &bfin_sport0_uart_device,
  912. #endif
  913. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  914. &bfin_sport1_uart_device,
  915. #endif
  916. #endif
  917. };
  918. void __init native_machine_early_platform_add_devices(void)
  919. {
  920. printk(KERN_INFO "register early platform devices\n");
  921. early_platform_add_devices(cmbf527_early_devices,
  922. ARRAY_SIZE(cmbf527_early_devices));
  923. }
  924. void native_machine_restart(char *cmd)
  925. {
  926. /* workaround reboot hang when booting from SPI */
  927. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  928. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  929. }
  930. void bfin_get_ether_addr(char *addr)
  931. {
  932. random_ether_addr(addr);
  933. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  934. }
  935. EXPORT_SYMBOL(bfin_get_ether_addr);