ad7160eval.c 20 KB

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  1. /*
  2. * Copyright 2004-20010 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  35. static struct resource musb_resources[] = {
  36. [0] = {
  37. .start = 0xffc03800,
  38. .end = 0xffc03cff,
  39. .flags = IORESOURCE_MEM,
  40. },
  41. [1] = { /* general IRQ */
  42. .start = IRQ_USB_INT0,
  43. .end = IRQ_USB_INT0,
  44. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  45. },
  46. [2] = { /* DMA IRQ */
  47. .start = IRQ_USB_DMA,
  48. .end = IRQ_USB_DMA,
  49. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  50. },
  51. };
  52. static struct musb_hdrc_config musb_config = {
  53. .multipoint = 0,
  54. .dyn_fifo = 0,
  55. .soft_con = 1,
  56. .dma = 1,
  57. .num_eps = 8,
  58. .dma_channels = 8,
  59. .gpio_vrsel = GPIO_PG13,
  60. /* Some custom boards need to be active low, just set it to "0"
  61. * if it is the case.
  62. */
  63. .gpio_vrsel_active = 1,
  64. .clkin = 24, /* musb CLKIN in MHZ */
  65. };
  66. static struct musb_hdrc_platform_data musb_plat = {
  67. #if defined(CONFIG_USB_MUSB_OTG)
  68. .mode = MUSB_OTG,
  69. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  70. .mode = MUSB_HOST,
  71. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  72. .mode = MUSB_PERIPHERAL,
  73. #endif
  74. .config = &musb_config,
  75. };
  76. static u64 musb_dmamask = ~(u32)0;
  77. static struct platform_device musb_device = {
  78. .name = "musb-blackfin",
  79. .id = 0,
  80. .dev = {
  81. .dma_mask = &musb_dmamask,
  82. .coherent_dma_mask = 0xffffffff,
  83. .platform_data = &musb_plat,
  84. },
  85. .num_resources = ARRAY_SIZE(musb_resources),
  86. .resource = musb_resources,
  87. };
  88. #endif
  89. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  90. static struct resource bf52x_ra158z_resources[] = {
  91. {
  92. .start = IRQ_PPI_ERROR,
  93. .end = IRQ_PPI_ERROR,
  94. .flags = IORESOURCE_IRQ,
  95. },
  96. };
  97. static struct platform_device bf52x_ra158z_device = {
  98. .name = "bfin-ra158z",
  99. .id = -1,
  100. .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
  101. .resource = bf52x_ra158z_resources,
  102. };
  103. #endif
  104. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  105. static struct mtd_partition ad7160eval_partitions[] = {
  106. {
  107. .name = "bootloader(nor)",
  108. .size = 0x40000,
  109. .offset = 0,
  110. }, {
  111. .name = "linux kernel(nor)",
  112. .size = 0x1C0000,
  113. .offset = MTDPART_OFS_APPEND,
  114. }, {
  115. .name = "file system(nor)",
  116. .size = MTDPART_SIZ_FULL,
  117. .offset = MTDPART_OFS_APPEND,
  118. }
  119. };
  120. static struct physmap_flash_data ad7160eval_flash_data = {
  121. .width = 2,
  122. .parts = ad7160eval_partitions,
  123. .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
  124. };
  125. static struct resource ad7160eval_flash_resource = {
  126. .start = 0x20000000,
  127. .end = 0x203fffff,
  128. .flags = IORESOURCE_MEM,
  129. };
  130. static struct platform_device ad7160eval_flash_device = {
  131. .name = "physmap-flash",
  132. .id = 0,
  133. .dev = {
  134. .platform_data = &ad7160eval_flash_data,
  135. },
  136. .num_resources = 1,
  137. .resource = &ad7160eval_flash_resource,
  138. };
  139. #endif
  140. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  141. static struct mtd_partition partition_info[] = {
  142. {
  143. .name = "linux kernel(nand)",
  144. .offset = 0,
  145. .size = 4 * 1024 * 1024,
  146. },
  147. {
  148. .name = "file system(nand)",
  149. .offset = MTDPART_OFS_APPEND,
  150. .size = MTDPART_SIZ_FULL,
  151. },
  152. };
  153. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  154. .data_width = NFC_NWIDTH_8,
  155. .partitions = partition_info,
  156. .nr_partitions = ARRAY_SIZE(partition_info),
  157. .rd_dly = 3,
  158. .wr_dly = 3,
  159. };
  160. static struct resource bf5xx_nand_resources[] = {
  161. {
  162. .start = NFC_CTL,
  163. .end = NFC_DATA_RD + 2,
  164. .flags = IORESOURCE_MEM,
  165. },
  166. {
  167. .start = CH_NFC,
  168. .end = CH_NFC,
  169. .flags = IORESOURCE_IRQ,
  170. },
  171. };
  172. static struct platform_device bf5xx_nand_device = {
  173. .name = "bf5xx-nand",
  174. .id = 0,
  175. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  176. .resource = bf5xx_nand_resources,
  177. .dev = {
  178. .platform_data = &bf5xx_nand_platform,
  179. },
  180. };
  181. #endif
  182. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  183. static struct platform_device rtc_device = {
  184. .name = "rtc-bfin",
  185. .id = -1,
  186. };
  187. #endif
  188. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  189. #include <linux/bfin_mac.h>
  190. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  191. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  192. {
  193. .addr = 1,
  194. .irq = IRQ_MAC_PHYINT,
  195. },
  196. };
  197. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  198. .phydev_number = 1,
  199. .phydev_data = bfin_phydev_data,
  200. .phy_mode = PHY_INTERFACE_MODE_RMII,
  201. .mac_peripherals = bfin_mac_peripherals,
  202. };
  203. static struct platform_device bfin_mii_bus = {
  204. .name = "bfin_mii_bus",
  205. .dev = {
  206. .platform_data = &bfin_mii_bus_data,
  207. }
  208. };
  209. static struct platform_device bfin_mac_device = {
  210. .name = "bfin_mac",
  211. .dev = {
  212. .platform_data = &bfin_mii_bus,
  213. }
  214. };
  215. #endif
  216. #if defined(CONFIG_MTD_M25P80) \
  217. || defined(CONFIG_MTD_M25P80_MODULE)
  218. static struct mtd_partition bfin_spi_flash_partitions[] = {
  219. {
  220. .name = "bootloader(spi)",
  221. .size = 0x00040000,
  222. .offset = 0,
  223. .mask_flags = MTD_CAP_ROM
  224. }, {
  225. .name = "linux kernel(spi)",
  226. .size = MTDPART_SIZ_FULL,
  227. .offset = MTDPART_OFS_APPEND,
  228. }
  229. };
  230. static struct flash_platform_data bfin_spi_flash_data = {
  231. .name = "m25p80",
  232. .parts = bfin_spi_flash_partitions,
  233. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  234. .type = "m25p16",
  235. };
  236. /* SPI flash chip (m25p64) */
  237. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  238. .enable_dma = 0, /* use dma transfer with this chip*/
  239. .bits_per_word = 8,
  240. };
  241. #endif
  242. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  243. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  244. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  245. .enable_dma = 0,
  246. .bits_per_word = 16,
  247. };
  248. #endif
  249. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  250. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  251. .enable_dma = 0,
  252. .bits_per_word = 8,
  253. };
  254. #endif
  255. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  256. static struct bfin5xx_spi_chip spidev_chip_info = {
  257. .enable_dma = 0,
  258. .bits_per_word = 8,
  259. };
  260. #endif
  261. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  262. static struct platform_device bfin_i2s = {
  263. .name = "bfin-i2s",
  264. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  265. /* TODO: add platform data here */
  266. };
  267. #endif
  268. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  269. static struct platform_device bfin_tdm = {
  270. .name = "bfin-tdm",
  271. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  272. /* TODO: add platform data here */
  273. };
  274. #endif
  275. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  276. #if defined(CONFIG_MTD_M25P80) \
  277. || defined(CONFIG_MTD_M25P80_MODULE)
  278. {
  279. /* the modalias must be the same as spi device driver name */
  280. .modalias = "m25p80", /* Name of spi_driver for this device */
  281. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  282. .bus_num = 0, /* Framework bus number */
  283. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  284. .platform_data = &bfin_spi_flash_data,
  285. .controller_data = &spi_flash_chip_info,
  286. .mode = SPI_MODE_3,
  287. },
  288. #endif
  289. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  290. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  291. {
  292. .modalias = "ad183x",
  293. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  294. .bus_num = 0,
  295. .chip_select = 4,
  296. .controller_data = &ad1836_spi_chip_info,
  297. },
  298. #endif
  299. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  300. {
  301. .modalias = "mmc_spi",
  302. .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
  303. .bus_num = 0,
  304. .chip_select = GPIO_PH3 + MAX_CTRL_CS,
  305. .controller_data = &mmc_spi_chip_info,
  306. .mode = SPI_MODE_3,
  307. },
  308. #endif
  309. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  310. {
  311. .modalias = "spidev",
  312. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  313. .bus_num = 0,
  314. .chip_select = 1,
  315. .controller_data = &spidev_chip_info,
  316. },
  317. #endif
  318. };
  319. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  320. /* SPI controller data */
  321. static struct bfin5xx_spi_master bfin_spi0_info = {
  322. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  323. .enable_dma = 1, /* master has the ability to do dma transfer */
  324. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  325. };
  326. /* SPI (0) */
  327. static struct resource bfin_spi0_resource[] = {
  328. [0] = {
  329. .start = SPI0_REGBASE,
  330. .end = SPI0_REGBASE + 0xFF,
  331. .flags = IORESOURCE_MEM,
  332. },
  333. [1] = {
  334. .start = CH_SPI,
  335. .end = CH_SPI,
  336. .flags = IORESOURCE_DMA,
  337. },
  338. [2] = {
  339. .start = IRQ_SPI,
  340. .end = IRQ_SPI,
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. };
  344. static struct platform_device bfin_spi0_device = {
  345. .name = "bfin-spi",
  346. .id = 0, /* Bus number */
  347. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  348. .resource = bfin_spi0_resource,
  349. .dev = {
  350. .platform_data = &bfin_spi0_info, /* Passed to driver */
  351. },
  352. };
  353. #endif /* spi master and devices */
  354. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  355. #ifdef CONFIG_SERIAL_BFIN_UART0
  356. static struct resource bfin_uart0_resources[] = {
  357. {
  358. .start = UART0_THR,
  359. .end = UART0_GCTL+2,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. {
  363. .start = IRQ_UART0_RX,
  364. .end = IRQ_UART0_RX+1,
  365. .flags = IORESOURCE_IRQ,
  366. },
  367. {
  368. .start = IRQ_UART0_ERROR,
  369. .end = IRQ_UART0_ERROR,
  370. .flags = IORESOURCE_IRQ,
  371. },
  372. {
  373. .start = CH_UART0_TX,
  374. .end = CH_UART0_TX,
  375. .flags = IORESOURCE_DMA,
  376. },
  377. {
  378. .start = CH_UART0_RX,
  379. .end = CH_UART0_RX,
  380. .flags = IORESOURCE_DMA,
  381. },
  382. };
  383. static unsigned short bfin_uart0_peripherals[] = {
  384. P_UART0_TX, P_UART0_RX, 0
  385. };
  386. static struct platform_device bfin_uart0_device = {
  387. .name = "bfin-uart",
  388. .id = 0,
  389. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  390. .resource = bfin_uart0_resources,
  391. .dev = {
  392. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  393. },
  394. };
  395. #endif
  396. #ifdef CONFIG_SERIAL_BFIN_UART1
  397. static struct resource bfin_uart1_resources[] = {
  398. {
  399. .start = UART1_THR,
  400. .end = UART1_GCTL+2,
  401. .flags = IORESOURCE_MEM,
  402. },
  403. {
  404. .start = IRQ_UART1_RX,
  405. .end = IRQ_UART1_RX+1,
  406. .flags = IORESOURCE_IRQ,
  407. },
  408. {
  409. .start = IRQ_UART1_ERROR,
  410. .end = IRQ_UART1_ERROR,
  411. .flags = IORESOURCE_IRQ,
  412. },
  413. {
  414. .start = CH_UART1_TX,
  415. .end = CH_UART1_TX,
  416. .flags = IORESOURCE_DMA,
  417. },
  418. {
  419. .start = CH_UART1_RX,
  420. .end = CH_UART1_RX,
  421. .flags = IORESOURCE_DMA,
  422. },
  423. #ifdef CONFIG_BFIN_UART1_CTSRTS
  424. { /* CTS pin */
  425. .start = GPIO_PF9,
  426. .end = GPIO_PF9,
  427. .flags = IORESOURCE_IO,
  428. },
  429. { /* RTS pin */
  430. .start = GPIO_PF10,
  431. .end = GPIO_PF10,
  432. .flags = IORESOURCE_IO,
  433. },
  434. #endif
  435. };
  436. static unsigned short bfin_uart1_peripherals[] = {
  437. P_UART1_TX, P_UART1_RX, 0
  438. };
  439. static struct platform_device bfin_uart1_device = {
  440. .name = "bfin-uart",
  441. .id = 1,
  442. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  443. .resource = bfin_uart1_resources,
  444. .dev = {
  445. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  446. },
  447. };
  448. #endif
  449. #endif
  450. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  451. #ifdef CONFIG_BFIN_SIR0
  452. static struct resource bfin_sir0_resources[] = {
  453. {
  454. .start = 0xFFC00400,
  455. .end = 0xFFC004FF,
  456. .flags = IORESOURCE_MEM,
  457. },
  458. {
  459. .start = IRQ_UART0_RX,
  460. .end = IRQ_UART0_RX+1,
  461. .flags = IORESOURCE_IRQ,
  462. },
  463. {
  464. .start = CH_UART0_RX,
  465. .end = CH_UART0_RX+1,
  466. .flags = IORESOURCE_DMA,
  467. },
  468. };
  469. static struct platform_device bfin_sir0_device = {
  470. .name = "bfin_sir",
  471. .id = 0,
  472. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  473. .resource = bfin_sir0_resources,
  474. };
  475. #endif
  476. #ifdef CONFIG_BFIN_SIR1
  477. static struct resource bfin_sir1_resources[] = {
  478. {
  479. .start = 0xFFC02000,
  480. .end = 0xFFC020FF,
  481. .flags = IORESOURCE_MEM,
  482. },
  483. {
  484. .start = IRQ_UART1_RX,
  485. .end = IRQ_UART1_RX+1,
  486. .flags = IORESOURCE_IRQ,
  487. },
  488. {
  489. .start = CH_UART1_RX,
  490. .end = CH_UART1_RX+1,
  491. .flags = IORESOURCE_DMA,
  492. },
  493. };
  494. static struct platform_device bfin_sir1_device = {
  495. .name = "bfin_sir",
  496. .id = 1,
  497. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  498. .resource = bfin_sir1_resources,
  499. };
  500. #endif
  501. #endif
  502. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  503. #include <linux/input/ad7160.h>
  504. static const struct ad7160_platform_data bfin_ad7160_ts_info = {
  505. .sensor_x_res = 854,
  506. .sensor_y_res = 480,
  507. .pressure = 100,
  508. .filter_coef = 3,
  509. .coord_pref = AD7160_ORIG_TOP_LEFT,
  510. .first_touch_window = 5,
  511. .move_window = 3,
  512. .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
  513. AD7160_EMIT_ABS_MT_PRESSURE |
  514. AD7160_TRACKING_ID_ASCENDING,
  515. .finger_act_ctrl = 0x64,
  516. .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
  517. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  518. AD7160_HAPTIC_SLOT_B(60) |
  519. AD7160_HAPTIC_SLOT_B_LVL_LOW,
  520. .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
  521. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  522. AD7160_HAPTIC_SLOT_B(80) |
  523. AD7160_HAPTIC_SLOT_B_LVL_LOW |
  524. AD7160_HAPTIC_SLOT_C(120) |
  525. AD7160_HAPTIC_SLOT_C_LVL_HIGH |
  526. AD7160_HAPTIC_SLOT_D(30) |
  527. AD7160_HAPTIC_SLOT_D_LVL_LOW,
  528. };
  529. #endif
  530. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  531. static struct resource bfin_twi0_resource[] = {
  532. [0] = {
  533. .start = TWI0_REGBASE,
  534. .end = TWI0_REGBASE,
  535. .flags = IORESOURCE_MEM,
  536. },
  537. [1] = {
  538. .start = IRQ_TWI,
  539. .end = IRQ_TWI,
  540. .flags = IORESOURCE_IRQ,
  541. },
  542. };
  543. static struct platform_device i2c_bfin_twi_device = {
  544. .name = "i2c-bfin-twi",
  545. .id = 0,
  546. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  547. .resource = bfin_twi0_resource,
  548. };
  549. #endif
  550. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  551. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  552. {
  553. I2C_BOARD_INFO("ad7160", 0x33),
  554. .irq = IRQ_PH1,
  555. .platform_data = (void *)&bfin_ad7160_ts_info,
  556. },
  557. #endif
  558. };
  559. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  560. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  561. static struct resource bfin_sport0_uart_resources[] = {
  562. {
  563. .start = SPORT0_TCR1,
  564. .end = SPORT0_MRCS3+4,
  565. .flags = IORESOURCE_MEM,
  566. },
  567. {
  568. .start = IRQ_SPORT0_RX,
  569. .end = IRQ_SPORT0_RX+1,
  570. .flags = IORESOURCE_IRQ,
  571. },
  572. {
  573. .start = IRQ_SPORT0_ERROR,
  574. .end = IRQ_SPORT0_ERROR,
  575. .flags = IORESOURCE_IRQ,
  576. },
  577. };
  578. static unsigned short bfin_sport0_peripherals[] = {
  579. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  580. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  581. };
  582. static struct platform_device bfin_sport0_uart_device = {
  583. .name = "bfin-sport-uart",
  584. .id = 0,
  585. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  586. .resource = bfin_sport0_uart_resources,
  587. .dev = {
  588. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  589. },
  590. };
  591. #endif
  592. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  593. static struct resource bfin_sport1_uart_resources[] = {
  594. {
  595. .start = SPORT1_TCR1,
  596. .end = SPORT1_MRCS3+4,
  597. .flags = IORESOURCE_MEM,
  598. },
  599. {
  600. .start = IRQ_SPORT1_RX,
  601. .end = IRQ_SPORT1_RX+1,
  602. .flags = IORESOURCE_IRQ,
  603. },
  604. {
  605. .start = IRQ_SPORT1_ERROR,
  606. .end = IRQ_SPORT1_ERROR,
  607. .flags = IORESOURCE_IRQ,
  608. },
  609. };
  610. static unsigned short bfin_sport1_peripherals[] = {
  611. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  612. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  613. };
  614. static struct platform_device bfin_sport1_uart_device = {
  615. .name = "bfin-sport-uart",
  616. .id = 1,
  617. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  618. .resource = bfin_sport1_uart_resources,
  619. .dev = {
  620. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  621. },
  622. };
  623. #endif
  624. #endif
  625. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  626. #include <asm/bfin_rotary.h>
  627. static struct bfin_rotary_platform_data bfin_rotary_data = {
  628. /*.rotary_up_key = KEY_UP,*/
  629. /*.rotary_down_key = KEY_DOWN,*/
  630. .rotary_rel_code = REL_WHEEL,
  631. .rotary_button_key = KEY_ENTER,
  632. .debounce = 10, /* 0..17 */
  633. .mode = ROT_QUAD_ENC | ROT_DEBE,
  634. };
  635. static struct resource bfin_rotary_resources[] = {
  636. {
  637. .start = IRQ_CNT,
  638. .end = IRQ_CNT,
  639. .flags = IORESOURCE_IRQ,
  640. },
  641. };
  642. static struct platform_device bfin_rotary_device = {
  643. .name = "bfin-rotary",
  644. .id = -1,
  645. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  646. .resource = bfin_rotary_resources,
  647. .dev = {
  648. .platform_data = &bfin_rotary_data,
  649. },
  650. };
  651. #endif
  652. static const unsigned int cclk_vlev_datasheet[] = {
  653. VRPAIR(VLEV_100, 400000000),
  654. VRPAIR(VLEV_105, 426000000),
  655. VRPAIR(VLEV_110, 500000000),
  656. VRPAIR(VLEV_115, 533000000),
  657. VRPAIR(VLEV_120, 600000000),
  658. };
  659. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  660. .tuple_tab = cclk_vlev_datasheet,
  661. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  662. .vr_settling_time = 25 /* us */,
  663. };
  664. static struct platform_device bfin_dpmc = {
  665. .name = "bfin dpmc",
  666. .dev = {
  667. .platform_data = &bfin_dmpc_vreg_data,
  668. },
  669. };
  670. static struct platform_device *stamp_devices[] __initdata = {
  671. &bfin_dpmc,
  672. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  673. &bf5xx_nand_device,
  674. #endif
  675. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  676. &rtc_device,
  677. #endif
  678. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  679. &musb_device,
  680. #endif
  681. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  682. &bfin_mii_bus,
  683. &bfin_mac_device,
  684. #endif
  685. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  686. &bfin_spi0_device,
  687. #endif
  688. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  689. #ifdef CONFIG_SERIAL_BFIN_UART0
  690. &bfin_uart0_device,
  691. #endif
  692. #ifdef CONFIG_SERIAL_BFIN_UART1
  693. &bfin_uart1_device,
  694. #endif
  695. #endif
  696. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  697. &bf52x_ra158z_device,
  698. #endif
  699. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  700. #ifdef CONFIG_BFIN_SIR0
  701. &bfin_sir0_device,
  702. #endif
  703. #ifdef CONFIG_BFIN_SIR1
  704. &bfin_sir1_device,
  705. #endif
  706. #endif
  707. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  708. &i2c_bfin_twi_device,
  709. #endif
  710. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  711. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  712. &bfin_sport0_uart_device,
  713. #endif
  714. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  715. &bfin_sport1_uart_device,
  716. #endif
  717. #endif
  718. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  719. &bfin_rotary_device,
  720. #endif
  721. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  722. &ad7160eval_flash_device,
  723. #endif
  724. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  725. &bfin_i2s,
  726. #endif
  727. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  728. &bfin_tdm,
  729. #endif
  730. };
  731. static int __init ad7160eval_init(void)
  732. {
  733. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  734. i2c_register_board_info(0, bfin_i2c_board_info,
  735. ARRAY_SIZE(bfin_i2c_board_info));
  736. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  737. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  738. return 0;
  739. }
  740. arch_initcall(ad7160eval_init);
  741. static struct platform_device *ad7160eval_early_devices[] __initdata = {
  742. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  743. #ifdef CONFIG_SERIAL_BFIN_UART0
  744. &bfin_uart0_device,
  745. #endif
  746. #ifdef CONFIG_SERIAL_BFIN_UART1
  747. &bfin_uart1_device,
  748. #endif
  749. #endif
  750. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  751. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  752. &bfin_sport0_uart_device,
  753. #endif
  754. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  755. &bfin_sport1_uart_device,
  756. #endif
  757. #endif
  758. };
  759. void __init native_machine_early_platform_add_devices(void)
  760. {
  761. printk(KERN_INFO "register early platform devices\n");
  762. early_platform_add_devices(ad7160eval_early_devices,
  763. ARRAY_SIZE(ad7160eval_early_devices));
  764. }
  765. void native_machine_restart(char *cmd)
  766. {
  767. /* workaround reboot hang when booting from SPI */
  768. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  769. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  770. }
  771. void bfin_get_ether_addr(char *addr)
  772. {
  773. /* the MAC is stored in OTP memory page 0xDF */
  774. u32 ret;
  775. u64 otp_mac;
  776. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  777. ret = otp_read(0xDF, 0x00, &otp_mac);
  778. if (!(ret & 0x1)) {
  779. char *otp_mac_p = (char *)&otp_mac;
  780. for (ret = 0; ret < 6; ++ret)
  781. addr[ret] = otp_mac_p[5 - ret];
  782. }
  783. }
  784. EXPORT_SYMBOL(bfin_get_ether_addr);