tcm-bf518.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  35. static struct mtd_partition tcm_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. },
  41. {
  42. .name = "linux(nor)",
  43. .size = 0x1C0000,
  44. .offset = MTDPART_OFS_APPEND,
  45. }
  46. };
  47. static struct physmap_flash_data tcm_flash_data = {
  48. .width = 2,
  49. .parts = tcm_partitions,
  50. .nr_parts = ARRAY_SIZE(tcm_partitions),
  51. };
  52. static struct resource tcm_flash_resource = {
  53. .start = 0x20000000,
  54. .end = 0x201fffff,
  55. .flags = IORESOURCE_MEM,
  56. };
  57. static struct platform_device tcm_flash_device = {
  58. .name = "physmap-flash",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &tcm_flash_data,
  62. },
  63. .num_resources = 1,
  64. .resource = &tcm_flash_resource,
  65. };
  66. #endif
  67. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  68. static struct platform_device rtc_device = {
  69. .name = "rtc-bfin",
  70. .id = -1,
  71. };
  72. #endif
  73. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  74. #include <linux/bfin_mac.h>
  75. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  76. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  77. {
  78. .addr = 1,
  79. .irq = IRQ_MAC_PHYINT,
  80. },
  81. };
  82. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  83. .phydev_number = 1,
  84. .phydev_data = bfin_phydev_data,
  85. .phy_mode = PHY_INTERFACE_MODE_MII,
  86. .mac_peripherals = bfin_mac_peripherals,
  87. };
  88. static struct platform_device bfin_mii_bus = {
  89. .name = "bfin_mii_bus",
  90. .dev = {
  91. .platform_data = &bfin_mii_bus_data,
  92. }
  93. };
  94. static struct platform_device bfin_mac_device = {
  95. .name = "bfin_mac",
  96. .dev = {
  97. .platform_data = &bfin_mii_bus,
  98. }
  99. };
  100. #endif
  101. #if defined(CONFIG_MTD_M25P80) \
  102. || defined(CONFIG_MTD_M25P80_MODULE)
  103. static struct mtd_partition bfin_spi_flash_partitions[] = {
  104. {
  105. .name = "bootloader(spi)",
  106. .size = 0x00040000,
  107. .offset = 0,
  108. .mask_flags = MTD_CAP_ROM
  109. }, {
  110. .name = "linux kernel(spi)",
  111. .size = MTDPART_SIZ_FULL,
  112. .offset = MTDPART_OFS_APPEND,
  113. }
  114. };
  115. static struct flash_platform_data bfin_spi_flash_data = {
  116. .name = "m25p80",
  117. .parts = bfin_spi_flash_partitions,
  118. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  119. .type = "m25p16",
  120. };
  121. /* SPI flash chip (m25p64) */
  122. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  123. .enable_dma = 0, /* use dma transfer with this chip*/
  124. .bits_per_word = 8,
  125. };
  126. #endif
  127. #if defined(CONFIG_BFIN_SPI_ADC) \
  128. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  129. /* SPI ADC chip */
  130. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  131. .enable_dma = 1, /* use dma transfer with this chip*/
  132. .bits_per_word = 16,
  133. };
  134. #endif
  135. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  136. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  137. .enable_dma = 0,
  138. .bits_per_word = 8,
  139. };
  140. #endif
  141. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  142. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  143. .enable_dma = 0,
  144. .bits_per_word = 16,
  145. };
  146. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  147. .model = 7877,
  148. .vref_delay_usecs = 50, /* internal, no capacitor */
  149. .x_plate_ohms = 419,
  150. .y_plate_ohms = 486,
  151. .pressure_max = 1000,
  152. .pressure_min = 0,
  153. .stopacq_polarity = 1,
  154. .first_conversion_delay = 3,
  155. .acquisition_time = 1,
  156. .averaging = 1,
  157. .pen_down_acc_interval = 1,
  158. };
  159. #endif
  160. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  161. && defined(CONFIG_SND_SOC_WM8731_SPI)
  162. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  163. .enable_dma = 0,
  164. .bits_per_word = 16,
  165. };
  166. #endif
  167. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  168. static struct bfin5xx_spi_chip spidev_chip_info = {
  169. .enable_dma = 0,
  170. .bits_per_word = 8,
  171. };
  172. #endif
  173. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  174. #if defined(CONFIG_MTD_M25P80) \
  175. || defined(CONFIG_MTD_M25P80_MODULE)
  176. {
  177. /* the modalias must be the same as spi device driver name */
  178. .modalias = "m25p80", /* Name of spi_driver for this device */
  179. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  180. .bus_num = 0, /* Framework bus number */
  181. .chip_select = 2, /* SPI0_SSEL2 */
  182. .platform_data = &bfin_spi_flash_data,
  183. .controller_data = &spi_flash_chip_info,
  184. .mode = SPI_MODE_3,
  185. },
  186. #endif
  187. #if defined(CONFIG_BFIN_SPI_ADC) \
  188. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  189. {
  190. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  191. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  192. .bus_num = 0, /* Framework bus number */
  193. .chip_select = 1, /* Framework chip select. */
  194. .platform_data = NULL, /* No spi_driver specific config */
  195. .controller_data = &spi_adc_chip_info,
  196. },
  197. #endif
  198. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  199. {
  200. .modalias = "mmc_spi",
  201. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  202. .bus_num = 0,
  203. .chip_select = 5,
  204. .controller_data = &mmc_spi_chip_info,
  205. .mode = SPI_MODE_3,
  206. },
  207. #endif
  208. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  209. {
  210. .modalias = "ad7877",
  211. .platform_data = &bfin_ad7877_ts_info,
  212. .irq = IRQ_PF8,
  213. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  214. .bus_num = 0,
  215. .chip_select = 2,
  216. .controller_data = &spi_ad7877_chip_info,
  217. },
  218. #endif
  219. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  220. && defined(CONFIG_SND_SOC_WM8731_SPI)
  221. {
  222. .modalias = "wm8731",
  223. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  224. .bus_num = 0,
  225. .chip_select = 5,
  226. .controller_data = &spi_wm8731_chip_info,
  227. .mode = SPI_MODE_0,
  228. },
  229. #endif
  230. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  231. {
  232. .modalias = "spidev",
  233. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  234. .bus_num = 0,
  235. .chip_select = 1,
  236. .controller_data = &spidev_chip_info,
  237. },
  238. #endif
  239. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  240. {
  241. .modalias = "bfin-lq035q1-spi",
  242. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  243. .bus_num = 0,
  244. .chip_select = 1,
  245. .controller_data = &lq035q1_spi_chip_info,
  246. .mode = SPI_CPHA | SPI_CPOL,
  247. },
  248. #endif
  249. };
  250. /* SPI controller data */
  251. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  252. /* SPI (0) */
  253. static struct bfin5xx_spi_master bfin_spi0_info = {
  254. .num_chipselect = 6,
  255. .enable_dma = 1, /* master has the ability to do dma transfer */
  256. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  257. };
  258. static struct resource bfin_spi0_resource[] = {
  259. [0] = {
  260. .start = SPI0_REGBASE,
  261. .end = SPI0_REGBASE + 0xFF,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. [1] = {
  265. .start = CH_SPI0,
  266. .end = CH_SPI0,
  267. .flags = IORESOURCE_DMA,
  268. },
  269. [2] = {
  270. .start = IRQ_SPI0,
  271. .end = IRQ_SPI0,
  272. .flags = IORESOURCE_IRQ,
  273. },
  274. };
  275. static struct platform_device bfin_spi0_device = {
  276. .name = "bfin-spi",
  277. .id = 0, /* Bus number */
  278. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  279. .resource = bfin_spi0_resource,
  280. .dev = {
  281. .platform_data = &bfin_spi0_info, /* Passed to driver */
  282. },
  283. };
  284. /* SPI (1) */
  285. static struct bfin5xx_spi_master bfin_spi1_info = {
  286. .num_chipselect = 6,
  287. .enable_dma = 1, /* master has the ability to do dma transfer */
  288. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  289. };
  290. static struct resource bfin_spi1_resource[] = {
  291. [0] = {
  292. .start = SPI1_REGBASE,
  293. .end = SPI1_REGBASE + 0xFF,
  294. .flags = IORESOURCE_MEM,
  295. },
  296. [1] = {
  297. .start = CH_SPI1,
  298. .end = CH_SPI1,
  299. .flags = IORESOURCE_DMA,
  300. },
  301. [2] = {
  302. .start = IRQ_SPI1,
  303. .end = IRQ_SPI1,
  304. .flags = IORESOURCE_IRQ,
  305. },
  306. };
  307. static struct platform_device bfin_spi1_device = {
  308. .name = "bfin-spi",
  309. .id = 1, /* Bus number */
  310. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  311. .resource = bfin_spi1_resource,
  312. .dev = {
  313. .platform_data = &bfin_spi1_info, /* Passed to driver */
  314. },
  315. };
  316. #endif /* spi master and devices */
  317. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  318. #ifdef CONFIG_SERIAL_BFIN_UART0
  319. static struct resource bfin_uart0_resources[] = {
  320. {
  321. .start = UART0_THR,
  322. .end = UART0_GCTL+2,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. {
  326. .start = IRQ_UART0_RX,
  327. .end = IRQ_UART0_RX+1,
  328. .flags = IORESOURCE_IRQ,
  329. },
  330. {
  331. .start = IRQ_UART0_ERROR,
  332. .end = IRQ_UART0_ERROR,
  333. .flags = IORESOURCE_IRQ,
  334. },
  335. {
  336. .start = CH_UART0_TX,
  337. .end = CH_UART0_TX,
  338. .flags = IORESOURCE_DMA,
  339. },
  340. {
  341. .start = CH_UART0_RX,
  342. .end = CH_UART0_RX,
  343. .flags = IORESOURCE_DMA,
  344. },
  345. };
  346. static unsigned short bfin_uart0_peripherals[] = {
  347. P_UART0_TX, P_UART0_RX, 0
  348. };
  349. static struct platform_device bfin_uart0_device = {
  350. .name = "bfin-uart",
  351. .id = 0,
  352. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  353. .resource = bfin_uart0_resources,
  354. .dev = {
  355. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  356. },
  357. };
  358. #endif
  359. #ifdef CONFIG_SERIAL_BFIN_UART1
  360. static struct resource bfin_uart1_resources[] = {
  361. {
  362. .start = UART1_THR,
  363. .end = UART1_GCTL+2,
  364. .flags = IORESOURCE_MEM,
  365. },
  366. {
  367. .start = IRQ_UART1_RX,
  368. .end = IRQ_UART1_RX+1,
  369. .flags = IORESOURCE_IRQ,
  370. },
  371. {
  372. .start = IRQ_UART1_ERROR,
  373. .end = IRQ_UART1_ERROR,
  374. .flags = IORESOURCE_IRQ,
  375. },
  376. {
  377. .start = CH_UART1_TX,
  378. .end = CH_UART1_TX,
  379. .flags = IORESOURCE_DMA,
  380. },
  381. {
  382. .start = CH_UART1_RX,
  383. .end = CH_UART1_RX,
  384. .flags = IORESOURCE_DMA,
  385. },
  386. };
  387. static unsigned short bfin_uart1_peripherals[] = {
  388. P_UART1_TX, P_UART1_RX, 0
  389. };
  390. static struct platform_device bfin_uart1_device = {
  391. .name = "bfin-uart",
  392. .id = 1,
  393. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  394. .resource = bfin_uart1_resources,
  395. .dev = {
  396. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  397. },
  398. };
  399. #endif
  400. #endif
  401. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  402. #ifdef CONFIG_BFIN_SIR0
  403. static struct resource bfin_sir0_resources[] = {
  404. {
  405. .start = 0xFFC00400,
  406. .end = 0xFFC004FF,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. {
  410. .start = IRQ_UART0_RX,
  411. .end = IRQ_UART0_RX+1,
  412. .flags = IORESOURCE_IRQ,
  413. },
  414. {
  415. .start = CH_UART0_RX,
  416. .end = CH_UART0_RX+1,
  417. .flags = IORESOURCE_DMA,
  418. },
  419. };
  420. static struct platform_device bfin_sir0_device = {
  421. .name = "bfin_sir",
  422. .id = 0,
  423. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  424. .resource = bfin_sir0_resources,
  425. };
  426. #endif
  427. #ifdef CONFIG_BFIN_SIR1
  428. static struct resource bfin_sir1_resources[] = {
  429. {
  430. .start = 0xFFC02000,
  431. .end = 0xFFC020FF,
  432. .flags = IORESOURCE_MEM,
  433. },
  434. {
  435. .start = IRQ_UART1_RX,
  436. .end = IRQ_UART1_RX+1,
  437. .flags = IORESOURCE_IRQ,
  438. },
  439. {
  440. .start = CH_UART1_RX,
  441. .end = CH_UART1_RX+1,
  442. .flags = IORESOURCE_DMA,
  443. },
  444. };
  445. static struct platform_device bfin_sir1_device = {
  446. .name = "bfin_sir",
  447. .id = 1,
  448. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  449. .resource = bfin_sir1_resources,
  450. };
  451. #endif
  452. #endif
  453. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  454. static struct resource bfin_twi0_resource[] = {
  455. [0] = {
  456. .start = TWI0_REGBASE,
  457. .end = TWI0_REGBASE,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. [1] = {
  461. .start = IRQ_TWI,
  462. .end = IRQ_TWI,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. static struct platform_device i2c_bfin_twi_device = {
  467. .name = "i2c-bfin-twi",
  468. .id = 0,
  469. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  470. .resource = bfin_twi0_resource,
  471. };
  472. #endif
  473. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  474. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  475. {
  476. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  477. },
  478. #endif
  479. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  480. {
  481. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  482. .irq = IRQ_PF8,
  483. },
  484. #endif
  485. };
  486. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  487. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  488. static struct resource bfin_sport0_uart_resources[] = {
  489. {
  490. .start = SPORT0_TCR1,
  491. .end = SPORT0_MRCS3+4,
  492. .flags = IORESOURCE_MEM,
  493. },
  494. {
  495. .start = IRQ_SPORT0_RX,
  496. .end = IRQ_SPORT0_RX+1,
  497. .flags = IORESOURCE_IRQ,
  498. },
  499. {
  500. .start = IRQ_SPORT0_ERROR,
  501. .end = IRQ_SPORT0_ERROR,
  502. .flags = IORESOURCE_IRQ,
  503. },
  504. };
  505. static unsigned short bfin_sport0_peripherals[] = {
  506. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  507. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  508. };
  509. static struct platform_device bfin_sport0_uart_device = {
  510. .name = "bfin-sport-uart",
  511. .id = 0,
  512. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  513. .resource = bfin_sport0_uart_resources,
  514. .dev = {
  515. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  516. },
  517. };
  518. #endif
  519. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  520. static struct resource bfin_sport1_uart_resources[] = {
  521. {
  522. .start = SPORT1_TCR1,
  523. .end = SPORT1_MRCS3+4,
  524. .flags = IORESOURCE_MEM,
  525. },
  526. {
  527. .start = IRQ_SPORT1_RX,
  528. .end = IRQ_SPORT1_RX+1,
  529. .flags = IORESOURCE_IRQ,
  530. },
  531. {
  532. .start = IRQ_SPORT1_ERROR,
  533. .end = IRQ_SPORT1_ERROR,
  534. .flags = IORESOURCE_IRQ,
  535. },
  536. };
  537. static unsigned short bfin_sport1_peripherals[] = {
  538. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  539. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  540. };
  541. static struct platform_device bfin_sport1_uart_device = {
  542. .name = "bfin-sport-uart",
  543. .id = 1,
  544. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  545. .resource = bfin_sport1_uart_resources,
  546. .dev = {
  547. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  548. },
  549. };
  550. #endif
  551. #endif
  552. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  553. #include <linux/input.h>
  554. #include <linux/gpio_keys.h>
  555. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  556. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  557. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  558. };
  559. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  560. .buttons = bfin_gpio_keys_table,
  561. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  562. };
  563. static struct platform_device bfin_device_gpiokeys = {
  564. .name = "gpio-keys",
  565. .dev = {
  566. .platform_data = &bfin_gpio_keys_data,
  567. },
  568. };
  569. #endif
  570. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  571. static struct bfin_sd_host bfin_sdh_data = {
  572. .dma_chan = CH_RSI,
  573. .irq_int0 = IRQ_RSI_INT0,
  574. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  575. };
  576. static struct platform_device bf51x_sdh_device = {
  577. .name = "bfin-sdh",
  578. .id = 0,
  579. .dev = {
  580. .platform_data = &bfin_sdh_data,
  581. },
  582. };
  583. #endif
  584. static const unsigned int cclk_vlev_datasheet[] =
  585. {
  586. VRPAIR(VLEV_100, 400000000),
  587. VRPAIR(VLEV_105, 426000000),
  588. VRPAIR(VLEV_110, 500000000),
  589. VRPAIR(VLEV_115, 533000000),
  590. VRPAIR(VLEV_120, 600000000),
  591. };
  592. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  593. .tuple_tab = cclk_vlev_datasheet,
  594. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  595. .vr_settling_time = 25 /* us */,
  596. };
  597. static struct platform_device bfin_dpmc = {
  598. .name = "bfin dpmc",
  599. .dev = {
  600. .platform_data = &bfin_dmpc_vreg_data,
  601. },
  602. };
  603. static struct platform_device *tcm_devices[] __initdata = {
  604. &bfin_dpmc,
  605. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  606. &rtc_device,
  607. #endif
  608. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  609. &bfin_mii_bus,
  610. &bfin_mac_device,
  611. #endif
  612. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  613. &bfin_spi0_device,
  614. &bfin_spi1_device,
  615. #endif
  616. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  617. #ifdef CONFIG_SERIAL_BFIN_UART0
  618. &bfin_uart0_device,
  619. #endif
  620. #ifdef CONFIG_SERIAL_BFIN_UART1
  621. &bfin_uart1_device,
  622. #endif
  623. #endif
  624. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  625. #ifdef CONFIG_BFIN_SIR0
  626. &bfin_sir0_device,
  627. #endif
  628. #ifdef CONFIG_BFIN_SIR1
  629. &bfin_sir1_device,
  630. #endif
  631. #endif
  632. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  633. &i2c_bfin_twi_device,
  634. #endif
  635. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  636. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  637. &bfin_sport0_uart_device,
  638. #endif
  639. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  640. &bfin_sport1_uart_device,
  641. #endif
  642. #endif
  643. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  644. &bfin_device_gpiokeys,
  645. #endif
  646. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  647. &bf51x_sdh_device,
  648. #endif
  649. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  650. &tcm_flash_device,
  651. #endif
  652. };
  653. static int __init tcm_init(void)
  654. {
  655. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  656. i2c_register_board_info(0, bfin_i2c_board_info,
  657. ARRAY_SIZE(bfin_i2c_board_info));
  658. platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
  659. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  660. return 0;
  661. }
  662. arch_initcall(tcm_init);
  663. static struct platform_device *tcm_early_devices[] __initdata = {
  664. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  665. #ifdef CONFIG_SERIAL_BFIN_UART0
  666. &bfin_uart0_device,
  667. #endif
  668. #ifdef CONFIG_SERIAL_BFIN_UART1
  669. &bfin_uart1_device,
  670. #endif
  671. #endif
  672. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  673. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  674. &bfin_sport0_uart_device,
  675. #endif
  676. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  677. &bfin_sport1_uart_device,
  678. #endif
  679. #endif
  680. };
  681. void __init native_machine_early_platform_add_devices(void)
  682. {
  683. printk(KERN_INFO "register early platform devices\n");
  684. early_platform_add_devices(tcm_early_devices,
  685. ARRAY_SIZE(tcm_early_devices));
  686. }
  687. void native_machine_restart(char *cmd)
  688. {
  689. /* workaround reboot hang when booting from SPI */
  690. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  691. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  692. }
  693. void bfin_get_ether_addr(char *addr)
  694. {
  695. random_ether_addr(addr);
  696. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  697. }
  698. EXPORT_SYMBOL(bfin_get_ether_addr);