ezbrd.c 21 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <asm/dma.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/reboot.h>
  21. #include <asm/portmux.h>
  22. #include <asm/dpmc.h>
  23. #include <asm/bfin_sdh.h>
  24. #include <linux/spi/ad7877.h>
  25. #include <net/dsa.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "ADI BF518F-EZBRD";
  30. /*
  31. * Driver needs to know address, irq and flag pin.
  32. */
  33. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  34. static struct mtd_partition ezbrd_partitions[] = {
  35. {
  36. .name = "bootloader(nor)",
  37. .size = 0x40000,
  38. .offset = 0,
  39. }, {
  40. .name = "linux kernel(nor)",
  41. .size = 0x1C0000,
  42. .offset = MTDPART_OFS_APPEND,
  43. }, {
  44. .name = "file system(nor)",
  45. .size = MTDPART_SIZ_FULL,
  46. .offset = MTDPART_OFS_APPEND,
  47. }
  48. };
  49. static struct physmap_flash_data ezbrd_flash_data = {
  50. .width = 2,
  51. .parts = ezbrd_partitions,
  52. .nr_parts = ARRAY_SIZE(ezbrd_partitions),
  53. };
  54. static struct resource ezbrd_flash_resource = {
  55. .start = 0x20000000,
  56. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  57. .end = 0x202fffff,
  58. #else
  59. .end = 0x203fffff,
  60. #endif
  61. .flags = IORESOURCE_MEM,
  62. };
  63. static struct platform_device ezbrd_flash_device = {
  64. .name = "physmap-flash",
  65. .id = 0,
  66. .dev = {
  67. .platform_data = &ezbrd_flash_data,
  68. },
  69. .num_resources = 1,
  70. .resource = &ezbrd_flash_resource,
  71. };
  72. #endif
  73. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  74. static struct platform_device rtc_device = {
  75. .name = "rtc-bfin",
  76. .id = -1,
  77. };
  78. #endif
  79. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  80. #include <linux/bfin_mac.h>
  81. static const unsigned short bfin_mac_peripherals[] = {
  82. P_MII0_ETxD0,
  83. P_MII0_ETxD1,
  84. P_MII0_ETxEN,
  85. P_MII0_ERxD0,
  86. P_MII0_ERxD1,
  87. P_MII0_TxCLK,
  88. P_MII0_PHYINT,
  89. P_MII0_CRS,
  90. P_MII0_MDC,
  91. P_MII0_MDIO,
  92. 0
  93. };
  94. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  95. {
  96. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  97. .addr = 3,
  98. #else
  99. .addr = 1,
  100. #endif
  101. .irq = IRQ_MAC_PHYINT,
  102. },
  103. };
  104. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  105. .phydev_number = 1,
  106. .phydev_data = bfin_phydev_data,
  107. .phy_mode = PHY_INTERFACE_MODE_MII,
  108. .mac_peripherals = bfin_mac_peripherals,
  109. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  110. .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
  111. #endif
  112. };
  113. static struct platform_device bfin_mii_bus = {
  114. .name = "bfin_mii_bus",
  115. .dev = {
  116. .platform_data = &bfin_mii_bus_data,
  117. }
  118. };
  119. static struct platform_device bfin_mac_device = {
  120. .name = "bfin_mac",
  121. .dev = {
  122. .platform_data = &bfin_mii_bus,
  123. }
  124. };
  125. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  126. static struct dsa_chip_data ksz8893m_switch_chip_data = {
  127. .mii_bus = &bfin_mii_bus.dev,
  128. .port_names = {
  129. NULL,
  130. "eth%d",
  131. "eth%d",
  132. "cpu",
  133. },
  134. };
  135. static struct dsa_platform_data ksz8893m_switch_data = {
  136. .nr_chips = 1,
  137. .netdev = &bfin_mac_device.dev,
  138. .chip = &ksz8893m_switch_chip_data,
  139. };
  140. static struct platform_device ksz8893m_switch_device = {
  141. .name = "dsa",
  142. .id = 0,
  143. .num_resources = 0,
  144. .dev.platform_data = &ksz8893m_switch_data,
  145. };
  146. #endif
  147. #endif
  148. #if defined(CONFIG_MTD_M25P80) \
  149. || defined(CONFIG_MTD_M25P80_MODULE)
  150. static struct mtd_partition bfin_spi_flash_partitions[] = {
  151. {
  152. .name = "bootloader(spi)",
  153. .size = 0x00040000,
  154. .offset = 0,
  155. .mask_flags = MTD_CAP_ROM
  156. }, {
  157. .name = "linux kernel(spi)",
  158. .size = MTDPART_SIZ_FULL,
  159. .offset = MTDPART_OFS_APPEND,
  160. }
  161. };
  162. static struct flash_platform_data bfin_spi_flash_data = {
  163. .name = "m25p80",
  164. .parts = bfin_spi_flash_partitions,
  165. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  166. .type = "m25p16",
  167. };
  168. /* SPI flash chip (m25p64) */
  169. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  170. .enable_dma = 0, /* use dma transfer with this chip*/
  171. .bits_per_word = 8,
  172. };
  173. #endif
  174. #if defined(CONFIG_BFIN_SPI_ADC) \
  175. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  176. /* SPI ADC chip */
  177. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  178. .enable_dma = 1, /* use dma transfer with this chip*/
  179. .bits_per_word = 16,
  180. };
  181. #endif
  182. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  183. #if defined(CONFIG_NET_DSA_KSZ8893M) \
  184. || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  185. /* SPI SWITCH CHIP */
  186. static struct bfin5xx_spi_chip spi_switch_info = {
  187. .enable_dma = 0,
  188. .bits_per_word = 8,
  189. };
  190. #endif
  191. #endif
  192. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  193. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  194. .enable_dma = 0,
  195. .bits_per_word = 8,
  196. };
  197. #endif
  198. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  199. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  200. .enable_dma = 0,
  201. .bits_per_word = 16,
  202. };
  203. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  204. .model = 7877,
  205. .vref_delay_usecs = 50, /* internal, no capacitor */
  206. .x_plate_ohms = 419,
  207. .y_plate_ohms = 486,
  208. .pressure_max = 1000,
  209. .pressure_min = 0,
  210. .stopacq_polarity = 1,
  211. .first_conversion_delay = 3,
  212. .acquisition_time = 1,
  213. .averaging = 1,
  214. .pen_down_acc_interval = 1,
  215. };
  216. #endif
  217. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  218. && defined(CONFIG_SND_SOC_WM8731_SPI)
  219. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  220. .enable_dma = 0,
  221. .bits_per_word = 16,
  222. };
  223. #endif
  224. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  225. static struct bfin5xx_spi_chip spidev_chip_info = {
  226. .enable_dma = 0,
  227. .bits_per_word = 8,
  228. };
  229. #endif
  230. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  231. #if defined(CONFIG_MTD_M25P80) \
  232. || defined(CONFIG_MTD_M25P80_MODULE)
  233. {
  234. /* the modalias must be the same as spi device driver name */
  235. .modalias = "m25p80", /* Name of spi_driver for this device */
  236. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  237. .bus_num = 0, /* Framework bus number */
  238. .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
  239. .platform_data = &bfin_spi_flash_data,
  240. .controller_data = &spi_flash_chip_info,
  241. .mode = SPI_MODE_3,
  242. },
  243. #endif
  244. #if defined(CONFIG_BFIN_SPI_ADC) \
  245. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  246. {
  247. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  248. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  249. .bus_num = 0, /* Framework bus number */
  250. .chip_select = 1, /* Framework chip select. */
  251. .platform_data = NULL, /* No spi_driver specific config */
  252. .controller_data = &spi_adc_chip_info,
  253. },
  254. #endif
  255. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  256. #if defined(CONFIG_NET_DSA_KSZ8893M) \
  257. || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  258. {
  259. .modalias = "ksz8893m",
  260. .max_speed_hz = 5000000,
  261. .bus_num = 0,
  262. .chip_select = 1,
  263. .platform_data = NULL,
  264. .controller_data = &spi_switch_info,
  265. .mode = SPI_MODE_3,
  266. },
  267. #endif
  268. #endif
  269. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  270. {
  271. .modalias = "mmc_spi",
  272. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  273. .bus_num = 0,
  274. .chip_select = 5,
  275. .controller_data = &mmc_spi_chip_info,
  276. .mode = SPI_MODE_3,
  277. },
  278. #endif
  279. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  280. {
  281. .modalias = "ad7877",
  282. .platform_data = &bfin_ad7877_ts_info,
  283. .irq = IRQ_PF8,
  284. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  285. .bus_num = 0,
  286. .chip_select = 2,
  287. .controller_data = &spi_ad7877_chip_info,
  288. },
  289. #endif
  290. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  291. && defined(CONFIG_SND_SOC_WM8731_SPI)
  292. {
  293. .modalias = "wm8731",
  294. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  295. .bus_num = 0,
  296. .chip_select = 5,
  297. .controller_data = &spi_wm8731_chip_info,
  298. .mode = SPI_MODE_0,
  299. },
  300. #endif
  301. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  302. {
  303. .modalias = "spidev",
  304. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  305. .bus_num = 0,
  306. .chip_select = 1,
  307. .controller_data = &spidev_chip_info,
  308. },
  309. #endif
  310. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  311. {
  312. .modalias = "bfin-lq035q1-spi",
  313. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  314. .bus_num = 0,
  315. .chip_select = 1,
  316. .controller_data = &lq035q1_spi_chip_info,
  317. .mode = SPI_CPHA | SPI_CPOL,
  318. },
  319. #endif
  320. };
  321. /* SPI controller data */
  322. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  323. /* SPI (0) */
  324. static struct bfin5xx_spi_master bfin_spi0_info = {
  325. .num_chipselect = 6,
  326. .enable_dma = 1, /* master has the ability to do dma transfer */
  327. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  328. };
  329. static struct resource bfin_spi0_resource[] = {
  330. [0] = {
  331. .start = SPI0_REGBASE,
  332. .end = SPI0_REGBASE + 0xFF,
  333. .flags = IORESOURCE_MEM,
  334. },
  335. [1] = {
  336. .start = CH_SPI0,
  337. .end = CH_SPI0,
  338. .flags = IORESOURCE_DMA,
  339. },
  340. [2] = {
  341. .start = IRQ_SPI0,
  342. .end = IRQ_SPI0,
  343. .flags = IORESOURCE_IRQ,
  344. },
  345. };
  346. static struct platform_device bfin_spi0_device = {
  347. .name = "bfin-spi",
  348. .id = 0, /* Bus number */
  349. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  350. .resource = bfin_spi0_resource,
  351. .dev = {
  352. .platform_data = &bfin_spi0_info, /* Passed to driver */
  353. },
  354. };
  355. /* SPI (1) */
  356. static struct bfin5xx_spi_master bfin_spi1_info = {
  357. .num_chipselect = 6,
  358. .enable_dma = 1, /* master has the ability to do dma transfer */
  359. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  360. };
  361. static struct resource bfin_spi1_resource[] = {
  362. [0] = {
  363. .start = SPI1_REGBASE,
  364. .end = SPI1_REGBASE + 0xFF,
  365. .flags = IORESOURCE_MEM,
  366. },
  367. [1] = {
  368. .start = CH_SPI1,
  369. .end = CH_SPI1,
  370. .flags = IORESOURCE_DMA,
  371. },
  372. [2] = {
  373. .start = IRQ_SPI1,
  374. .end = IRQ_SPI1,
  375. .flags = IORESOURCE_IRQ,
  376. },
  377. };
  378. static struct platform_device bfin_spi1_device = {
  379. .name = "bfin-spi",
  380. .id = 1, /* Bus number */
  381. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  382. .resource = bfin_spi1_resource,
  383. .dev = {
  384. .platform_data = &bfin_spi1_info, /* Passed to driver */
  385. },
  386. };
  387. #endif /* spi master and devices */
  388. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  389. #ifdef CONFIG_SERIAL_BFIN_UART0
  390. static struct resource bfin_uart0_resources[] = {
  391. {
  392. .start = UART0_THR,
  393. .end = UART0_GCTL+2,
  394. .flags = IORESOURCE_MEM,
  395. },
  396. {
  397. .start = IRQ_UART0_RX,
  398. .end = IRQ_UART0_RX+1,
  399. .flags = IORESOURCE_IRQ,
  400. },
  401. {
  402. .start = IRQ_UART0_ERROR,
  403. .end = IRQ_UART0_ERROR,
  404. .flags = IORESOURCE_IRQ,
  405. },
  406. {
  407. .start = CH_UART0_TX,
  408. .end = CH_UART0_TX,
  409. .flags = IORESOURCE_DMA,
  410. },
  411. {
  412. .start = CH_UART0_RX,
  413. .end = CH_UART0_RX,
  414. .flags = IORESOURCE_DMA,
  415. },
  416. };
  417. static unsigned short bfin_uart0_peripherals[] = {
  418. P_UART0_TX, P_UART0_RX, 0
  419. };
  420. static struct platform_device bfin_uart0_device = {
  421. .name = "bfin-uart",
  422. .id = 0,
  423. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  424. .resource = bfin_uart0_resources,
  425. .dev = {
  426. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  427. },
  428. };
  429. #endif
  430. #ifdef CONFIG_SERIAL_BFIN_UART1
  431. static struct resource bfin_uart1_resources[] = {
  432. {
  433. .start = UART1_THR,
  434. .end = UART1_GCTL+2,
  435. .flags = IORESOURCE_MEM,
  436. },
  437. {
  438. .start = IRQ_UART1_RX,
  439. .end = IRQ_UART1_RX+1,
  440. .flags = IORESOURCE_IRQ,
  441. },
  442. {
  443. .start = IRQ_UART1_ERROR,
  444. .end = IRQ_UART1_ERROR,
  445. .flags = IORESOURCE_IRQ,
  446. },
  447. {
  448. .start = CH_UART1_TX,
  449. .end = CH_UART1_TX,
  450. .flags = IORESOURCE_DMA,
  451. },
  452. {
  453. .start = CH_UART1_RX,
  454. .end = CH_UART1_RX,
  455. .flags = IORESOURCE_DMA,
  456. },
  457. };
  458. static unsigned short bfin_uart1_peripherals[] = {
  459. P_UART1_TX, P_UART1_RX, 0
  460. };
  461. static struct platform_device bfin_uart1_device = {
  462. .name = "bfin-uart",
  463. .id = 1,
  464. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  465. .resource = bfin_uart1_resources,
  466. .dev = {
  467. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  468. },
  469. };
  470. #endif
  471. #endif
  472. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  473. #ifdef CONFIG_BFIN_SIR0
  474. static struct resource bfin_sir0_resources[] = {
  475. {
  476. .start = 0xFFC00400,
  477. .end = 0xFFC004FF,
  478. .flags = IORESOURCE_MEM,
  479. },
  480. {
  481. .start = IRQ_UART0_RX,
  482. .end = IRQ_UART0_RX+1,
  483. .flags = IORESOURCE_IRQ,
  484. },
  485. {
  486. .start = CH_UART0_RX,
  487. .end = CH_UART0_RX+1,
  488. .flags = IORESOURCE_DMA,
  489. },
  490. };
  491. static struct platform_device bfin_sir0_device = {
  492. .name = "bfin_sir",
  493. .id = 0,
  494. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  495. .resource = bfin_sir0_resources,
  496. };
  497. #endif
  498. #ifdef CONFIG_BFIN_SIR1
  499. static struct resource bfin_sir1_resources[] = {
  500. {
  501. .start = 0xFFC02000,
  502. .end = 0xFFC020FF,
  503. .flags = IORESOURCE_MEM,
  504. },
  505. {
  506. .start = IRQ_UART1_RX,
  507. .end = IRQ_UART1_RX+1,
  508. .flags = IORESOURCE_IRQ,
  509. },
  510. {
  511. .start = CH_UART1_RX,
  512. .end = CH_UART1_RX+1,
  513. .flags = IORESOURCE_DMA,
  514. },
  515. };
  516. static struct platform_device bfin_sir1_device = {
  517. .name = "bfin_sir",
  518. .id = 1,
  519. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  520. .resource = bfin_sir1_resources,
  521. };
  522. #endif
  523. #endif
  524. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  525. static struct platform_device bfin_i2s = {
  526. .name = "bfin-i2s",
  527. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  528. /* TODO: add platform data here */
  529. };
  530. #endif
  531. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  532. static struct resource bfin_twi0_resource[] = {
  533. [0] = {
  534. .start = TWI0_REGBASE,
  535. .end = TWI0_REGBASE,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. [1] = {
  539. .start = IRQ_TWI,
  540. .end = IRQ_TWI,
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. };
  544. static struct platform_device i2c_bfin_twi_device = {
  545. .name = "i2c-bfin-twi",
  546. .id = 0,
  547. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  548. .resource = bfin_twi0_resource,
  549. };
  550. #endif
  551. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  552. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  553. {
  554. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  555. },
  556. #endif
  557. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  558. {
  559. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  560. .irq = IRQ_PF8,
  561. },
  562. #endif
  563. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  564. {
  565. I2C_BOARD_INFO("ssm2602", 0x1b),
  566. },
  567. #endif
  568. };
  569. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  570. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  571. static struct resource bfin_sport0_uart_resources[] = {
  572. {
  573. .start = SPORT0_TCR1,
  574. .end = SPORT0_MRCS3+4,
  575. .flags = IORESOURCE_MEM,
  576. },
  577. {
  578. .start = IRQ_SPORT0_RX,
  579. .end = IRQ_SPORT0_RX+1,
  580. .flags = IORESOURCE_IRQ,
  581. },
  582. {
  583. .start = IRQ_SPORT0_ERROR,
  584. .end = IRQ_SPORT0_ERROR,
  585. .flags = IORESOURCE_IRQ,
  586. },
  587. };
  588. static unsigned short bfin_sport0_peripherals[] = {
  589. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  590. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  591. };
  592. static struct platform_device bfin_sport0_uart_device = {
  593. .name = "bfin-sport-uart",
  594. .id = 0,
  595. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  596. .resource = bfin_sport0_uart_resources,
  597. .dev = {
  598. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  599. },
  600. };
  601. #endif
  602. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  603. static struct resource bfin_sport1_uart_resources[] = {
  604. {
  605. .start = SPORT1_TCR1,
  606. .end = SPORT1_MRCS3+4,
  607. .flags = IORESOURCE_MEM,
  608. },
  609. {
  610. .start = IRQ_SPORT1_RX,
  611. .end = IRQ_SPORT1_RX+1,
  612. .flags = IORESOURCE_IRQ,
  613. },
  614. {
  615. .start = IRQ_SPORT1_ERROR,
  616. .end = IRQ_SPORT1_ERROR,
  617. .flags = IORESOURCE_IRQ,
  618. },
  619. };
  620. static unsigned short bfin_sport1_peripherals[] = {
  621. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  622. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  623. };
  624. static struct platform_device bfin_sport1_uart_device = {
  625. .name = "bfin-sport-uart",
  626. .id = 1,
  627. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  628. .resource = bfin_sport1_uart_resources,
  629. .dev = {
  630. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  631. },
  632. };
  633. #endif
  634. #endif
  635. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  636. #include <linux/input.h>
  637. #include <linux/gpio_keys.h>
  638. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  639. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  640. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  641. };
  642. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  643. .buttons = bfin_gpio_keys_table,
  644. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  645. };
  646. static struct platform_device bfin_device_gpiokeys = {
  647. .name = "gpio-keys",
  648. .dev = {
  649. .platform_data = &bfin_gpio_keys_data,
  650. },
  651. };
  652. #endif
  653. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  654. static struct bfin_sd_host bfin_sdh_data = {
  655. .dma_chan = CH_RSI,
  656. .irq_int0 = IRQ_RSI_INT0,
  657. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  658. };
  659. static struct platform_device bf51x_sdh_device = {
  660. .name = "bfin-sdh",
  661. .id = 0,
  662. .dev = {
  663. .platform_data = &bfin_sdh_data,
  664. },
  665. };
  666. #endif
  667. static const unsigned int cclk_vlev_datasheet[] =
  668. {
  669. VRPAIR(VLEV_100, 400000000),
  670. VRPAIR(VLEV_105, 426000000),
  671. VRPAIR(VLEV_110, 500000000),
  672. VRPAIR(VLEV_115, 533000000),
  673. VRPAIR(VLEV_120, 600000000),
  674. };
  675. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  676. .tuple_tab = cclk_vlev_datasheet,
  677. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  678. .vr_settling_time = 25 /* us */,
  679. };
  680. static struct platform_device bfin_dpmc = {
  681. .name = "bfin dpmc",
  682. .dev = {
  683. .platform_data = &bfin_dmpc_vreg_data,
  684. },
  685. };
  686. static struct platform_device *stamp_devices[] __initdata = {
  687. &bfin_dpmc,
  688. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  689. &rtc_device,
  690. #endif
  691. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  692. &bfin_mii_bus,
  693. &bfin_mac_device,
  694. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  695. &ksz8893m_switch_device,
  696. #endif
  697. #endif
  698. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  699. &bfin_spi0_device,
  700. &bfin_spi1_device,
  701. #endif
  702. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  703. #ifdef CONFIG_SERIAL_BFIN_UART0
  704. &bfin_uart0_device,
  705. #endif
  706. #ifdef CONFIG_SERIAL_BFIN_UART1
  707. &bfin_uart1_device,
  708. #endif
  709. #endif
  710. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  711. #ifdef CONFIG_BFIN_SIR0
  712. &bfin_sir0_device,
  713. #endif
  714. #ifdef CONFIG_BFIN_SIR1
  715. &bfin_sir1_device,
  716. #endif
  717. #endif
  718. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  719. &i2c_bfin_twi_device,
  720. #endif
  721. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  722. &bfin_i2s,
  723. #endif
  724. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  725. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  726. &bfin_sport0_uart_device,
  727. #endif
  728. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  729. &bfin_sport1_uart_device,
  730. #endif
  731. #endif
  732. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  733. &bfin_device_gpiokeys,
  734. #endif
  735. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  736. &bf51x_sdh_device,
  737. #endif
  738. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  739. &ezbrd_flash_device,
  740. #endif
  741. };
  742. static int __init ezbrd_init(void)
  743. {
  744. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  745. i2c_register_board_info(0, bfin_i2c_board_info,
  746. ARRAY_SIZE(bfin_i2c_board_info));
  747. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  748. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  749. /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
  750. peripheral_request(P_AMS2, "ParaFlash");
  751. #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
  752. peripheral_request(P_AMS3, "ParaFlash");
  753. #endif
  754. return 0;
  755. }
  756. arch_initcall(ezbrd_init);
  757. static struct platform_device *ezbrd_early_devices[] __initdata = {
  758. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  759. #ifdef CONFIG_SERIAL_BFIN_UART0
  760. &bfin_uart0_device,
  761. #endif
  762. #ifdef CONFIG_SERIAL_BFIN_UART1
  763. &bfin_uart1_device,
  764. #endif
  765. #endif
  766. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  767. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  768. &bfin_sport0_uart_device,
  769. #endif
  770. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  771. &bfin_sport1_uart_device,
  772. #endif
  773. #endif
  774. };
  775. void __init native_machine_early_platform_add_devices(void)
  776. {
  777. printk(KERN_INFO "register early platform devices\n");
  778. early_platform_add_devices(ezbrd_early_devices,
  779. ARRAY_SIZE(ezbrd_early_devices));
  780. }
  781. void native_machine_restart(char *cmd)
  782. {
  783. /* workaround reboot hang when booting from SPI */
  784. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  785. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  786. }
  787. void bfin_get_ether_addr(char *addr)
  788. {
  789. /* the MAC is stored in OTP memory page 0xDF */
  790. u32 ret;
  791. u64 otp_mac;
  792. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  793. ret = otp_read(0xDF, 0x00, &otp_mac);
  794. if (!(ret & 0x1)) {
  795. char *otp_mac_p = (char *)&otp_mac;
  796. for (ret = 0; ret < 6; ++ret)
  797. addr[ret] = otp_mac_p[5 - ret];
  798. }
  799. }
  800. EXPORT_SYMBOL(bfin_get_ether_addr);