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arch
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arm
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plat-tcc
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include
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mach
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hardware.h

hardware.h 1.3 KB
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  1. /*
    2. 

  2.  * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
    3. 

  3.  * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
    4. 

  4.  *                          and Dirk Behme <dirk.behme@de.bosch.com>
    5. 

  5.  * Rewritten by:    <linux@telechips.com>
    6. 

  6.  * Description: Hardware definitions for TCC8300 processors and boards
    7. 

  7.  *
    8. 

  8.  * Copyright (C) 2001 RidgeRun, Inc.
    9. 

  9.  * Copyright (C) 2008-2009 Telechips
    10. 

  10.  *
    11. 

  11.  * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
    12. 

  12.  *
    13. 

  13.  * Licensed under the terms of the GNU Pulic License version 2.
    14. 

  14.  */
    15. 

  15. 

  16. #ifndef __ASM_ARCH_TCC_HARDWARE_H
    17. 

  17. #define __ASM_ARCH_TCC_HARDWARE_H
    18. 

  18. 

  19. #include <asm/sizes.h>
    20. 

  20. #ifndef __ASSEMBLER__
    21. 

  21. #include <asm/types.h>
    22. 

  22. #endif
    23. 

  23. #include <mach/io.h>
    24. 

  24. 

  25. /*
    26. 

  26.  * ----------------------------------------------------------------------------
    27. 

  27.  * Clocks
    28. 

  28.  * ----------------------------------------------------------------------------
    29. 

  29.  */
    30. 

  30. #define CLKGEN_REG_BASE		0xfffece00
    31. 

  31. #define ARM_CKCTL		(CLKGEN_REG_BASE + 0x0)
    32. 

  32. #define ARM_IDLECT1		(CLKGEN_REG_BASE + 0x4)
    33. 

  33. #define ARM_IDLECT2		(CLKGEN_REG_BASE + 0x8)
    34. 

  34. #define ARM_EWUPCT		(CLKGEN_REG_BASE + 0xC)
    35. 

  35. #define ARM_RSTCT1		(CLKGEN_REG_BASE + 0x10)
    36. 

  36. #define ARM_RSTCT2		(CLKGEN_REG_BASE + 0x14)
    37. 

  37. #define ARM_SYSST		(CLKGEN_REG_BASE + 0x18)
    38. 

  38. #define ARM_IDLECT3		(CLKGEN_REG_BASE + 0x24)
    39. 

  39. 

  40. /* DPLL control registers */
    41. 

  41. #define DPLL_CTL		0xfffecf00
    42. 

  42. 

  43. #endif	/* __ASM_ARCH_TCC_HARDWARE_H */
    44.