entry-macro.S 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768
  1. /*
  2. * include/asm-arm/arch-tcc83x/entry-macro.S
  3. *
  4. * Author : <linux@telechips.com>
  5. * Created: June 10, 2008
  6. * Description: Low-level IRQ helper macros for Telechips-based platforms
  7. *
  8. * Copyright (C) 2008-2009 Telechips
  9. *
  10. * This file is licensed under the terms of the GNU General Public
  11. * License version 2. This program is licensed "as is" without any
  12. * warranty of any kind, whether express or implied.
  13. */
  14. #include <mach/hardware.h>
  15. #include <mach/irqs.h>
  16. .macro disable_fiq
  17. .endm
  18. .macro get_irqnr_preamble, base, tmp
  19. .endm
  20. .macro arch_ret_to_user, tmp1, tmp2
  21. .endm
  22. .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
  23. ldr \base, =0xF2003000 @ base address of PIC registers
  24. @@ read MREQ register of PIC0
  25. mov \irqnr, #0
  26. ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
  27. cmp \irqstat, #0
  28. bne 1001f
  29. @@ read MREQ register of PIC1
  30. ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
  31. cmp \irqstat, #0
  32. beq 1002f
  33. mov \irqnr, #0x20
  34. 1001:
  35. movs \tmp, \irqstat, lsl #16
  36. movne \irqstat, \tmp
  37. addeq \irqnr, \irqnr, #16
  38. movs \tmp, \irqstat, lsl #8
  39. movne \irqstat, \tmp
  40. addeq \irqnr, \irqnr, #8
  41. movs \tmp, \irqstat, lsl #4
  42. movne \irqstat, \tmp
  43. addeq \irqnr, \irqnr, #4
  44. movs \tmp, \irqstat, lsl #2
  45. movne \irqstat, \tmp
  46. addeq \irqnr, \irqnr, #2
  47. movs \tmp, \irqstat, lsl #1
  48. addeq \irqnr, \irqnr, #1
  49. orrs \base, \base, #1
  50. 1002:
  51. @@ exit here, Z flag unset if IRQ
  52. .endm