irq.c 1.8 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374
  1. /* arch/arm/plat-s5p/irq.c
  2. *
  3. * Copyright (c) 2009 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * S5P - Interrupt handling
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/irq.h>
  15. #include <linux/io.h>
  16. #include <asm/hardware/vic.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <plat/regs-timer.h>
  20. #include <plat/regs-serial.h>
  21. #include <plat/cpu.h>
  22. #include <plat/irq-vic-timer.h>
  23. #include <plat/irq-uart.h>
  24. /*
  25. * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
  26. * are consecutive when looking up the interrupt in the demux routines.
  27. */
  28. static struct s3c_uart_irq uart_irqs[] = {
  29. [0] = {
  30. .regs = S5P_VA_UART0,
  31. .base_irq = IRQ_S5P_UART_BASE0,
  32. .parent_irq = IRQ_UART0,
  33. },
  34. [1] = {
  35. .regs = S5P_VA_UART1,
  36. .base_irq = IRQ_S5P_UART_BASE1,
  37. .parent_irq = IRQ_UART1,
  38. },
  39. [2] = {
  40. .regs = S5P_VA_UART2,
  41. .base_irq = IRQ_S5P_UART_BASE2,
  42. .parent_irq = IRQ_UART2,
  43. },
  44. #if CONFIG_SERIAL_SAMSUNG_UARTS > 3
  45. [3] = {
  46. .regs = S5P_VA_UART3,
  47. .base_irq = IRQ_S5P_UART_BASE3,
  48. .parent_irq = IRQ_UART3,
  49. },
  50. #endif
  51. };
  52. void __init s5p_init_irq(u32 *vic, u32 num_vic)
  53. {
  54. #ifdef CONFIG_ARM_VIC
  55. int irq;
  56. /* initialize the VICs */
  57. for (irq = 0; irq < num_vic; irq++)
  58. vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
  59. #endif
  60. s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
  61. s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
  62. s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
  63. s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
  64. s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
  65. s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
  66. }