cpu.c 3.4 KB

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  1. /* linux/arch/arm/plat-s5p/cpu.c
  2. *
  3. * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * S5P CPU Support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <asm/mach/arch.h>
  15. #include <asm/mach/map.h>
  16. #include <mach/map.h>
  17. #include <mach/regs-clock.h>
  18. #include <plat/cpu.h>
  19. #include <plat/s5p6440.h>
  20. #include <plat/s5p6442.h>
  21. #include <plat/s5p6450.h>
  22. #include <plat/s5pc100.h>
  23. #include <plat/s5pv210.h>
  24. #include <plat/exynos4.h>
  25. /* table of supported CPUs */
  26. static const char name_s5p6440[] = "S5P6440";
  27. static const char name_s5p6442[] = "S5P6442";
  28. static const char name_s5p6450[] = "S5P6450";
  29. static const char name_s5pc100[] = "S5PC100";
  30. static const char name_s5pv210[] = "S5PV210/S5PC110";
  31. static const char name_exynos4210[] = "EXYNOS4210";
  32. static struct cpu_table cpu_ids[] __initdata = {
  33. {
  34. .idcode = 0x56440100,
  35. .idmask = 0xfffff000,
  36. .map_io = s5p6440_map_io,
  37. .init_clocks = s5p6440_init_clocks,
  38. .init_uarts = s5p6440_init_uarts,
  39. .init = s5p64x0_init,
  40. .name = name_s5p6440,
  41. }, {
  42. .idcode = 0x36442000,
  43. .idmask = 0xfffff000,
  44. .map_io = s5p6442_map_io,
  45. .init_clocks = s5p6442_init_clocks,
  46. .init_uarts = s5p6442_init_uarts,
  47. .init = s5p6442_init,
  48. .name = name_s5p6442,
  49. }, {
  50. .idcode = 0x36450000,
  51. .idmask = 0xfffff000,
  52. .map_io = s5p6450_map_io,
  53. .init_clocks = s5p6450_init_clocks,
  54. .init_uarts = s5p6450_init_uarts,
  55. .init = s5p64x0_init,
  56. .name = name_s5p6450,
  57. }, {
  58. .idcode = 0x43100000,
  59. .idmask = 0xfffff000,
  60. .map_io = s5pc100_map_io,
  61. .init_clocks = s5pc100_init_clocks,
  62. .init_uarts = s5pc100_init_uarts,
  63. .init = s5pc100_init,
  64. .name = name_s5pc100,
  65. }, {
  66. .idcode = 0x43110000,
  67. .idmask = 0xfffff000,
  68. .map_io = s5pv210_map_io,
  69. .init_clocks = s5pv210_init_clocks,
  70. .init_uarts = s5pv210_init_uarts,
  71. .init = s5pv210_init,
  72. .name = name_s5pv210,
  73. }, {
  74. .idcode = 0x43210000,
  75. .idmask = 0xfffe0000,
  76. .map_io = exynos4_map_io,
  77. .init_clocks = exynos4_init_clocks,
  78. .init_uarts = exynos4_init_uarts,
  79. .init = exynos4_init,
  80. .name = name_exynos4210,
  81. },
  82. };
  83. /* minimal IO mapping */
  84. static struct map_desc s5p_iodesc[] __initdata = {
  85. {
  86. .virtual = (unsigned long)S5P_VA_CHIPID,
  87. .pfn = __phys_to_pfn(S5P_PA_CHIPID),
  88. .length = SZ_4K,
  89. .type = MT_DEVICE,
  90. }, {
  91. .virtual = (unsigned long)S3C_VA_SYS,
  92. .pfn = __phys_to_pfn(S5P_PA_SYSCON),
  93. .length = SZ_64K,
  94. .type = MT_DEVICE,
  95. }, {
  96. .virtual = (unsigned long)S3C_VA_TIMER,
  97. .pfn = __phys_to_pfn(S5P_PA_TIMER),
  98. .length = SZ_16K,
  99. .type = MT_DEVICE,
  100. }, {
  101. .virtual = (unsigned long)S3C_VA_WATCHDOG,
  102. .pfn = __phys_to_pfn(S3C_PA_WDT),
  103. .length = SZ_4K,
  104. .type = MT_DEVICE,
  105. }, {
  106. .virtual = (unsigned long)S5P_VA_SROMC,
  107. .pfn = __phys_to_pfn(S5P_PA_SROMC),
  108. .length = SZ_4K,
  109. .type = MT_DEVICE,
  110. },
  111. };
  112. /* read cpu identification code */
  113. void __init s5p_init_io(struct map_desc *mach_desc,
  114. int size, void __iomem *cpuid_addr)
  115. {
  116. unsigned long idcode;
  117. /* initialize the io descriptors we need for initialization */
  118. iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
  119. if (mach_desc)
  120. iotable_init(mach_desc, size);
  121. idcode = __raw_readl(cpuid_addr);
  122. s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
  123. }