display.h 16 KB

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  1. /*
  2. * linux/include/asm-arm/arch-omap/display.h
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  20. #define __ASM_ARCH_OMAP_DISPLAY_H
  21. #include <linux/list.h>
  22. #include <linux/kobject.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <asm/atomic.h>
  26. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  27. #define DISPC_IRQ_VSYNC (1 << 1)
  28. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  29. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  30. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  31. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  32. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  33. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  34. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  35. #define DISPC_IRQ_OCP_ERR (1 << 9)
  36. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  37. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  38. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  39. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  40. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  41. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  42. #define DISPC_IRQ_WAKEUP (1 << 16)
  43. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  44. #define DISPC_IRQ_VSYNC2 (1 << 18)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. struct omap_dss_device;
  48. struct omap_overlay_manager;
  49. enum omap_display_type {
  50. OMAP_DISPLAY_TYPE_NONE = 0,
  51. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  52. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  53. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  54. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  55. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  56. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  57. };
  58. enum omap_plane {
  59. OMAP_DSS_GFX = 0,
  60. OMAP_DSS_VIDEO1 = 1,
  61. OMAP_DSS_VIDEO2 = 2
  62. };
  63. enum omap_channel {
  64. OMAP_DSS_CHANNEL_LCD = 0,
  65. OMAP_DSS_CHANNEL_DIGIT = 1,
  66. OMAP_DSS_CHANNEL_LCD2 = 2,
  67. };
  68. enum omap_color_mode {
  69. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  70. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  71. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  72. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  73. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  74. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  75. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  76. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  77. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  78. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  79. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  80. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  81. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  82. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  83. };
  84. enum omap_lcd_display_type {
  85. OMAP_DSS_LCD_DISPLAY_STN,
  86. OMAP_DSS_LCD_DISPLAY_TFT,
  87. };
  88. enum omap_dss_load_mode {
  89. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  90. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  91. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  92. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  93. };
  94. enum omap_dss_trans_key_type {
  95. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  96. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  97. };
  98. enum omap_rfbi_te_mode {
  99. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  100. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  101. };
  102. enum omap_panel_config {
  103. OMAP_DSS_LCD_IVS = 1<<0,
  104. OMAP_DSS_LCD_IHS = 1<<1,
  105. OMAP_DSS_LCD_IPC = 1<<2,
  106. OMAP_DSS_LCD_IEO = 1<<3,
  107. OMAP_DSS_LCD_RF = 1<<4,
  108. OMAP_DSS_LCD_ONOFF = 1<<5,
  109. OMAP_DSS_LCD_TFT = 1<<20,
  110. };
  111. enum omap_dss_venc_type {
  112. OMAP_DSS_VENC_TYPE_COMPOSITE,
  113. OMAP_DSS_VENC_TYPE_SVIDEO,
  114. };
  115. enum omap_display_caps {
  116. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  117. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  118. };
  119. enum omap_dss_update_mode {
  120. OMAP_DSS_UPDATE_DISABLED = 0,
  121. OMAP_DSS_UPDATE_AUTO,
  122. OMAP_DSS_UPDATE_MANUAL,
  123. };
  124. enum omap_dss_display_state {
  125. OMAP_DSS_DISPLAY_DISABLED = 0,
  126. OMAP_DSS_DISPLAY_ACTIVE,
  127. OMAP_DSS_DISPLAY_SUSPENDED,
  128. };
  129. /* XXX perhaps this should be removed */
  130. enum omap_dss_overlay_managers {
  131. OMAP_DSS_OVL_MGR_LCD,
  132. OMAP_DSS_OVL_MGR_TV,
  133. OMAP_DSS_OVL_MGR_LCD2,
  134. };
  135. enum omap_dss_rotation_type {
  136. OMAP_DSS_ROT_DMA = 0,
  137. OMAP_DSS_ROT_VRFB = 1,
  138. };
  139. /* clockwise rotation angle */
  140. enum omap_dss_rotation_angle {
  141. OMAP_DSS_ROT_0 = 0,
  142. OMAP_DSS_ROT_90 = 1,
  143. OMAP_DSS_ROT_180 = 2,
  144. OMAP_DSS_ROT_270 = 3,
  145. };
  146. enum omap_overlay_caps {
  147. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  148. OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
  149. };
  150. enum omap_overlay_manager_caps {
  151. OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
  152. };
  153. /* RFBI */
  154. struct rfbi_timings {
  155. int cs_on_time;
  156. int cs_off_time;
  157. int we_on_time;
  158. int we_off_time;
  159. int re_on_time;
  160. int re_off_time;
  161. int we_cycle_time;
  162. int re_cycle_time;
  163. int cs_pulse_width;
  164. int access_time;
  165. int clk_div;
  166. u32 tim[5]; /* set by rfbi_convert_timings() */
  167. int converted;
  168. };
  169. void omap_rfbi_write_command(const void *buf, u32 len);
  170. void omap_rfbi_read_data(void *buf, u32 len);
  171. void omap_rfbi_write_data(const void *buf, u32 len);
  172. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  173. u16 x, u16 y,
  174. u16 w, u16 h);
  175. int omap_rfbi_enable_te(bool enable, unsigned line);
  176. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  177. unsigned hs_pulse_time, unsigned vs_pulse_time,
  178. int hs_pol_inv, int vs_pol_inv, int extif_div);
  179. /* DSI */
  180. void dsi_bus_lock(void);
  181. void dsi_bus_unlock(void);
  182. int dsi_vc_dcs_write(int channel, u8 *data, int len);
  183. int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
  184. int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
  185. int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
  186. int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
  187. int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
  188. int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
  189. int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
  190. int dsi_vc_send_null(int channel);
  191. int dsi_vc_send_bta_sync(int channel);
  192. /* Board specific data */
  193. struct omap_dss_board_info {
  194. int (*get_last_off_on_transaction_id)(struct device *dev);
  195. int num_devices;
  196. struct omap_dss_device **devices;
  197. struct omap_dss_device *default_device;
  198. };
  199. #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
  200. /* Init with the board info */
  201. extern int omap_display_init(struct omap_dss_board_info *board_data);
  202. #else
  203. static inline int omap_display_init(struct omap_dss_board_info *board_data)
  204. {
  205. return 0;
  206. }
  207. #endif
  208. struct omap_display_platform_data {
  209. struct omap_dss_board_info *board_data;
  210. /* TODO: Additional members to be added when PM is considered */
  211. bool (*opt_clock_available)(const char *clk_role);
  212. };
  213. struct omap_video_timings {
  214. /* Unit: pixels */
  215. u16 x_res;
  216. /* Unit: pixels */
  217. u16 y_res;
  218. /* Unit: KHz */
  219. u32 pixel_clock;
  220. /* Unit: pixel clocks */
  221. u16 hsw; /* Horizontal synchronization pulse width */
  222. /* Unit: pixel clocks */
  223. u16 hfp; /* Horizontal front porch */
  224. /* Unit: pixel clocks */
  225. u16 hbp; /* Horizontal back porch */
  226. /* Unit: line clocks */
  227. u16 vsw; /* Vertical synchronization pulse width */
  228. /* Unit: line clocks */
  229. u16 vfp; /* Vertical front porch */
  230. /* Unit: line clocks */
  231. u16 vbp; /* Vertical back porch */
  232. };
  233. #ifdef CONFIG_OMAP2_DSS_VENC
  234. /* Hardcoded timings for tv modes. Venc only uses these to
  235. * identify the mode, and does not actually use the configs
  236. * itself. However, the configs should be something that
  237. * a normal monitor can also show */
  238. extern const struct omap_video_timings omap_dss_pal_timings;
  239. extern const struct omap_video_timings omap_dss_ntsc_timings;
  240. #endif
  241. struct omap_overlay_info {
  242. bool enabled;
  243. u32 paddr;
  244. void __iomem *vaddr;
  245. u16 screen_width;
  246. u16 width;
  247. u16 height;
  248. enum omap_color_mode color_mode;
  249. u8 rotation;
  250. enum omap_dss_rotation_type rotation_type;
  251. bool mirror;
  252. u16 pos_x;
  253. u16 pos_y;
  254. u16 out_width; /* if 0, out_width == width */
  255. u16 out_height; /* if 0, out_height == height */
  256. u8 global_alpha;
  257. u8 pre_mult_alpha;
  258. };
  259. struct omap_overlay {
  260. struct kobject kobj;
  261. struct list_head list;
  262. /* static fields */
  263. const char *name;
  264. int id;
  265. enum omap_color_mode supported_modes;
  266. enum omap_overlay_caps caps;
  267. /* dynamic fields */
  268. struct omap_overlay_manager *manager;
  269. struct omap_overlay_info info;
  270. /* if true, info has been changed, but not applied() yet */
  271. bool info_dirty;
  272. int (*set_manager)(struct omap_overlay *ovl,
  273. struct omap_overlay_manager *mgr);
  274. int (*unset_manager)(struct omap_overlay *ovl);
  275. int (*set_overlay_info)(struct omap_overlay *ovl,
  276. struct omap_overlay_info *info);
  277. void (*get_overlay_info)(struct omap_overlay *ovl,
  278. struct omap_overlay_info *info);
  279. int (*wait_for_go)(struct omap_overlay *ovl);
  280. };
  281. struct omap_overlay_manager_info {
  282. u32 default_color;
  283. enum omap_dss_trans_key_type trans_key_type;
  284. u32 trans_key;
  285. bool trans_enabled;
  286. bool alpha_enabled;
  287. };
  288. struct omap_overlay_manager {
  289. struct kobject kobj;
  290. struct list_head list;
  291. /* static fields */
  292. const char *name;
  293. int id;
  294. enum omap_overlay_manager_caps caps;
  295. int num_overlays;
  296. struct omap_overlay **overlays;
  297. enum omap_display_type supported_displays;
  298. /* dynamic fields */
  299. struct omap_dss_device *device;
  300. struct omap_overlay_manager_info info;
  301. bool device_changed;
  302. /* if true, info has been changed but not applied() yet */
  303. bool info_dirty;
  304. int (*set_device)(struct omap_overlay_manager *mgr,
  305. struct omap_dss_device *dssdev);
  306. int (*unset_device)(struct omap_overlay_manager *mgr);
  307. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  308. struct omap_overlay_manager_info *info);
  309. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  310. struct omap_overlay_manager_info *info);
  311. int (*apply)(struct omap_overlay_manager *mgr);
  312. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  313. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  314. int (*enable)(struct omap_overlay_manager *mgr);
  315. int (*disable)(struct omap_overlay_manager *mgr);
  316. };
  317. struct omap_dss_device {
  318. struct device dev;
  319. enum omap_display_type type;
  320. enum omap_channel channel;
  321. union {
  322. struct {
  323. u8 data_lines;
  324. } dpi;
  325. struct {
  326. u8 channel;
  327. u8 data_lines;
  328. } rfbi;
  329. struct {
  330. u8 datapairs;
  331. } sdi;
  332. struct {
  333. u8 clk_lane;
  334. u8 clk_pol;
  335. u8 data1_lane;
  336. u8 data1_pol;
  337. u8 data2_lane;
  338. u8 data2_pol;
  339. struct {
  340. u16 regn;
  341. u16 regm;
  342. u16 regm_dispc;
  343. u16 regm_dsi;
  344. u16 lp_clk_div;
  345. u16 lck_div;
  346. u16 pck_div;
  347. } div;
  348. bool ext_te;
  349. u8 ext_te_gpio;
  350. } dsi;
  351. struct {
  352. enum omap_dss_venc_type type;
  353. bool invert_polarity;
  354. } venc;
  355. } phy;
  356. struct {
  357. struct omap_video_timings timings;
  358. int acbi; /* ac-bias pin transitions per interrupt */
  359. /* Unit: line clocks */
  360. int acb; /* ac-bias pin frequency */
  361. enum omap_panel_config config;
  362. } panel;
  363. struct {
  364. u8 pixel_size;
  365. struct rfbi_timings rfbi_timings;
  366. } ctrl;
  367. int reset_gpio;
  368. int max_backlight_level;
  369. const char *name;
  370. /* used to match device to driver */
  371. const char *driver_name;
  372. void *data;
  373. struct omap_dss_driver *driver;
  374. /* helper variable for driver suspend/resume */
  375. bool activate_after_resume;
  376. enum omap_display_caps caps;
  377. struct omap_overlay_manager *manager;
  378. enum omap_dss_display_state state;
  379. /* platform specific */
  380. int (*platform_enable)(struct omap_dss_device *dssdev);
  381. void (*platform_disable)(struct omap_dss_device *dssdev);
  382. int (*set_backlight)(struct omap_dss_device *dssdev, int level);
  383. int (*get_backlight)(struct omap_dss_device *dssdev);
  384. };
  385. struct omap_dss_driver {
  386. struct device_driver driver;
  387. int (*probe)(struct omap_dss_device *);
  388. void (*remove)(struct omap_dss_device *);
  389. int (*enable)(struct omap_dss_device *display);
  390. void (*disable)(struct omap_dss_device *display);
  391. int (*suspend)(struct omap_dss_device *display);
  392. int (*resume)(struct omap_dss_device *display);
  393. int (*run_test)(struct omap_dss_device *display, int test);
  394. int (*set_update_mode)(struct omap_dss_device *dssdev,
  395. enum omap_dss_update_mode);
  396. enum omap_dss_update_mode (*get_update_mode)(
  397. struct omap_dss_device *dssdev);
  398. int (*update)(struct omap_dss_device *dssdev,
  399. u16 x, u16 y, u16 w, u16 h);
  400. int (*sync)(struct omap_dss_device *dssdev);
  401. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  402. int (*get_te)(struct omap_dss_device *dssdev);
  403. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  404. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  405. bool (*get_mirror)(struct omap_dss_device *dssdev);
  406. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  407. int (*memory_read)(struct omap_dss_device *dssdev,
  408. void *buf, size_t size,
  409. u16 x, u16 y, u16 w, u16 h);
  410. void (*get_resolution)(struct omap_dss_device *dssdev,
  411. u16 *xres, u16 *yres);
  412. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  413. int (*check_timings)(struct omap_dss_device *dssdev,
  414. struct omap_video_timings *timings);
  415. void (*set_timings)(struct omap_dss_device *dssdev,
  416. struct omap_video_timings *timings);
  417. void (*get_timings)(struct omap_dss_device *dssdev,
  418. struct omap_video_timings *timings);
  419. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  420. u32 (*get_wss)(struct omap_dss_device *dssdev);
  421. };
  422. int omap_dss_register_driver(struct omap_dss_driver *);
  423. void omap_dss_unregister_driver(struct omap_dss_driver *);
  424. int omap_dss_register_device(struct omap_dss_device *);
  425. void omap_dss_unregister_device(struct omap_dss_device *);
  426. void omap_dss_get_device(struct omap_dss_device *dssdev);
  427. void omap_dss_put_device(struct omap_dss_device *dssdev);
  428. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  429. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  430. struct omap_dss_device *omap_dss_find_device(void *data,
  431. int (*match)(struct omap_dss_device *dssdev, void *data));
  432. int omap_dss_start_device(struct omap_dss_device *dssdev);
  433. void omap_dss_stop_device(struct omap_dss_device *dssdev);
  434. int omap_dss_get_num_overlay_managers(void);
  435. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  436. int omap_dss_get_num_overlays(void);
  437. struct omap_overlay *omap_dss_get_overlay(int num);
  438. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  439. u16 *xres, u16 *yres);
  440. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  441. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  442. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  443. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  444. int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
  445. int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
  446. unsigned long timeout);
  447. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  448. #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
  449. void omapdss_dsi_vc_enable_hs(int channel, bool enable);
  450. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  451. int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
  452. u16 *x, u16 *y, u16 *w, u16 *h,
  453. bool enlarge_update_area);
  454. int omap_dsi_update(struct omap_dss_device *dssdev,
  455. int channel,
  456. u16 x, u16 y, u16 w, u16 h,
  457. void (*callback)(int, void *), void *data);
  458. int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
  459. int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
  460. void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
  461. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  462. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
  463. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  464. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  465. void dpi_set_timings(struct omap_dss_device *dssdev,
  466. struct omap_video_timings *timings);
  467. int dpi_check_timings(struct omap_dss_device *dssdev,
  468. struct omap_video_timings *timings);
  469. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  470. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  471. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  472. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  473. int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
  474. u16 *x, u16 *y, u16 *w, u16 *h);
  475. int omap_rfbi_update(struct omap_dss_device *dssdev,
  476. u16 x, u16 y, u16 w, u16 h,
  477. void (*callback)(void *), void *data);
  478. #endif