board-paz00.c 3.1 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-paz00.c
  3. *
  4. * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
  5. *
  6. * Based on board-harmony.c
  7. * Copyright (C) 2010 Google, Inc.
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/clk.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/pda_power.h>
  26. #include <linux/io.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/time.h>
  30. #include <asm/setup.h>
  31. #include <mach/iomap.h>
  32. #include <mach/irqs.h>
  33. #include <mach/sdhci.h>
  34. #include "board.h"
  35. #include "board-paz00.h"
  36. #include "clock.h"
  37. #include "devices.h"
  38. #include "gpio-names.h"
  39. static struct plat_serial8250_port debug_uart_platform_data[] = {
  40. {
  41. .membase = IO_ADDRESS(TEGRA_UARTD_BASE),
  42. .mapbase = TEGRA_UARTD_BASE,
  43. .irq = INT_UARTD,
  44. .flags = UPF_BOOT_AUTOCONF,
  45. .iotype = UPIO_MEM,
  46. .regshift = 2,
  47. .uartclk = 216000000,
  48. }, {
  49. .flags = 0
  50. }
  51. };
  52. static struct platform_device debug_uart = {
  53. .name = "serial8250",
  54. .id = PLAT8250_DEV_PLATFORM,
  55. .dev = {
  56. .platform_data = debug_uart_platform_data,
  57. },
  58. };
  59. static struct platform_device *paz00_devices[] __initdata = {
  60. &debug_uart,
  61. &tegra_sdhci_device1,
  62. &tegra_sdhci_device2,
  63. &tegra_sdhci_device4,
  64. };
  65. static void __init tegra_paz00_fixup(struct machine_desc *desc,
  66. struct tag *tags, char **cmdline, struct meminfo *mi)
  67. {
  68. mi->nr_banks = 1;
  69. mi->bank[0].start = PHYS_OFFSET;
  70. mi->bank[0].size = 448 * SZ_1M;
  71. }
  72. static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
  73. /* name parent rate enabled */
  74. { "uartd", "pll_p", 216000000, true },
  75. { NULL, NULL, 0, 0},
  76. };
  77. static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  78. .cd_gpio = TEGRA_GPIO_SD1_CD,
  79. .wp_gpio = TEGRA_GPIO_SD1_WP,
  80. .power_gpio = TEGRA_GPIO_SD1_POWER,
  81. };
  82. static struct tegra_sdhci_platform_data sdhci_pdata2 = {
  83. .cd_gpio = -1,
  84. .wp_gpio = -1,
  85. .power_gpio = -1,
  86. };
  87. static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  88. .cd_gpio = TEGRA_GPIO_SD4_CD,
  89. .wp_gpio = TEGRA_GPIO_SD4_WP,
  90. .power_gpio = TEGRA_GPIO_SD4_POWER,
  91. .is_8bit = 1,
  92. };
  93. static void __init tegra_paz00_init(void)
  94. {
  95. tegra_clk_init_from_table(paz00_clk_init_table);
  96. paz00_pinmux_init();
  97. tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
  98. tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
  99. tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
  100. platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
  101. }
  102. MACHINE_START(PAZ00, "paz00")
  103. .boot_params = 0x00000100,
  104. .fixup = tegra_paz00_fixup,
  105. .map_io = tegra_map_common_io,
  106. .init_early = tegra_init_early,
  107. .init_irq = tegra_init_irq,
  108. .timer = &tegra_timer,
  109. .init_machine = tegra_paz00_init,
  110. MACHINE_END