setup-sh73a0.c 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430
  1. /*
  2. * sh73a0 processor support
  3. *
  4. * Copyright (C) 2010 Takashi Yoshii
  5. * Copyright (C) 2010 Magnus Damm
  6. * Copyright (C) 2008 Yoshihiro Shimoda
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/input.h>
  28. #include <linux/io.h>
  29. #include <linux/serial_sci.h>
  30. #include <linux/sh_intc.h>
  31. #include <linux/sh_timer.h>
  32. #include <mach/hardware.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/mach/arch.h>
  35. static struct plat_sci_port scif0_platform_data = {
  36. .mapbase = 0xe6c40000,
  37. .flags = UPF_BOOT_AUTOCONF,
  38. .scscr = SCSCR_RE | SCSCR_TE,
  39. .scbrr_algo_id = SCBRR_ALGO_4,
  40. .type = PORT_SCIFA,
  41. .irqs = { gic_spi(72), gic_spi(72),
  42. gic_spi(72), gic_spi(72) },
  43. };
  44. static struct platform_device scif0_device = {
  45. .name = "sh-sci",
  46. .id = 0,
  47. .dev = {
  48. .platform_data = &scif0_platform_data,
  49. },
  50. };
  51. static struct plat_sci_port scif1_platform_data = {
  52. .mapbase = 0xe6c50000,
  53. .flags = UPF_BOOT_AUTOCONF,
  54. .scscr = SCSCR_RE | SCSCR_TE,
  55. .scbrr_algo_id = SCBRR_ALGO_4,
  56. .type = PORT_SCIFA,
  57. .irqs = { gic_spi(73), gic_spi(73),
  58. gic_spi(73), gic_spi(73) },
  59. };
  60. static struct platform_device scif1_device = {
  61. .name = "sh-sci",
  62. .id = 1,
  63. .dev = {
  64. .platform_data = &scif1_platform_data,
  65. },
  66. };
  67. static struct plat_sci_port scif2_platform_data = {
  68. .mapbase = 0xe6c60000,
  69. .flags = UPF_BOOT_AUTOCONF,
  70. .scscr = SCSCR_RE | SCSCR_TE,
  71. .scbrr_algo_id = SCBRR_ALGO_4,
  72. .type = PORT_SCIFA,
  73. .irqs = { gic_spi(74), gic_spi(74),
  74. gic_spi(74), gic_spi(74) },
  75. };
  76. static struct platform_device scif2_device = {
  77. .name = "sh-sci",
  78. .id = 2,
  79. .dev = {
  80. .platform_data = &scif2_platform_data,
  81. },
  82. };
  83. static struct plat_sci_port scif3_platform_data = {
  84. .mapbase = 0xe6c70000,
  85. .flags = UPF_BOOT_AUTOCONF,
  86. .scscr = SCSCR_RE | SCSCR_TE,
  87. .scbrr_algo_id = SCBRR_ALGO_4,
  88. .type = PORT_SCIFA,
  89. .irqs = { gic_spi(75), gic_spi(75),
  90. gic_spi(75), gic_spi(75) },
  91. };
  92. static struct platform_device scif3_device = {
  93. .name = "sh-sci",
  94. .id = 3,
  95. .dev = {
  96. .platform_data = &scif3_platform_data,
  97. },
  98. };
  99. static struct plat_sci_port scif4_platform_data = {
  100. .mapbase = 0xe6c80000,
  101. .flags = UPF_BOOT_AUTOCONF,
  102. .scscr = SCSCR_RE | SCSCR_TE,
  103. .scbrr_algo_id = SCBRR_ALGO_4,
  104. .type = PORT_SCIFA,
  105. .irqs = { gic_spi(78), gic_spi(78),
  106. gic_spi(78), gic_spi(78) },
  107. };
  108. static struct platform_device scif4_device = {
  109. .name = "sh-sci",
  110. .id = 4,
  111. .dev = {
  112. .platform_data = &scif4_platform_data,
  113. },
  114. };
  115. static struct plat_sci_port scif5_platform_data = {
  116. .mapbase = 0xe6cb0000,
  117. .flags = UPF_BOOT_AUTOCONF,
  118. .scscr = SCSCR_RE | SCSCR_TE,
  119. .scbrr_algo_id = SCBRR_ALGO_4,
  120. .type = PORT_SCIFA,
  121. .irqs = { gic_spi(79), gic_spi(79),
  122. gic_spi(79), gic_spi(79) },
  123. };
  124. static struct platform_device scif5_device = {
  125. .name = "sh-sci",
  126. .id = 5,
  127. .dev = {
  128. .platform_data = &scif5_platform_data,
  129. },
  130. };
  131. static struct plat_sci_port scif6_platform_data = {
  132. .mapbase = 0xe6cc0000,
  133. .flags = UPF_BOOT_AUTOCONF,
  134. .scscr = SCSCR_RE | SCSCR_TE,
  135. .scbrr_algo_id = SCBRR_ALGO_4,
  136. .type = PORT_SCIFA,
  137. .irqs = { gic_spi(156), gic_spi(156),
  138. gic_spi(156), gic_spi(156) },
  139. };
  140. static struct platform_device scif6_device = {
  141. .name = "sh-sci",
  142. .id = 6,
  143. .dev = {
  144. .platform_data = &scif6_platform_data,
  145. },
  146. };
  147. static struct plat_sci_port scif7_platform_data = {
  148. .mapbase = 0xe6cd0000,
  149. .flags = UPF_BOOT_AUTOCONF,
  150. .scscr = SCSCR_RE | SCSCR_TE,
  151. .scbrr_algo_id = SCBRR_ALGO_4,
  152. .type = PORT_SCIFA,
  153. .irqs = { gic_spi(143), gic_spi(143),
  154. gic_spi(143), gic_spi(143) },
  155. };
  156. static struct platform_device scif7_device = {
  157. .name = "sh-sci",
  158. .id = 7,
  159. .dev = {
  160. .platform_data = &scif7_platform_data,
  161. },
  162. };
  163. static struct plat_sci_port scif8_platform_data = {
  164. .mapbase = 0xe6c30000,
  165. .flags = UPF_BOOT_AUTOCONF,
  166. .scscr = SCSCR_RE | SCSCR_TE,
  167. .scbrr_algo_id = SCBRR_ALGO_4,
  168. .type = PORT_SCIFB,
  169. .irqs = { gic_spi(80), gic_spi(80),
  170. gic_spi(80), gic_spi(80) },
  171. };
  172. static struct platform_device scif8_device = {
  173. .name = "sh-sci",
  174. .id = 8,
  175. .dev = {
  176. .platform_data = &scif8_platform_data,
  177. },
  178. };
  179. static struct sh_timer_config cmt10_platform_data = {
  180. .name = "CMT10",
  181. .channel_offset = 0x10,
  182. .timer_bit = 0,
  183. .clockevent_rating = 125,
  184. .clocksource_rating = 125,
  185. };
  186. static struct resource cmt10_resources[] = {
  187. [0] = {
  188. .name = "CMT10",
  189. .start = 0xe6138010,
  190. .end = 0xe613801b,
  191. .flags = IORESOURCE_MEM,
  192. },
  193. [1] = {
  194. .start = gic_spi(65),
  195. .flags = IORESOURCE_IRQ,
  196. },
  197. };
  198. static struct platform_device cmt10_device = {
  199. .name = "sh_cmt",
  200. .id = 10,
  201. .dev = {
  202. .platform_data = &cmt10_platform_data,
  203. },
  204. .resource = cmt10_resources,
  205. .num_resources = ARRAY_SIZE(cmt10_resources),
  206. };
  207. /* TMU */
  208. static struct sh_timer_config tmu00_platform_data = {
  209. .name = "TMU00",
  210. .channel_offset = 0x4,
  211. .timer_bit = 0,
  212. .clockevent_rating = 200,
  213. };
  214. static struct resource tmu00_resources[] = {
  215. [0] = {
  216. .name = "TMU00",
  217. .start = 0xfff60008,
  218. .end = 0xfff60013,
  219. .flags = IORESOURCE_MEM,
  220. },
  221. [1] = {
  222. .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. };
  226. static struct platform_device tmu00_device = {
  227. .name = "sh_tmu",
  228. .id = 0,
  229. .dev = {
  230. .platform_data = &tmu00_platform_data,
  231. },
  232. .resource = tmu00_resources,
  233. .num_resources = ARRAY_SIZE(tmu00_resources),
  234. };
  235. static struct sh_timer_config tmu01_platform_data = {
  236. .name = "TMU01",
  237. .channel_offset = 0x10,
  238. .timer_bit = 1,
  239. .clocksource_rating = 200,
  240. };
  241. static struct resource tmu01_resources[] = {
  242. [0] = {
  243. .name = "TMU01",
  244. .start = 0xfff60014,
  245. .end = 0xfff6001f,
  246. .flags = IORESOURCE_MEM,
  247. },
  248. [1] = {
  249. .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
  250. .flags = IORESOURCE_IRQ,
  251. },
  252. };
  253. static struct platform_device tmu01_device = {
  254. .name = "sh_tmu",
  255. .id = 1,
  256. .dev = {
  257. .platform_data = &tmu01_platform_data,
  258. },
  259. .resource = tmu01_resources,
  260. .num_resources = ARRAY_SIZE(tmu01_resources),
  261. };
  262. static struct resource i2c0_resources[] = {
  263. [0] = {
  264. .name = "IIC0",
  265. .start = 0xe6820000,
  266. .end = 0xe6820425 - 1,
  267. .flags = IORESOURCE_MEM,
  268. },
  269. [1] = {
  270. .start = gic_spi(167),
  271. .end = gic_spi(170),
  272. .flags = IORESOURCE_IRQ,
  273. },
  274. };
  275. static struct resource i2c1_resources[] = {
  276. [0] = {
  277. .name = "IIC1",
  278. .start = 0xe6822000,
  279. .end = 0xe6822425 - 1,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. [1] = {
  283. .start = gic_spi(51),
  284. .end = gic_spi(54),
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. };
  288. static struct resource i2c2_resources[] = {
  289. [0] = {
  290. .name = "IIC2",
  291. .start = 0xe6824000,
  292. .end = 0xe6824425 - 1,
  293. .flags = IORESOURCE_MEM,
  294. },
  295. [1] = {
  296. .start = gic_spi(171),
  297. .end = gic_spi(174),
  298. .flags = IORESOURCE_IRQ,
  299. },
  300. };
  301. static struct resource i2c3_resources[] = {
  302. [0] = {
  303. .name = "IIC3",
  304. .start = 0xe6826000,
  305. .end = 0xe6826425 - 1,
  306. .flags = IORESOURCE_MEM,
  307. },
  308. [1] = {
  309. .start = gic_spi(183),
  310. .end = gic_spi(186),
  311. .flags = IORESOURCE_IRQ,
  312. },
  313. };
  314. static struct resource i2c4_resources[] = {
  315. [0] = {
  316. .name = "IIC4",
  317. .start = 0xe6828000,
  318. .end = 0xe6828425 - 1,
  319. .flags = IORESOURCE_MEM,
  320. },
  321. [1] = {
  322. .start = gic_spi(187),
  323. .end = gic_spi(190),
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. };
  327. static struct platform_device i2c0_device = {
  328. .name = "i2c-sh_mobile",
  329. .id = 0,
  330. .resource = i2c0_resources,
  331. .num_resources = ARRAY_SIZE(i2c0_resources),
  332. };
  333. static struct platform_device i2c1_device = {
  334. .name = "i2c-sh_mobile",
  335. .id = 1,
  336. .resource = i2c1_resources,
  337. .num_resources = ARRAY_SIZE(i2c1_resources),
  338. };
  339. static struct platform_device i2c2_device = {
  340. .name = "i2c-sh_mobile",
  341. .id = 2,
  342. .resource = i2c2_resources,
  343. .num_resources = ARRAY_SIZE(i2c2_resources),
  344. };
  345. static struct platform_device i2c3_device = {
  346. .name = "i2c-sh_mobile",
  347. .id = 3,
  348. .resource = i2c3_resources,
  349. .num_resources = ARRAY_SIZE(i2c3_resources),
  350. };
  351. static struct platform_device i2c4_device = {
  352. .name = "i2c-sh_mobile",
  353. .id = 4,
  354. .resource = i2c4_resources,
  355. .num_resources = ARRAY_SIZE(i2c4_resources),
  356. };
  357. static struct platform_device *sh73a0_early_devices[] __initdata = {
  358. &scif0_device,
  359. &scif1_device,
  360. &scif2_device,
  361. &scif3_device,
  362. &scif4_device,
  363. &scif5_device,
  364. &scif6_device,
  365. &scif7_device,
  366. &scif8_device,
  367. &cmt10_device,
  368. &tmu00_device,
  369. &tmu01_device,
  370. };
  371. static struct platform_device *sh73a0_late_devices[] __initdata = {
  372. &i2c0_device,
  373. &i2c1_device,
  374. &i2c2_device,
  375. &i2c3_device,
  376. &i2c4_device,
  377. };
  378. void __init sh73a0_add_standard_devices(void)
  379. {
  380. platform_add_devices(sh73a0_early_devices,
  381. ARRAY_SIZE(sh73a0_early_devices));
  382. platform_add_devices(sh73a0_late_devices,
  383. ARRAY_SIZE(sh73a0_late_devices));
  384. }
  385. void __init sh73a0_add_early_devices(void)
  386. {
  387. early_platform_add_devices(sh73a0_early_devices,
  388. ARRAY_SIZE(sh73a0_early_devices));
  389. }