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arm
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mach-s5p64x0
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include
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mach
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regs-clock.h

regs-clock.h 1.9 KB
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  1. /* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
    4. 

  4.  *		http://www.samsung.com
    5. 

  5.  *
    6. 

  6.  * S5P64X0 - Clock register definitions
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or modify
    9. 

  9.  * it under the terms of the GNU General Public License version 2 as
    10. 

  10.  * published by the Free Software Foundation.
    11. 

  11. */
    12. 

  12. 

  13. #ifndef __ASM_ARCH_REGS_CLOCK_H
    14. 

  14. #define __ASM_ARCH_REGS_CLOCK_H __FILE__
    15. 

  15. 

  16. #include <mach/map.h>
    17. 

  17. 

  18. #define S5P_CLKREG(x)			(S3C_VA_SYS + (x))
    19. 

  19. 

  20. #define S5P64X0_APLL_CON		S5P_CLKREG(0x0C)
    21. 

  21. #define S5P64X0_MPLL_CON		S5P_CLKREG(0x10)
    22. 

  22. #define S5P64X0_EPLL_CON		S5P_CLKREG(0x14)
    23. 

  23. #define S5P64X0_EPLL_CON_K		S5P_CLKREG(0x18)
    24. 

  24. 

  25. #define S5P64X0_CLK_SRC0		S5P_CLKREG(0x1C)
    26. 

  26. 

  27. #define S5P64X0_CLK_DIV0		S5P_CLKREG(0x20)
    28. 

  28. #define S5P64X0_CLK_DIV1		S5P_CLKREG(0x24)
    29. 

  29. #define S5P64X0_CLK_DIV2		S5P_CLKREG(0x28)
    30. 

  30. 

  31. #define S5P64X0_CLK_GATE_HCLK0		S5P_CLKREG(0x30)
    32. 

  32. #define S5P64X0_CLK_GATE_PCLK		S5P_CLKREG(0x34)
    33. 

  33. #define S5P64X0_CLK_GATE_SCLK0		S5P_CLKREG(0x38)
    34. 

  34. #define S5P64X0_CLK_GATE_MEM0		S5P_CLKREG(0x3C)
    35. 

  35. 

  36. #define S5P64X0_CLK_DIV3		S5P_CLKREG(0x40)
    37. 

  37. 

  38. #define S5P64X0_CLK_GATE_HCLK1		S5P_CLKREG(0x44)
    39. 

  39. #define S5P64X0_CLK_GATE_SCLK1		S5P_CLKREG(0x48)
    40. 

  40. 

  41. #define S5P6450_DPLL_CON		S5P_CLKREG(0x50)
    42. 

  42. #define S5P6450_DPLL_CON_K		S5P_CLKREG(0x54)
    43. 

  43. 

  44. #define S5P64X0_CLK_SRC1		S5P_CLKREG(0x10C)
    45. 

  45. 

  46. #define S5P64X0_SYS_ID			S5P_CLKREG(0x118)
    47. 

  47. #define S5P64X0_SYS_OTHERS		S5P_CLKREG(0x11C)
    48. 

  48. 

  49. #define S5P64X0_PWR_CFG			S5P_CLKREG(0x804)
    50. 

  50. #define S5P64X0_OTHERS			S5P_CLKREG(0x900)
    51. 

  51. 

  52. #define S5P64X0_CLKDIV0_HCLK_SHIFT	(8)
    53. 

  53. #define S5P64X0_CLKDIV0_HCLK_MASK	(0xF << S5P64X0_CLKDIV0_HCLK_SHIFT)
    54. 

  54. 

  55. #define S5P64X0_OTHERS_USB_SIG_MASK	(1 << 16)
    56. 

  56. 

  57. /* Compatibility defines */
    58. 

  58. 

  59. #define ARM_CLK_DIV			S5P64X0_CLK_DIV0
    60. 

  60. #define ARM_DIV_RATIO_SHIFT		0
    61. 

  61. #define ARM_DIV_MASK			(0xF << ARM_DIV_RATIO_SHIFT)
    62. 

  62. 

  63. #define S5P_EPLL_CON			S5P64X0_EPLL_CON
    64. 

  64. 

  65. #endif /* __ASM_ARCH_REGS_CLOCK_H */
    66.