cpufreq-pxa3xx.c 6.4 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c
  3. *
  4. * Copyright (C) 2008 Marvell International Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/sched.h>
  14. #include <linux/init.h>
  15. #include <linux/cpufreq.h>
  16. #include <linux/slab.h>
  17. #include <mach/pxa3xx-regs.h>
  18. #include "generic.h"
  19. #define HSS_104M (0)
  20. #define HSS_156M (1)
  21. #define HSS_208M (2)
  22. #define HSS_312M (3)
  23. #define SMCFS_78M (0)
  24. #define SMCFS_104M (2)
  25. #define SMCFS_208M (5)
  26. #define SFLFS_104M (0)
  27. #define SFLFS_156M (1)
  28. #define SFLFS_208M (2)
  29. #define SFLFS_312M (3)
  30. #define XSPCLK_156M (0)
  31. #define XSPCLK_NONE (3)
  32. #define DMCFS_26M (0)
  33. #define DMCFS_260M (3)
  34. struct pxa3xx_freq_info {
  35. unsigned int cpufreq_mhz;
  36. unsigned int core_xl : 5;
  37. unsigned int core_xn : 3;
  38. unsigned int hss : 2;
  39. unsigned int dmcfs : 2;
  40. unsigned int smcfs : 3;
  41. unsigned int sflfs : 2;
  42. unsigned int df_clkdiv : 3;
  43. int vcc_core; /* in mV */
  44. int vcc_sram; /* in mV */
  45. };
  46. #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
  47. { \
  48. .cpufreq_mhz = cpufreq, \
  49. .core_xl = _xl, \
  50. .core_xn = _xn, \
  51. .hss = HSS_##_hss##M, \
  52. .dmcfs = DMCFS_##_dmc##M, \
  53. .smcfs = SMCFS_##_smc##M, \
  54. .sflfs = SFLFS_##_sfl##M, \
  55. .df_clkdiv = _dfi, \
  56. .vcc_core = vcore, \
  57. .vcc_sram = vsram, \
  58. }
  59. static struct pxa3xx_freq_info pxa300_freqs[] = {
  60. /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  61. OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
  62. OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  63. OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  64. OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  65. };
  66. static struct pxa3xx_freq_info pxa320_freqs[] = {
  67. /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
  68. OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
  69. OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
  70. OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
  71. OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
  72. OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
  73. };
  74. static unsigned int pxa3xx_freqs_num;
  75. static struct pxa3xx_freq_info *pxa3xx_freqs;
  76. static struct cpufreq_frequency_table *pxa3xx_freqs_table;
  77. static int setup_freqs_table(struct cpufreq_policy *policy,
  78. struct pxa3xx_freq_info *freqs, int num)
  79. {
  80. struct cpufreq_frequency_table *table;
  81. int i;
  82. table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL);
  83. if (table == NULL)
  84. return -ENOMEM;
  85. for (i = 0; i < num; i++) {
  86. table[i].index = i;
  87. table[i].frequency = freqs[i].cpufreq_mhz * 1000;
  88. }
  89. table[num].index = i;
  90. table[num].frequency = CPUFREQ_TABLE_END;
  91. pxa3xx_freqs = freqs;
  92. pxa3xx_freqs_num = num;
  93. pxa3xx_freqs_table = table;
  94. return cpufreq_frequency_table_cpuinfo(policy, table);
  95. }
  96. static void __update_core_freq(struct pxa3xx_freq_info *info)
  97. {
  98. uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
  99. uint32_t accr = ACCR;
  100. uint32_t xclkcfg;
  101. accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
  102. accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
  103. /* No clock until core PLL is re-locked */
  104. accr |= ACCR_XSPCLK(XSPCLK_NONE);
  105. xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2; /* turbo bit */
  106. ACCR = accr;
  107. __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
  108. while ((ACSR & mask) != (accr & mask))
  109. cpu_relax();
  110. }
  111. static void __update_bus_freq(struct pxa3xx_freq_info *info)
  112. {
  113. uint32_t mask;
  114. uint32_t accr = ACCR;
  115. mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
  116. ACCR_DMCFS_MASK;
  117. accr &= ~mask;
  118. accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
  119. ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
  120. ACCR = accr;
  121. while ((ACSR & mask) != (accr & mask))
  122. cpu_relax();
  123. }
  124. static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
  125. {
  126. return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table);
  127. }
  128. static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
  129. {
  130. return pxa3xx_get_clk_frequency_khz(0);
  131. }
  132. static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
  133. unsigned int target_freq,
  134. unsigned int relation)
  135. {
  136. struct pxa3xx_freq_info *next;
  137. struct cpufreq_freqs freqs;
  138. unsigned long flags;
  139. int idx;
  140. if (policy->cpu != 0)
  141. return -EINVAL;
  142. /* Lookup the next frequency */
  143. if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table,
  144. target_freq, relation, &idx))
  145. return -EINVAL;
  146. next = &pxa3xx_freqs[idx];
  147. freqs.old = policy->cur;
  148. freqs.new = next->cpufreq_mhz * 1000;
  149. freqs.cpu = policy->cpu;
  150. pr_debug("CPU frequency from %d MHz to %d MHz%s\n",
  151. freqs.old / 1000, freqs.new / 1000,
  152. (freqs.old == freqs.new) ? " (skipped)" : "");
  153. if (freqs.old == target_freq)
  154. return 0;
  155. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  156. local_irq_save(flags);
  157. __update_core_freq(next);
  158. __update_bus_freq(next);
  159. local_irq_restore(flags);
  160. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  161. return 0;
  162. }
  163. static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
  164. {
  165. int ret = -EINVAL;
  166. /* set default policy and cpuinfo */
  167. policy->cpuinfo.min_freq = 104000;
  168. policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
  169. policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
  170. policy->max = pxa3xx_get_clk_frequency_khz(0);
  171. policy->cur = policy->min = policy->max;
  172. if (cpu_is_pxa300() || cpu_is_pxa310())
  173. ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
  174. if (cpu_is_pxa320())
  175. ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs));
  176. if (ret) {
  177. pr_err("failed to setup frequency table\n");
  178. return ret;
  179. }
  180. pr_info("CPUFREQ support for PXA3xx initialized\n");
  181. return 0;
  182. }
  183. static struct cpufreq_driver pxa3xx_cpufreq_driver = {
  184. .verify = pxa3xx_cpufreq_verify,
  185. .target = pxa3xx_cpufreq_set,
  186. .init = pxa3xx_cpufreq_init,
  187. .get = pxa3xx_cpufreq_get,
  188. .name = "pxa3xx-cpufreq",
  189. };
  190. static int __init cpufreq_init(void)
  191. {
  192. if (cpu_is_pxa3xx())
  193. return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
  194. return 0;
  195. }
  196. module_init(cpufreq_init);
  197. static void __exit cpufreq_exit(void)
  198. {
  199. cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
  200. }
  201. module_exit(cpufreq_exit);
  202. MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
  203. MODULE_LICENSE("GPL");