omap_l3_noc.c 6.2 KB

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  1. /*
  2. * OMAP4XXX L3 Interconnect error handling driver
  3. *
  4. * Copyright (C) 2011 Texas Corporation
  5. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  6. * Sricharan <r.sricharan@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  21. * USA
  22. */
  23. #include <linux/init.h>
  24. #include <linux/io.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/kernel.h>
  28. #include <linux/slab.h>
  29. #include "omap_l3_noc.h"
  30. /*
  31. * Interrupt Handler for L3 error detection.
  32. * 1) Identify the L3 clockdomain partition to which the error belongs to.
  33. * 2) Identify the slave where the error information is logged
  34. * 3) Print the logged information.
  35. * 4) Add dump stack to provide kernel trace.
  36. *
  37. * Two Types of errors :
  38. * 1) Custom errors in L3 :
  39. * Target like DMM/FW/EMIF generates SRESP=ERR error
  40. * 2) Standard L3 error:
  41. * - Unsupported CMD.
  42. * L3 tries to access target while it is idle
  43. * - OCP disconnect.
  44. * - Address hole error:
  45. * If DSS/ISS/FDIF/USBHOSTFS access a target where they
  46. * do not have connectivity, the error is logged in
  47. * their default target which is DMM2.
  48. *
  49. * On High Secure devices, firewall errors are possible and those
  50. * can be trapped as well. But the trapping is implemented as part
  51. * secure software and hence need not be implemented here.
  52. */
  53. static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
  54. {
  55. struct omap4_l3 *l3 = _l3;
  56. int inttype, i, j;
  57. int err_src = 0;
  58. u32 std_err_main_addr, std_err_main, err_reg;
  59. u32 base, slave_addr, clear;
  60. char *source_name;
  61. /* Get the Type of interrupt */
  62. if (irq == l3->app_irq)
  63. inttype = L3_APPLICATION_ERROR;
  64. else
  65. inttype = L3_DEBUG_ERROR;
  66. for (i = 0; i < L3_MODULES; i++) {
  67. /*
  68. * Read the regerr register of the clock domain
  69. * to determine the source
  70. */
  71. base = (u32)l3->l3_base[i];
  72. err_reg = readl(base + l3_flagmux[i] + (inttype << 3));
  73. /* Get the corresponding error and analyse */
  74. if (err_reg) {
  75. /* Identify the source from control status register */
  76. for (j = 0; !(err_reg & (1 << j)); j++)
  77. ;
  78. err_src = j;
  79. /* Read the stderrlog_main_source from clk domain */
  80. std_err_main_addr = base + (*(l3_targ[i] + err_src));
  81. std_err_main = readl(std_err_main_addr);
  82. switch ((std_err_main & CUSTOM_ERROR)) {
  83. case STANDARD_ERROR:
  84. source_name =
  85. l3_targ_stderrlog_main_name[i][err_src];
  86. slave_addr = std_err_main_addr +
  87. L3_SLAVE_ADDRESS_OFFSET;
  88. WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
  89. source_name, readl(slave_addr));
  90. /* clear the std error log*/
  91. clear = std_err_main | CLEAR_STDERR_LOG;
  92. writel(clear, std_err_main_addr);
  93. break;
  94. case CUSTOM_ERROR:
  95. source_name =
  96. l3_targ_stderrlog_main_name[i][err_src];
  97. WARN(true, "CUSTOM SRESP error with SOURCE:%s\n",
  98. source_name);
  99. /* clear the std error log*/
  100. clear = std_err_main | CLEAR_STDERR_LOG;
  101. writel(clear, std_err_main_addr);
  102. break;
  103. default:
  104. /* Nothing to be handled here as of now */
  105. break;
  106. }
  107. /* Error found so break the for loop */
  108. break;
  109. }
  110. }
  111. return IRQ_HANDLED;
  112. }
  113. static int __init omap4_l3_probe(struct platform_device *pdev)
  114. {
  115. static struct omap4_l3 *l3;
  116. struct resource *res;
  117. int ret;
  118. int irq;
  119. l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
  120. if (!l3)
  121. ret = -ENOMEM;
  122. platform_set_drvdata(pdev, l3);
  123. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  124. if (!res) {
  125. dev_err(&pdev->dev, "couldn't find resource 0\n");
  126. ret = -ENODEV;
  127. goto err1;
  128. }
  129. l3->l3_base[0] = ioremap(res->start, resource_size(res));
  130. if (!(l3->l3_base[0])) {
  131. dev_err(&pdev->dev, "ioremap failed\n");
  132. ret = -ENOMEM;
  133. goto err2;
  134. }
  135. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  136. if (!res) {
  137. dev_err(&pdev->dev, "couldn't find resource 1\n");
  138. ret = -ENODEV;
  139. goto err3;
  140. }
  141. l3->l3_base[1] = ioremap(res->start, resource_size(res));
  142. if (!(l3->l3_base[1])) {
  143. dev_err(&pdev->dev, "ioremap failed\n");
  144. ret = -ENOMEM;
  145. goto err4;
  146. }
  147. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  148. if (!res) {
  149. dev_err(&pdev->dev, "couldn't find resource 2\n");
  150. ret = -ENODEV;
  151. goto err5;
  152. }
  153. l3->l3_base[2] = ioremap(res->start, resource_size(res));
  154. if (!(l3->l3_base[2])) {
  155. dev_err(&pdev->dev, "ioremap failed\n");
  156. ret = -ENOMEM;
  157. goto err6;
  158. }
  159. /*
  160. * Setup interrupt Handlers
  161. */
  162. irq = platform_get_irq(pdev, 0);
  163. ret = request_irq(irq,
  164. l3_interrupt_handler,
  165. IRQF_DISABLED, "l3-dbg-irq", l3);
  166. if (ret) {
  167. pr_crit("L3: request_irq failed to register for 0x%x\n",
  168. OMAP44XX_IRQ_L3_DBG);
  169. goto err7;
  170. }
  171. l3->debug_irq = irq;
  172. irq = platform_get_irq(pdev, 1);
  173. ret = request_irq(irq,
  174. l3_interrupt_handler,
  175. IRQF_DISABLED, "l3-app-irq", l3);
  176. if (ret) {
  177. pr_crit("L3: request_irq failed to register for 0x%x\n",
  178. OMAP44XX_IRQ_L3_APP);
  179. goto err8;
  180. }
  181. l3->app_irq = irq;
  182. goto err0;
  183. err8:
  184. err7:
  185. iounmap(l3->l3_base[2]);
  186. err6:
  187. err5:
  188. iounmap(l3->l3_base[1]);
  189. err4:
  190. err3:
  191. iounmap(l3->l3_base[0]);
  192. err2:
  193. err1:
  194. kfree(l3);
  195. err0:
  196. return ret;
  197. }
  198. static int __exit omap4_l3_remove(struct platform_device *pdev)
  199. {
  200. struct omap4_l3 *l3 = platform_get_drvdata(pdev);
  201. free_irq(l3->app_irq, l3);
  202. free_irq(l3->debug_irq, l3);
  203. iounmap(l3->l3_base[0]);
  204. iounmap(l3->l3_base[1]);
  205. iounmap(l3->l3_base[2]);
  206. kfree(l3);
  207. return 0;
  208. }
  209. static struct platform_driver omap4_l3_driver = {
  210. .remove = __exit_p(omap4_l3_remove),
  211. .driver = {
  212. .name = "omap_l3_noc",
  213. },
  214. };
  215. static int __init omap4_l3_init(void)
  216. {
  217. return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe);
  218. }
  219. postcore_initcall_sync(omap4_l3_init);
  220. static void __exit omap4_l3_exit(void)
  221. {
  222. platform_driver_unregister(&omap4_l3_driver);
  223. }
  224. module_exit(omap4_l3_exit);