devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/io.h>
  15. #include <linux/clk.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <mach/hardware.h>
  19. #include <mach/irqs.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/pmu.h>
  23. #include <plat/tc.h>
  24. #include <plat/board.h>
  25. #include <plat/mcbsp.h>
  26. #include <mach/gpio.h>
  27. #include <plat/mmc.h>
  28. #include <plat/dma.h>
  29. #include <plat/omap_hwmod.h>
  30. #include <plat/omap_device.h>
  31. #include <plat/omap4-keypad.h>
  32. #include "mux.h"
  33. #include "control.h"
  34. #include "devices.h"
  35. #define L3_MODULES_MAX_LEN 12
  36. #define L3_MODULES 3
  37. static int __init omap3_l3_init(void)
  38. {
  39. int l;
  40. struct omap_hwmod *oh;
  41. struct omap_device *od;
  42. char oh_name[L3_MODULES_MAX_LEN];
  43. /*
  44. * To avoid code running on other OMAPs in
  45. * multi-omap builds
  46. */
  47. if (!(cpu_is_omap34xx()))
  48. return -ENODEV;
  49. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  50. oh = omap_hwmod_lookup(oh_name);
  51. if (!oh)
  52. pr_err("could not look up %s\n", oh_name);
  53. od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  54. NULL, 0, 0);
  55. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  56. return IS_ERR(od) ? PTR_ERR(od) : 0;
  57. }
  58. postcore_initcall(omap3_l3_init);
  59. static int __init omap4_l3_init(void)
  60. {
  61. int l, i;
  62. struct omap_hwmod *oh[3];
  63. struct omap_device *od;
  64. char oh_name[L3_MODULES_MAX_LEN];
  65. /*
  66. * To avoid code running on other OMAPs in
  67. * multi-omap builds
  68. */
  69. if (!(cpu_is_omap44xx()))
  70. return -ENODEV;
  71. for (i = 0; i < L3_MODULES; i++) {
  72. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  73. oh[i] = omap_hwmod_lookup(oh_name);
  74. if (!(oh[i]))
  75. pr_err("could not look up %s\n", oh_name);
  76. }
  77. od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  78. 0, NULL, 0, 0);
  79. WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
  80. return PTR_ERR(od);
  81. }
  82. postcore_initcall(omap4_l3_init);
  83. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  84. static struct resource omap2cam_resources[] = {
  85. {
  86. .start = OMAP24XX_CAMERA_BASE,
  87. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  88. .flags = IORESOURCE_MEM,
  89. },
  90. {
  91. .start = INT_24XX_CAM_IRQ,
  92. .flags = IORESOURCE_IRQ,
  93. }
  94. };
  95. static struct platform_device omap2cam_device = {
  96. .name = "omap24xxcam",
  97. .id = -1,
  98. .num_resources = ARRAY_SIZE(omap2cam_resources),
  99. .resource = omap2cam_resources,
  100. };
  101. #endif
  102. static struct resource omap3isp_resources[] = {
  103. {
  104. .start = OMAP3430_ISP_BASE,
  105. .end = OMAP3430_ISP_END,
  106. .flags = IORESOURCE_MEM,
  107. },
  108. {
  109. .start = OMAP3430_ISP_CCP2_BASE,
  110. .end = OMAP3430_ISP_CCP2_END,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. {
  114. .start = OMAP3430_ISP_CCDC_BASE,
  115. .end = OMAP3430_ISP_CCDC_END,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = OMAP3430_ISP_HIST_BASE,
  120. .end = OMAP3430_ISP_HIST_END,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. {
  124. .start = OMAP3430_ISP_H3A_BASE,
  125. .end = OMAP3430_ISP_H3A_END,
  126. .flags = IORESOURCE_MEM,
  127. },
  128. {
  129. .start = OMAP3430_ISP_PREV_BASE,
  130. .end = OMAP3430_ISP_PREV_END,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. {
  134. .start = OMAP3430_ISP_RESZ_BASE,
  135. .end = OMAP3430_ISP_RESZ_END,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. {
  139. .start = OMAP3430_ISP_SBL_BASE,
  140. .end = OMAP3430_ISP_SBL_END,
  141. .flags = IORESOURCE_MEM,
  142. },
  143. {
  144. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  145. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = OMAP3430_ISP_CSIPHY2_BASE,
  150. .end = OMAP3430_ISP_CSIPHY2_END,
  151. .flags = IORESOURCE_MEM,
  152. },
  153. {
  154. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  155. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. {
  159. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  160. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. {
  164. .start = OMAP3630_ISP_CSIPHY1_BASE,
  165. .end = OMAP3630_ISP_CSIPHY1_END,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. {
  169. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  170. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  171. .flags = IORESOURCE_MEM,
  172. },
  173. {
  174. .start = INT_34XX_CAM_IRQ,
  175. .flags = IORESOURCE_IRQ,
  176. }
  177. };
  178. static struct platform_device omap3isp_device = {
  179. .name = "omap3isp",
  180. .id = -1,
  181. .num_resources = ARRAY_SIZE(omap3isp_resources),
  182. .resource = omap3isp_resources,
  183. };
  184. int omap3_init_camera(struct isp_platform_data *pdata)
  185. {
  186. omap3isp_device.dev.platform_data = pdata;
  187. return platform_device_register(&omap3isp_device);
  188. }
  189. static inline void omap_init_camera(void)
  190. {
  191. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  192. if (cpu_is_omap24xx())
  193. platform_device_register(&omap2cam_device);
  194. #endif
  195. }
  196. struct omap_device_pm_latency omap_keyboard_latency[] = {
  197. {
  198. .deactivate_func = omap_device_idle_hwmods,
  199. .activate_func = omap_device_enable_hwmods,
  200. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  201. },
  202. };
  203. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  204. *sdp4430_keypad_data)
  205. {
  206. struct omap_device *od;
  207. struct omap_hwmod *oh;
  208. struct omap4_keypad_platform_data *keypad_data;
  209. unsigned int id = -1;
  210. char *oh_name = "kbd";
  211. char *name = "omap4-keypad";
  212. oh = omap_hwmod_lookup(oh_name);
  213. if (!oh) {
  214. pr_err("Could not look up %s\n", oh_name);
  215. return -ENODEV;
  216. }
  217. keypad_data = sdp4430_keypad_data;
  218. od = omap_device_build(name, id, oh, keypad_data,
  219. sizeof(struct omap4_keypad_platform_data),
  220. omap_keyboard_latency,
  221. ARRAY_SIZE(omap_keyboard_latency), 0);
  222. if (IS_ERR(od)) {
  223. WARN(1, "Cant build omap_device for %s:%s.\n",
  224. name, oh->name);
  225. return PTR_ERR(od);
  226. }
  227. return 0;
  228. }
  229. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  230. static struct omap_device_pm_latency mbox_latencies[] = {
  231. [0] = {
  232. .activate_func = omap_device_enable_hwmods,
  233. .deactivate_func = omap_device_idle_hwmods,
  234. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  235. },
  236. };
  237. static inline void omap_init_mbox(void)
  238. {
  239. struct omap_hwmod *oh;
  240. struct omap_device *od;
  241. oh = omap_hwmod_lookup("mailbox");
  242. if (!oh) {
  243. pr_err("%s: unable to find hwmod\n", __func__);
  244. return;
  245. }
  246. od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
  247. mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
  248. WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
  249. __func__, PTR_ERR(od));
  250. }
  251. #else
  252. static inline void omap_init_mbox(void) { }
  253. #endif /* CONFIG_OMAP_MBOX_FWK */
  254. static inline void omap_init_sti(void) {}
  255. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  256. static struct platform_device omap_pcm = {
  257. .name = "omap-pcm-audio",
  258. .id = -1,
  259. };
  260. /*
  261. * OMAP2420 has 2 McBSP ports
  262. * OMAP2430 has 5 McBSP ports
  263. * OMAP3 has 5 McBSP ports
  264. * OMAP4 has 4 McBSP ports
  265. */
  266. OMAP_MCBSP_PLATFORM_DEVICE(1);
  267. OMAP_MCBSP_PLATFORM_DEVICE(2);
  268. OMAP_MCBSP_PLATFORM_DEVICE(3);
  269. OMAP_MCBSP_PLATFORM_DEVICE(4);
  270. OMAP_MCBSP_PLATFORM_DEVICE(5);
  271. static void omap_init_audio(void)
  272. {
  273. platform_device_register(&omap_mcbsp1);
  274. platform_device_register(&omap_mcbsp2);
  275. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  276. platform_device_register(&omap_mcbsp3);
  277. platform_device_register(&omap_mcbsp4);
  278. }
  279. if (cpu_is_omap243x() || cpu_is_omap34xx())
  280. platform_device_register(&omap_mcbsp5);
  281. platform_device_register(&omap_pcm);
  282. }
  283. #else
  284. static inline void omap_init_audio(void) {}
  285. #endif
  286. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  287. #include <plat/mcspi.h>
  288. struct omap_device_pm_latency omap_mcspi_latency[] = {
  289. [0] = {
  290. .deactivate_func = omap_device_idle_hwmods,
  291. .activate_func = omap_device_enable_hwmods,
  292. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  293. },
  294. };
  295. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  296. {
  297. struct omap_device *od;
  298. char *name = "omap2_mcspi";
  299. struct omap2_mcspi_platform_config *pdata;
  300. static int spi_num;
  301. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  302. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  303. if (!pdata) {
  304. pr_err("Memory allocation for McSPI device failed\n");
  305. return -ENOMEM;
  306. }
  307. pdata->num_cs = mcspi_attrib->num_chipselect;
  308. switch (oh->class->rev) {
  309. case OMAP2_MCSPI_REV:
  310. case OMAP3_MCSPI_REV:
  311. pdata->regs_offset = 0;
  312. break;
  313. case OMAP4_MCSPI_REV:
  314. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  315. break;
  316. default:
  317. pr_err("Invalid McSPI Revision value\n");
  318. return -EINVAL;
  319. }
  320. spi_num++;
  321. od = omap_device_build(name, spi_num, oh, pdata,
  322. sizeof(*pdata), omap_mcspi_latency,
  323. ARRAY_SIZE(omap_mcspi_latency), 0);
  324. WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n",
  325. name, oh->name);
  326. kfree(pdata);
  327. return 0;
  328. }
  329. static void omap_init_mcspi(void)
  330. {
  331. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  332. }
  333. #else
  334. static inline void omap_init_mcspi(void) {}
  335. #endif
  336. static struct resource omap2_pmu_resource = {
  337. .start = 3,
  338. .end = 3,
  339. .flags = IORESOURCE_IRQ,
  340. };
  341. static struct resource omap3_pmu_resource = {
  342. .start = INT_34XX_BENCH_MPU_EMUL,
  343. .end = INT_34XX_BENCH_MPU_EMUL,
  344. .flags = IORESOURCE_IRQ,
  345. };
  346. static struct platform_device omap_pmu_device = {
  347. .name = "arm-pmu",
  348. .id = ARM_PMU_DEVICE_CPU,
  349. .num_resources = 1,
  350. };
  351. static void omap_init_pmu(void)
  352. {
  353. if (cpu_is_omap24xx())
  354. omap_pmu_device.resource = &omap2_pmu_resource;
  355. else if (cpu_is_omap34xx())
  356. omap_pmu_device.resource = &omap3_pmu_resource;
  357. else
  358. return;
  359. platform_device_register(&omap_pmu_device);
  360. }
  361. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  362. #ifdef CONFIG_ARCH_OMAP2
  363. static struct resource omap2_sham_resources[] = {
  364. {
  365. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  366. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  367. .flags = IORESOURCE_MEM,
  368. },
  369. {
  370. .start = INT_24XX_SHA1MD5,
  371. .flags = IORESOURCE_IRQ,
  372. }
  373. };
  374. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  375. #else
  376. #define omap2_sham_resources NULL
  377. #define omap2_sham_resources_sz 0
  378. #endif
  379. #ifdef CONFIG_ARCH_OMAP3
  380. static struct resource omap3_sham_resources[] = {
  381. {
  382. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  383. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  384. .flags = IORESOURCE_MEM,
  385. },
  386. {
  387. .start = INT_34XX_SHA1MD52_IRQ,
  388. .flags = IORESOURCE_IRQ,
  389. },
  390. {
  391. .start = OMAP34XX_DMA_SHA1MD5_RX,
  392. .flags = IORESOURCE_DMA,
  393. }
  394. };
  395. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  396. #else
  397. #define omap3_sham_resources NULL
  398. #define omap3_sham_resources_sz 0
  399. #endif
  400. static struct platform_device sham_device = {
  401. .name = "omap-sham",
  402. .id = -1,
  403. };
  404. static void omap_init_sham(void)
  405. {
  406. if (cpu_is_omap24xx()) {
  407. sham_device.resource = omap2_sham_resources;
  408. sham_device.num_resources = omap2_sham_resources_sz;
  409. } else if (cpu_is_omap34xx()) {
  410. sham_device.resource = omap3_sham_resources;
  411. sham_device.num_resources = omap3_sham_resources_sz;
  412. } else {
  413. pr_err("%s: platform not supported\n", __func__);
  414. return;
  415. }
  416. platform_device_register(&sham_device);
  417. }
  418. #else
  419. static inline void omap_init_sham(void) { }
  420. #endif
  421. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  422. #ifdef CONFIG_ARCH_OMAP2
  423. static struct resource omap2_aes_resources[] = {
  424. {
  425. .start = OMAP24XX_SEC_AES_BASE,
  426. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  427. .flags = IORESOURCE_MEM,
  428. },
  429. {
  430. .start = OMAP24XX_DMA_AES_TX,
  431. .flags = IORESOURCE_DMA,
  432. },
  433. {
  434. .start = OMAP24XX_DMA_AES_RX,
  435. .flags = IORESOURCE_DMA,
  436. }
  437. };
  438. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  439. #else
  440. #define omap2_aes_resources NULL
  441. #define omap2_aes_resources_sz 0
  442. #endif
  443. #ifdef CONFIG_ARCH_OMAP3
  444. static struct resource omap3_aes_resources[] = {
  445. {
  446. .start = OMAP34XX_SEC_AES_BASE,
  447. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  448. .flags = IORESOURCE_MEM,
  449. },
  450. {
  451. .start = OMAP34XX_DMA_AES2_TX,
  452. .flags = IORESOURCE_DMA,
  453. },
  454. {
  455. .start = OMAP34XX_DMA_AES2_RX,
  456. .flags = IORESOURCE_DMA,
  457. }
  458. };
  459. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  460. #else
  461. #define omap3_aes_resources NULL
  462. #define omap3_aes_resources_sz 0
  463. #endif
  464. static struct platform_device aes_device = {
  465. .name = "omap-aes",
  466. .id = -1,
  467. };
  468. static void omap_init_aes(void)
  469. {
  470. if (cpu_is_omap24xx()) {
  471. aes_device.resource = omap2_aes_resources;
  472. aes_device.num_resources = omap2_aes_resources_sz;
  473. } else if (cpu_is_omap34xx()) {
  474. aes_device.resource = omap3_aes_resources;
  475. aes_device.num_resources = omap3_aes_resources_sz;
  476. } else {
  477. pr_err("%s: platform not supported\n", __func__);
  478. return;
  479. }
  480. platform_device_register(&aes_device);
  481. }
  482. #else
  483. static inline void omap_init_aes(void) { }
  484. #endif
  485. /*-------------------------------------------------------------------------*/
  486. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  487. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  488. *mmc_controller)
  489. {
  490. if ((mmc_controller->slots[0].switch_pin > 0) && \
  491. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  492. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  493. OMAP_PIN_INPUT_PULLUP);
  494. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  495. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  496. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  497. OMAP_PIN_INPUT_PULLUP);
  498. omap_mux_init_signal("sdmmc_cmd", 0);
  499. omap_mux_init_signal("sdmmc_clki", 0);
  500. omap_mux_init_signal("sdmmc_clko", 0);
  501. omap_mux_init_signal("sdmmc_dat0", 0);
  502. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  503. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  504. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  505. omap_mux_init_signal("sdmmc_dat1", 0);
  506. omap_mux_init_signal("sdmmc_dat2", 0);
  507. omap_mux_init_signal("sdmmc_dat3", 0);
  508. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  509. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  510. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  511. }
  512. /*
  513. * Use internal loop-back in MMC/SDIO Module Input Clock
  514. * selection
  515. */
  516. if (mmc_controller->slots[0].internal_clock) {
  517. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  518. v |= (1 << 24);
  519. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  520. }
  521. }
  522. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  523. {
  524. char *name = "mmci-omap";
  525. if (!mmc_data[0]) {
  526. pr_err("%s fails: Incomplete platform data\n", __func__);
  527. return;
  528. }
  529. omap242x_mmc_mux(mmc_data[0]);
  530. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  531. INT_24XX_MMC_IRQ, mmc_data[0]);
  532. }
  533. #endif
  534. /*-------------------------------------------------------------------------*/
  535. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  536. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  537. #define OMAP_HDQ_BASE 0x480B2000
  538. #endif
  539. static struct resource omap_hdq_resources[] = {
  540. {
  541. .start = OMAP_HDQ_BASE,
  542. .end = OMAP_HDQ_BASE + 0x1C,
  543. .flags = IORESOURCE_MEM,
  544. },
  545. {
  546. .start = INT_24XX_HDQ_IRQ,
  547. .flags = IORESOURCE_IRQ,
  548. },
  549. };
  550. static struct platform_device omap_hdq_dev = {
  551. .name = "omap_hdq",
  552. .id = 0,
  553. .dev = {
  554. .platform_data = NULL,
  555. },
  556. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  557. .resource = omap_hdq_resources,
  558. };
  559. static inline void omap_hdq_init(void)
  560. {
  561. (void) platform_device_register(&omap_hdq_dev);
  562. }
  563. #else
  564. static inline void omap_hdq_init(void) {}
  565. #endif
  566. /*---------------------------------------------------------------------------*/
  567. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  568. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  569. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  570. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  571. };
  572. #else
  573. static struct resource omap_vout_resource[2] = {
  574. };
  575. #endif
  576. static struct platform_device omap_vout_device = {
  577. .name = "omap_vout",
  578. .num_resources = ARRAY_SIZE(omap_vout_resource),
  579. .resource = &omap_vout_resource[0],
  580. .id = -1,
  581. };
  582. static void omap_init_vout(void)
  583. {
  584. if (platform_device_register(&omap_vout_device) < 0)
  585. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  586. }
  587. #else
  588. static inline void omap_init_vout(void) {}
  589. #endif
  590. /*-------------------------------------------------------------------------*/
  591. static int __init omap2_init_devices(void)
  592. {
  593. /*
  594. * please keep these calls, and their implementations above,
  595. * in alphabetical order so they're easier to sort through.
  596. */
  597. omap_init_audio();
  598. omap_init_camera();
  599. omap_init_mbox();
  600. omap_init_mcspi();
  601. omap_init_pmu();
  602. omap_hdq_init();
  603. omap_init_sti();
  604. omap_init_sham();
  605. omap_init_aes();
  606. omap_init_vout();
  607. return 0;
  608. }
  609. arch_initcall(omap2_init_devices);
  610. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  611. static struct omap_device_pm_latency omap_wdt_latency[] = {
  612. [0] = {
  613. .deactivate_func = omap_device_idle_hwmods,
  614. .activate_func = omap_device_enable_hwmods,
  615. .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
  616. },
  617. };
  618. static int __init omap_init_wdt(void)
  619. {
  620. int id = -1;
  621. struct omap_device *od;
  622. struct omap_hwmod *oh;
  623. char *oh_name = "wd_timer2";
  624. char *dev_name = "omap_wdt";
  625. if (!cpu_class_is_omap2())
  626. return 0;
  627. oh = omap_hwmod_lookup(oh_name);
  628. if (!oh) {
  629. pr_err("Could not look up wd_timer%d hwmod\n", id);
  630. return -EINVAL;
  631. }
  632. od = omap_device_build(dev_name, id, oh, NULL, 0,
  633. omap_wdt_latency,
  634. ARRAY_SIZE(omap_wdt_latency), 0);
  635. WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n",
  636. dev_name, oh->name);
  637. return 0;
  638. }
  639. subsys_initcall(omap_init_wdt);
  640. #endif