board-3430sdp.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/mmc/host.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/map.h>
  31. #include <plat/mcspi.h>
  32. #include <plat/board.h>
  33. #include <plat/usb.h>
  34. #include <plat/common.h>
  35. #include <plat/dma.h>
  36. #include <plat/gpmc.h>
  37. #include <plat/display.h>
  38. #include <plat/panel-generic-dpi.h>
  39. #include <plat/gpmc-smc91x.h>
  40. #include "board-flash.h"
  41. #include "mux.h"
  42. #include "sdram-qimonda-hyb18m512160af-6.h"
  43. #include "hsmmc.h"
  44. #include "pm.h"
  45. #include "control.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
  53. static struct cpuidle_params omap3_cpuidle_params_table[] = {
  54. /* C1 */
  55. {1, 2, 2, 5},
  56. /* C2 */
  57. {1, 10, 10, 30},
  58. /* C3 */
  59. {1, 50, 50, 300},
  60. /* C4 */
  61. {1, 1500, 1800, 4000},
  62. /* C5 */
  63. {1, 2500, 7500, 12000},
  64. /* C6 */
  65. {1, 3000, 8500, 15000},
  66. /* C7 */
  67. {1, 10000, 30000, 300000},
  68. };
  69. static uint32_t board_keymap[] = {
  70. KEY(0, 0, KEY_LEFT),
  71. KEY(0, 1, KEY_RIGHT),
  72. KEY(0, 2, KEY_A),
  73. KEY(0, 3, KEY_B),
  74. KEY(0, 4, KEY_C),
  75. KEY(1, 0, KEY_DOWN),
  76. KEY(1, 1, KEY_UP),
  77. KEY(1, 2, KEY_E),
  78. KEY(1, 3, KEY_F),
  79. KEY(1, 4, KEY_G),
  80. KEY(2, 0, KEY_ENTER),
  81. KEY(2, 1, KEY_I),
  82. KEY(2, 2, KEY_J),
  83. KEY(2, 3, KEY_K),
  84. KEY(2, 4, KEY_3),
  85. KEY(3, 0, KEY_M),
  86. KEY(3, 1, KEY_N),
  87. KEY(3, 2, KEY_O),
  88. KEY(3, 3, KEY_P),
  89. KEY(3, 4, KEY_Q),
  90. KEY(4, 0, KEY_R),
  91. KEY(4, 1, KEY_4),
  92. KEY(4, 2, KEY_T),
  93. KEY(4, 3, KEY_U),
  94. KEY(4, 4, KEY_D),
  95. KEY(5, 0, KEY_V),
  96. KEY(5, 1, KEY_W),
  97. KEY(5, 2, KEY_L),
  98. KEY(5, 3, KEY_S),
  99. KEY(5, 4, KEY_H),
  100. 0
  101. };
  102. static struct matrix_keymap_data board_map_data = {
  103. .keymap = board_keymap,
  104. .keymap_size = ARRAY_SIZE(board_keymap),
  105. };
  106. static struct twl4030_keypad_data sdp3430_kp_data = {
  107. .keymap_data = &board_map_data,
  108. .rows = 5,
  109. .cols = 6,
  110. .rep = 1,
  111. };
  112. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  113. /**
  114. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  115. *
  116. * @return - void. If request gpio fails then Flag KERN_ERR.
  117. */
  118. static void ads7846_dev_init(void)
  119. {
  120. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  121. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  122. return;
  123. }
  124. gpio_direction_input(ts_gpio);
  125. gpio_set_debounce(ts_gpio, 310);
  126. }
  127. static int ads7846_get_pendown_state(void)
  128. {
  129. return !gpio_get_value(ts_gpio);
  130. }
  131. static struct ads7846_platform_data tsc2046_config __initdata = {
  132. .get_pendown_state = ads7846_get_pendown_state,
  133. .keep_vref_on = 1,
  134. .wakeup = true,
  135. };
  136. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  137. .turbo_mode = 0,
  138. .single_channel = 1, /* 0: slave, 1: master */
  139. };
  140. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  141. [0] = {
  142. /*
  143. * TSC2046 operates at a max freqency of 2MHz, so
  144. * operate slightly below at 1.5MHz
  145. */
  146. .modalias = "ads7846",
  147. .bus_num = 1,
  148. .chip_select = 0,
  149. .max_speed_hz = 1500000,
  150. .controller_data = &tsc2046_mcspi_config,
  151. .irq = 0,
  152. .platform_data = &tsc2046_config,
  153. },
  154. };
  155. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  156. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  157. static unsigned backlight_gpio;
  158. static unsigned enable_gpio;
  159. static int lcd_enabled;
  160. static int dvi_enabled;
  161. static void __init sdp3430_display_init(void)
  162. {
  163. int r;
  164. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  165. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  166. r = gpio_request(enable_gpio, "LCD reset");
  167. if (r) {
  168. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  169. goto err0;
  170. }
  171. r = gpio_request(backlight_gpio, "LCD Backlight");
  172. if (r) {
  173. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  174. goto err1;
  175. }
  176. gpio_direction_output(enable_gpio, 0);
  177. gpio_direction_output(backlight_gpio, 0);
  178. return;
  179. err1:
  180. gpio_free(enable_gpio);
  181. err0:
  182. return;
  183. }
  184. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  185. {
  186. if (dvi_enabled) {
  187. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  188. return -EINVAL;
  189. }
  190. gpio_direction_output(enable_gpio, 1);
  191. gpio_direction_output(backlight_gpio, 1);
  192. lcd_enabled = 1;
  193. return 0;
  194. }
  195. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  196. {
  197. lcd_enabled = 0;
  198. gpio_direction_output(enable_gpio, 0);
  199. gpio_direction_output(backlight_gpio, 0);
  200. }
  201. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  202. {
  203. if (lcd_enabled) {
  204. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  205. return -EINVAL;
  206. }
  207. dvi_enabled = 1;
  208. return 0;
  209. }
  210. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  211. {
  212. dvi_enabled = 0;
  213. }
  214. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  215. {
  216. return 0;
  217. }
  218. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  219. {
  220. }
  221. static struct omap_dss_device sdp3430_lcd_device = {
  222. .name = "lcd",
  223. .driver_name = "sharp_ls_panel",
  224. .type = OMAP_DISPLAY_TYPE_DPI,
  225. .phy.dpi.data_lines = 16,
  226. .platform_enable = sdp3430_panel_enable_lcd,
  227. .platform_disable = sdp3430_panel_disable_lcd,
  228. };
  229. static struct panel_generic_dpi_data dvi_panel = {
  230. .name = "generic",
  231. .platform_enable = sdp3430_panel_enable_dvi,
  232. .platform_disable = sdp3430_panel_disable_dvi,
  233. };
  234. static struct omap_dss_device sdp3430_dvi_device = {
  235. .name = "dvi",
  236. .type = OMAP_DISPLAY_TYPE_DPI,
  237. .driver_name = "generic_dpi_panel",
  238. .data = &dvi_panel,
  239. .phy.dpi.data_lines = 24,
  240. };
  241. static struct omap_dss_device sdp3430_tv_device = {
  242. .name = "tv",
  243. .driver_name = "venc",
  244. .type = OMAP_DISPLAY_TYPE_VENC,
  245. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  246. .platform_enable = sdp3430_panel_enable_tv,
  247. .platform_disable = sdp3430_panel_disable_tv,
  248. };
  249. static struct omap_dss_device *sdp3430_dss_devices[] = {
  250. &sdp3430_lcd_device,
  251. &sdp3430_dvi_device,
  252. &sdp3430_tv_device,
  253. };
  254. static struct omap_dss_board_info sdp3430_dss_data = {
  255. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  256. .devices = sdp3430_dss_devices,
  257. .default_device = &sdp3430_lcd_device,
  258. };
  259. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  260. };
  261. static void __init omap_3430sdp_init_early(void)
  262. {
  263. omap2_init_common_infrastructure();
  264. omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
  265. }
  266. static int sdp3430_batt_table[] = {
  267. /* 0 C*/
  268. 30800, 29500, 28300, 27100,
  269. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  270. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  271. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  272. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  273. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  274. 4040, 3910, 3790, 3670, 3550
  275. };
  276. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  277. .battery_tmp_tbl = sdp3430_batt_table,
  278. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  279. };
  280. static struct omap2_hsmmc_info mmc[] = {
  281. {
  282. .mmc = 1,
  283. /* 8 bits (default) requires S6.3 == ON,
  284. * so the SIM card isn't used; else 4 bits.
  285. */
  286. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  287. .gpio_wp = 4,
  288. },
  289. {
  290. .mmc = 2,
  291. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  292. .gpio_wp = 7,
  293. },
  294. {} /* Terminator */
  295. };
  296. static int sdp3430_twl_gpio_setup(struct device *dev,
  297. unsigned gpio, unsigned ngpio)
  298. {
  299. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  300. * gpio + 1 is "mmc1_cd" (input/IRQ)
  301. */
  302. mmc[0].gpio_cd = gpio + 0;
  303. mmc[1].gpio_cd = gpio + 1;
  304. omap2_hsmmc_init(mmc);
  305. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  306. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  307. gpio_direction_output(gpio + 7, 0);
  308. /* gpio + 15 is "sub_lcd_nRST" (output) */
  309. gpio_request(gpio + 15, "sub_lcd_nRST");
  310. gpio_direction_output(gpio + 15, 0);
  311. return 0;
  312. }
  313. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  314. .gpio_base = OMAP_MAX_GPIO_LINES,
  315. .irq_base = TWL4030_GPIO_IRQ_BASE,
  316. .irq_end = TWL4030_GPIO_IRQ_END,
  317. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  318. | BIT(16) | BIT(17),
  319. .setup = sdp3430_twl_gpio_setup,
  320. };
  321. static struct twl4030_usb_data sdp3430_usb_data = {
  322. .usb_mode = T2_USB_MODE_ULPI,
  323. };
  324. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  325. .irq_line = 1,
  326. };
  327. /* regulator consumer mappings */
  328. /* ads7846 on SPI */
  329. static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
  330. REGULATOR_SUPPLY("vcc", "spi1.0"),
  331. };
  332. static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
  333. REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
  334. };
  335. /* VPLL2 for digital video outputs */
  336. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  337. REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
  338. REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
  339. };
  340. static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
  341. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  342. };
  343. static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
  344. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  345. };
  346. static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
  347. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  348. };
  349. /*
  350. * Apply all the fixed voltages since most versions of U-Boot
  351. * don't bother with that initialization.
  352. */
  353. /* VAUX1 for mainboard (irda and sub-lcd) */
  354. static struct regulator_init_data sdp3430_vaux1 = {
  355. .constraints = {
  356. .min_uV = 2800000,
  357. .max_uV = 2800000,
  358. .apply_uV = true,
  359. .valid_modes_mask = REGULATOR_MODE_NORMAL
  360. | REGULATOR_MODE_STANDBY,
  361. .valid_ops_mask = REGULATOR_CHANGE_MODE
  362. | REGULATOR_CHANGE_STATUS,
  363. },
  364. };
  365. /* VAUX2 for camera module */
  366. static struct regulator_init_data sdp3430_vaux2 = {
  367. .constraints = {
  368. .min_uV = 2800000,
  369. .max_uV = 2800000,
  370. .apply_uV = true,
  371. .valid_modes_mask = REGULATOR_MODE_NORMAL
  372. | REGULATOR_MODE_STANDBY,
  373. .valid_ops_mask = REGULATOR_CHANGE_MODE
  374. | REGULATOR_CHANGE_STATUS,
  375. },
  376. };
  377. /* VAUX3 for LCD board */
  378. static struct regulator_init_data sdp3430_vaux3 = {
  379. .constraints = {
  380. .min_uV = 2800000,
  381. .max_uV = 2800000,
  382. .apply_uV = true,
  383. .valid_modes_mask = REGULATOR_MODE_NORMAL
  384. | REGULATOR_MODE_STANDBY,
  385. .valid_ops_mask = REGULATOR_CHANGE_MODE
  386. | REGULATOR_CHANGE_STATUS,
  387. },
  388. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
  389. .consumer_supplies = sdp3430_vaux3_supplies,
  390. };
  391. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  392. static struct regulator_init_data sdp3430_vaux4 = {
  393. .constraints = {
  394. .min_uV = 1800000,
  395. .max_uV = 1800000,
  396. .apply_uV = true,
  397. .valid_modes_mask = REGULATOR_MODE_NORMAL
  398. | REGULATOR_MODE_STANDBY,
  399. .valid_ops_mask = REGULATOR_CHANGE_MODE
  400. | REGULATOR_CHANGE_STATUS,
  401. },
  402. };
  403. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  404. static struct regulator_init_data sdp3430_vmmc1 = {
  405. .constraints = {
  406. .min_uV = 1850000,
  407. .max_uV = 3150000,
  408. .valid_modes_mask = REGULATOR_MODE_NORMAL
  409. | REGULATOR_MODE_STANDBY,
  410. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  411. | REGULATOR_CHANGE_MODE
  412. | REGULATOR_CHANGE_STATUS,
  413. },
  414. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
  415. .consumer_supplies = sdp3430_vmmc1_supplies,
  416. };
  417. /* VMMC2 for MMC2 card */
  418. static struct regulator_init_data sdp3430_vmmc2 = {
  419. .constraints = {
  420. .min_uV = 1850000,
  421. .max_uV = 1850000,
  422. .apply_uV = true,
  423. .valid_modes_mask = REGULATOR_MODE_NORMAL
  424. | REGULATOR_MODE_STANDBY,
  425. .valid_ops_mask = REGULATOR_CHANGE_MODE
  426. | REGULATOR_CHANGE_STATUS,
  427. },
  428. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
  429. .consumer_supplies = sdp3430_vmmc2_supplies,
  430. };
  431. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  432. static struct regulator_init_data sdp3430_vsim = {
  433. .constraints = {
  434. .min_uV = 1800000,
  435. .max_uV = 3000000,
  436. .valid_modes_mask = REGULATOR_MODE_NORMAL
  437. | REGULATOR_MODE_STANDBY,
  438. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  439. | REGULATOR_CHANGE_MODE
  440. | REGULATOR_CHANGE_STATUS,
  441. },
  442. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
  443. .consumer_supplies = sdp3430_vsim_supplies,
  444. };
  445. /* VDAC for DSS driving S-Video */
  446. static struct regulator_init_data sdp3430_vdac = {
  447. .constraints = {
  448. .min_uV = 1800000,
  449. .max_uV = 1800000,
  450. .apply_uV = true,
  451. .valid_modes_mask = REGULATOR_MODE_NORMAL
  452. | REGULATOR_MODE_STANDBY,
  453. .valid_ops_mask = REGULATOR_CHANGE_MODE
  454. | REGULATOR_CHANGE_STATUS,
  455. },
  456. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
  457. .consumer_supplies = sdp3430_vdda_dac_supplies,
  458. };
  459. static struct regulator_init_data sdp3430_vpll2 = {
  460. .constraints = {
  461. .name = "VDVI",
  462. .min_uV = 1800000,
  463. .max_uV = 1800000,
  464. .apply_uV = true,
  465. .valid_modes_mask = REGULATOR_MODE_NORMAL
  466. | REGULATOR_MODE_STANDBY,
  467. .valid_ops_mask = REGULATOR_CHANGE_MODE
  468. | REGULATOR_CHANGE_STATUS,
  469. },
  470. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  471. .consumer_supplies = sdp3430_vpll2_supplies,
  472. };
  473. static struct twl4030_codec_audio_data sdp3430_audio;
  474. static struct twl4030_codec_data sdp3430_codec = {
  475. .audio_mclk = 26000000,
  476. .audio = &sdp3430_audio,
  477. };
  478. static struct twl4030_platform_data sdp3430_twldata = {
  479. .irq_base = TWL4030_IRQ_BASE,
  480. .irq_end = TWL4030_IRQ_END,
  481. /* platform_data for children goes here */
  482. .bci = &sdp3430_bci_data,
  483. .gpio = &sdp3430_gpio_data,
  484. .madc = &sdp3430_madc_data,
  485. .keypad = &sdp3430_kp_data,
  486. .usb = &sdp3430_usb_data,
  487. .codec = &sdp3430_codec,
  488. .vaux1 = &sdp3430_vaux1,
  489. .vaux2 = &sdp3430_vaux2,
  490. .vaux3 = &sdp3430_vaux3,
  491. .vaux4 = &sdp3430_vaux4,
  492. .vmmc1 = &sdp3430_vmmc1,
  493. .vmmc2 = &sdp3430_vmmc2,
  494. .vsim = &sdp3430_vsim,
  495. .vdac = &sdp3430_vdac,
  496. .vpll2 = &sdp3430_vpll2,
  497. };
  498. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  499. {
  500. I2C_BOARD_INFO("twl4030", 0x48),
  501. .flags = I2C_CLIENT_WAKE,
  502. .irq = INT_34XX_SYS_NIRQ,
  503. .platform_data = &sdp3430_twldata,
  504. },
  505. };
  506. static int __init omap3430_i2c_init(void)
  507. {
  508. /* i2c1 for PMIC only */
  509. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  510. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  511. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  512. omap_register_i2c_bus(2, 400, NULL, 0);
  513. /* i2c3 on display connector (for DVI, tfp410) */
  514. omap_register_i2c_bus(3, 400, NULL, 0);
  515. return 0;
  516. }
  517. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  518. static struct omap_smc91x_platform_data board_smc91x_data = {
  519. .cs = 3,
  520. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  521. IORESOURCE_IRQ_LOWLEVEL,
  522. };
  523. static void __init board_smc91x_init(void)
  524. {
  525. if (omap_rev() > OMAP3430_REV_ES1_0)
  526. board_smc91x_data.gpio_irq = 6;
  527. else
  528. board_smc91x_data.gpio_irq = 29;
  529. gpmc_smc91x_init(&board_smc91x_data);
  530. }
  531. #else
  532. static inline void board_smc91x_init(void)
  533. {
  534. }
  535. #endif
  536. static void enable_board_wakeup_source(void)
  537. {
  538. /* T2 interrupt line (keypad) */
  539. omap_mux_init_signal("sys_nirq",
  540. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  541. }
  542. static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
  543. .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
  544. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  545. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  546. .phy_reset = true,
  547. .reset_gpio_port[0] = 57,
  548. .reset_gpio_port[1] = 61,
  549. .reset_gpio_port[2] = -EINVAL
  550. };
  551. #ifdef CONFIG_OMAP_MUX
  552. static struct omap_board_mux board_mux[] __initdata = {
  553. { .reg_offset = OMAP_MUX_TERMINATOR },
  554. };
  555. static struct omap_device_pad serial1_pads[] __initdata = {
  556. /*
  557. * Note that off output enable is an active low
  558. * signal. So setting this means pin is a
  559. * input enabled in off mode
  560. */
  561. OMAP_MUX_STATIC("uart1_cts.uart1_cts",
  562. OMAP_PIN_INPUT |
  563. OMAP_PIN_OFF_INPUT_PULLDOWN |
  564. OMAP_OFFOUT_EN |
  565. OMAP_MUX_MODE0),
  566. OMAP_MUX_STATIC("uart1_rts.uart1_rts",
  567. OMAP_PIN_OUTPUT |
  568. OMAP_OFF_EN |
  569. OMAP_MUX_MODE0),
  570. OMAP_MUX_STATIC("uart1_rx.uart1_rx",
  571. OMAP_PIN_INPUT |
  572. OMAP_PIN_OFF_INPUT_PULLDOWN |
  573. OMAP_OFFOUT_EN |
  574. OMAP_MUX_MODE0),
  575. OMAP_MUX_STATIC("uart1_tx.uart1_tx",
  576. OMAP_PIN_OUTPUT |
  577. OMAP_OFF_EN |
  578. OMAP_MUX_MODE0),
  579. };
  580. static struct omap_device_pad serial2_pads[] __initdata = {
  581. OMAP_MUX_STATIC("uart2_cts.uart2_cts",
  582. OMAP_PIN_INPUT_PULLUP |
  583. OMAP_PIN_OFF_INPUT_PULLDOWN |
  584. OMAP_OFFOUT_EN |
  585. OMAP_MUX_MODE0),
  586. OMAP_MUX_STATIC("uart2_rts.uart2_rts",
  587. OMAP_PIN_OUTPUT |
  588. OMAP_OFF_EN |
  589. OMAP_MUX_MODE0),
  590. OMAP_MUX_STATIC("uart2_rx.uart2_rx",
  591. OMAP_PIN_INPUT |
  592. OMAP_PIN_OFF_INPUT_PULLDOWN |
  593. OMAP_OFFOUT_EN |
  594. OMAP_MUX_MODE0),
  595. OMAP_MUX_STATIC("uart2_tx.uart2_tx",
  596. OMAP_PIN_OUTPUT |
  597. OMAP_OFF_EN |
  598. OMAP_MUX_MODE0),
  599. };
  600. static struct omap_device_pad serial3_pads[] __initdata = {
  601. OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
  602. OMAP_PIN_INPUT_PULLDOWN |
  603. OMAP_PIN_OFF_INPUT_PULLDOWN |
  604. OMAP_OFFOUT_EN |
  605. OMAP_MUX_MODE0),
  606. OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
  607. OMAP_PIN_OUTPUT |
  608. OMAP_OFF_EN |
  609. OMAP_MUX_MODE0),
  610. OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
  611. OMAP_PIN_INPUT |
  612. OMAP_PIN_OFF_INPUT_PULLDOWN |
  613. OMAP_OFFOUT_EN |
  614. OMAP_MUX_MODE0),
  615. OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
  616. OMAP_PIN_OUTPUT |
  617. OMAP_OFF_EN |
  618. OMAP_MUX_MODE0),
  619. };
  620. static struct omap_board_data serial1_data = {
  621. .id = 0,
  622. .pads = serial1_pads,
  623. .pads_cnt = ARRAY_SIZE(serial1_pads),
  624. };
  625. static struct omap_board_data serial2_data = {
  626. .id = 1,
  627. .pads = serial2_pads,
  628. .pads_cnt = ARRAY_SIZE(serial2_pads),
  629. };
  630. static struct omap_board_data serial3_data = {
  631. .id = 2,
  632. .pads = serial3_pads,
  633. .pads_cnt = ARRAY_SIZE(serial3_pads),
  634. };
  635. static inline void board_serial_init(void)
  636. {
  637. omap_serial_init_port(&serial1_data);
  638. omap_serial_init_port(&serial2_data);
  639. omap_serial_init_port(&serial3_data);
  640. }
  641. #else
  642. #define board_mux NULL
  643. static inline void board_serial_init(void)
  644. {
  645. omap_serial_init();
  646. }
  647. #endif
  648. /*
  649. * SDP3430 V2 Board CS organization
  650. * Different from SDP3430 V1. Now 4 switches used to specify CS
  651. *
  652. * See also the Switch S8 settings in the comments.
  653. */
  654. static char chip_sel_3430[][GPMC_CS_NUM] = {
  655. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  656. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  657. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  658. };
  659. static struct mtd_partition sdp_nor_partitions[] = {
  660. /* bootloader (U-Boot, etc) in first sector */
  661. {
  662. .name = "Bootloader-NOR",
  663. .offset = 0,
  664. .size = SZ_256K,
  665. .mask_flags = MTD_WRITEABLE, /* force read-only */
  666. },
  667. /* bootloader params in the next sector */
  668. {
  669. .name = "Params-NOR",
  670. .offset = MTDPART_OFS_APPEND,
  671. .size = SZ_256K,
  672. .mask_flags = 0,
  673. },
  674. /* kernel */
  675. {
  676. .name = "Kernel-NOR",
  677. .offset = MTDPART_OFS_APPEND,
  678. .size = SZ_2M,
  679. .mask_flags = 0
  680. },
  681. /* file system */
  682. {
  683. .name = "Filesystem-NOR",
  684. .offset = MTDPART_OFS_APPEND,
  685. .size = MTDPART_SIZ_FULL,
  686. .mask_flags = 0
  687. }
  688. };
  689. static struct mtd_partition sdp_onenand_partitions[] = {
  690. {
  691. .name = "X-Loader-OneNAND",
  692. .offset = 0,
  693. .size = 4 * (64 * 2048),
  694. .mask_flags = MTD_WRITEABLE /* force read-only */
  695. },
  696. {
  697. .name = "U-Boot-OneNAND",
  698. .offset = MTDPART_OFS_APPEND,
  699. .size = 2 * (64 * 2048),
  700. .mask_flags = MTD_WRITEABLE /* force read-only */
  701. },
  702. {
  703. .name = "U-Boot Environment-OneNAND",
  704. .offset = MTDPART_OFS_APPEND,
  705. .size = 1 * (64 * 2048),
  706. },
  707. {
  708. .name = "Kernel-OneNAND",
  709. .offset = MTDPART_OFS_APPEND,
  710. .size = 16 * (64 * 2048),
  711. },
  712. {
  713. .name = "File System-OneNAND",
  714. .offset = MTDPART_OFS_APPEND,
  715. .size = MTDPART_SIZ_FULL,
  716. },
  717. };
  718. static struct mtd_partition sdp_nand_partitions[] = {
  719. /* All the partition sizes are listed in terms of NAND block size */
  720. {
  721. .name = "X-Loader-NAND",
  722. .offset = 0,
  723. .size = 4 * (64 * 2048),
  724. .mask_flags = MTD_WRITEABLE, /* force read-only */
  725. },
  726. {
  727. .name = "U-Boot-NAND",
  728. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  729. .size = 10 * (64 * 2048),
  730. .mask_flags = MTD_WRITEABLE, /* force read-only */
  731. },
  732. {
  733. .name = "Boot Env-NAND",
  734. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  735. .size = 6 * (64 * 2048),
  736. },
  737. {
  738. .name = "Kernel-NAND",
  739. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  740. .size = 40 * (64 * 2048),
  741. },
  742. {
  743. .name = "File System - NAND",
  744. .size = MTDPART_SIZ_FULL,
  745. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  746. },
  747. };
  748. static struct flash_partitions sdp_flash_partitions[] = {
  749. {
  750. .parts = sdp_nor_partitions,
  751. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  752. },
  753. {
  754. .parts = sdp_onenand_partitions,
  755. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  756. },
  757. {
  758. .parts = sdp_nand_partitions,
  759. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  760. },
  761. };
  762. static struct omap_musb_board_data musb_board_data = {
  763. .interface_type = MUSB_INTERFACE_ULPI,
  764. .mode = MUSB_OTG,
  765. .power = 100,
  766. };
  767. static void __init omap_3430sdp_init(void)
  768. {
  769. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  770. omap_board_config = sdp3430_config;
  771. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  772. omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
  773. omap3430_i2c_init();
  774. omap_display_init(&sdp3430_dss_data);
  775. if (omap_rev() > OMAP3430_REV_ES1_0)
  776. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  777. else
  778. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  779. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  780. spi_register_board_info(sdp3430_spi_board_info,
  781. ARRAY_SIZE(sdp3430_spi_board_info));
  782. ads7846_dev_init();
  783. board_serial_init();
  784. usb_musb_init(&musb_board_data);
  785. board_smc91x_init();
  786. board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
  787. sdp3430_display_init();
  788. enable_board_wakeup_source();
  789. usbhs_init(&usbhs_bdata);
  790. }
  791. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  792. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  793. .boot_params = 0x80000100,
  794. .reserve = omap_reserve,
  795. .map_io = omap3_map_io,
  796. .init_early = omap_3430sdp_init_early,
  797. .init_irq = omap_init_irq,
  798. .init_machine = omap_3430sdp_init,
  799. .timer = &omap_timer,
  800. MACHINE_END