mach-imx27_visstrim_m10.c 6.6 KB

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  1. /*
  2. * mach-imx27_visstrim_m10.c
  3. *
  4. * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
  5. *
  6. * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301, USA.
  22. */
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/platform_device.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/i2c.h>
  27. #include <linux/i2c/pca953x.h>
  28. #include <linux/gpio_keys.h>
  29. #include <linux/input.h>
  30. #include <linux/gpio.h>
  31. #include <linux/delay.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/time.h>
  35. #include <mach/common.h>
  36. #include <mach/iomux.h>
  37. #include "devices-imx27.h"
  38. #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
  39. #define SDHC1_IRQ IRQ_GPIOB(25)
  40. static const int visstrim_m10_pins[] __initconst = {
  41. /* UART1 (console) */
  42. PE12_PF_UART1_TXD,
  43. PE13_PF_UART1_RXD,
  44. PE14_PF_UART1_CTS,
  45. PE15_PF_UART1_RTS,
  46. /* FEC */
  47. PD0_AIN_FEC_TXD0,
  48. PD1_AIN_FEC_TXD1,
  49. PD2_AIN_FEC_TXD2,
  50. PD3_AIN_FEC_TXD3,
  51. PD4_AOUT_FEC_RX_ER,
  52. PD5_AOUT_FEC_RXD1,
  53. PD6_AOUT_FEC_RXD2,
  54. PD7_AOUT_FEC_RXD3,
  55. PD8_AF_FEC_MDIO,
  56. PD9_AIN_FEC_MDC,
  57. PD10_AOUT_FEC_CRS,
  58. PD11_AOUT_FEC_TX_CLK,
  59. PD12_AOUT_FEC_RXD0,
  60. PD13_AOUT_FEC_RX_DV,
  61. PD14_AOUT_FEC_RX_CLK,
  62. PD15_AOUT_FEC_COL,
  63. PD16_AIN_FEC_TX_ER,
  64. PF23_AIN_FEC_TX_EN,
  65. /* SSI1 */
  66. PC20_PF_SSI1_FS,
  67. PC21_PF_SSI1_RXD,
  68. PC22_PF_SSI1_TXD,
  69. PC23_PF_SSI1_CLK,
  70. /* SDHC1 */
  71. PE18_PF_SD1_D0,
  72. PE19_PF_SD1_D1,
  73. PE20_PF_SD1_D2,
  74. PE21_PF_SD1_D3,
  75. PE22_PF_SD1_CMD,
  76. PE23_PF_SD1_CLK,
  77. /* Both I2Cs */
  78. PD17_PF_I2C_DATA,
  79. PD18_PF_I2C_CLK,
  80. PC5_PF_I2C2_SDA,
  81. PC6_PF_I2C2_SCL,
  82. /* USB OTG */
  83. OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  84. PC9_PF_USBOTG_DATA0,
  85. PC11_PF_USBOTG_DATA1,
  86. PC10_PF_USBOTG_DATA2,
  87. PC13_PF_USBOTG_DATA3,
  88. PC12_PF_USBOTG_DATA4,
  89. PC7_PF_USBOTG_DATA5,
  90. PC8_PF_USBOTG_DATA6,
  91. PE25_PF_USBOTG_DATA7,
  92. PE24_PF_USBOTG_CLK,
  93. PE2_PF_USBOTG_DIR,
  94. PE0_PF_USBOTG_NXT,
  95. PE1_PF_USBOTG_STP,
  96. PB23_PF_USB_PWR,
  97. PB24_PF_USB_OC,
  98. };
  99. /* GPIOs used as events for applications */
  100. static struct gpio_keys_button visstrim_gpio_keys[] = {
  101. {
  102. .type = EV_KEY,
  103. .code = KEY_RESTART,
  104. .gpio = (GPIO_PORTC + 15),
  105. .desc = "Default config",
  106. .active_low = 0,
  107. .wakeup = 1,
  108. },
  109. {
  110. .type = EV_KEY,
  111. .code = KEY_RECORD,
  112. .gpio = (GPIO_PORTF + 14),
  113. .desc = "Record",
  114. .active_low = 0,
  115. .wakeup = 1,
  116. },
  117. {
  118. .type = EV_KEY,
  119. .code = KEY_STOP,
  120. .gpio = (GPIO_PORTF + 13),
  121. .desc = "Stop",
  122. .active_low = 0,
  123. .wakeup = 1,
  124. }
  125. };
  126. static struct gpio_keys_platform_data visstrim_gpio_keys_platform_data = {
  127. .buttons = visstrim_gpio_keys,
  128. .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
  129. };
  130. static struct platform_device visstrim_gpio_keys_device = {
  131. .name = "gpio-keys",
  132. .id = -1,
  133. .dev = {
  134. .platform_data = &visstrim_gpio_keys_platform_data,
  135. },
  136. };
  137. /* Visstrim_SM10 has a microSD slot connected to sdhc1 */
  138. static int visstrim_m10_sdhc1_init(struct device *dev,
  139. irq_handler_t detect_irq, void *data)
  140. {
  141. int ret;
  142. ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
  143. "mmc-detect", data);
  144. return ret;
  145. }
  146. static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
  147. {
  148. free_irq(SDHC1_IRQ, data);
  149. }
  150. static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
  151. .init = visstrim_m10_sdhc1_init,
  152. .exit = visstrim_m10_sdhc1_exit,
  153. };
  154. /* Visstrim_SM10 NOR flash */
  155. static struct physmap_flash_data visstrim_m10_flash_data = {
  156. .width = 2,
  157. };
  158. static struct resource visstrim_m10_flash_resource = {
  159. .start = 0xc0000000,
  160. .end = 0xc0000000 + SZ_64M - 1,
  161. .flags = IORESOURCE_MEM,
  162. };
  163. static struct platform_device visstrim_m10_nor_mtd_device = {
  164. .name = "physmap-flash",
  165. .id = 0,
  166. .dev = {
  167. .platform_data = &visstrim_m10_flash_data,
  168. },
  169. .num_resources = 1,
  170. .resource = &visstrim_m10_flash_resource,
  171. };
  172. static struct platform_device *platform_devices[] __initdata = {
  173. &visstrim_gpio_keys_device,
  174. &visstrim_m10_nor_mtd_device,
  175. };
  176. /* Visstrim_M10 uses UART0 as console */
  177. static const struct imxuart_platform_data uart_pdata __initconst = {
  178. .flags = IMXUART_HAVE_RTSCTS,
  179. };
  180. /* I2C */
  181. static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
  182. .bitrate = 100000,
  183. };
  184. static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
  185. .gpio_base = 240, /* After MX27 internal GPIOs */
  186. .invert = 0,
  187. };
  188. static struct i2c_board_info visstrim_m10_i2c_devices[] = {
  189. {
  190. I2C_BOARD_INFO("pca9555", 0x20),
  191. .platform_data = &visstrim_m10_pca9555_pdata,
  192. },
  193. {
  194. I2C_BOARD_INFO("tlv320aic32x4", 0x18),
  195. }
  196. };
  197. /* USB OTG */
  198. static int otg_phy_init(struct platform_device *pdev)
  199. {
  200. gpio_set_value(OTG_PHY_CS_GPIO, 0);
  201. mdelay(10);
  202. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  203. }
  204. static const struct mxc_usbh_platform_data
  205. visstrim_m10_usbotg_pdata __initconst = {
  206. .init = otg_phy_init,
  207. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  208. };
  209. /* SSI */
  210. static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
  211. .flags = IMX_SSI_DMA | IMX_SSI_SYN,
  212. };
  213. static void __init visstrim_m10_board_init(void)
  214. {
  215. int ret;
  216. ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
  217. ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
  218. if (ret)
  219. pr_err("Failed to setup pins (%d)\n", ret);
  220. imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
  221. imx27_add_imx_uart0(&uart_pdata);
  222. i2c_register_board_info(0, visstrim_m10_i2c_devices,
  223. ARRAY_SIZE(visstrim_m10_i2c_devices));
  224. imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
  225. imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
  226. imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
  227. imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
  228. imx27_add_fec(NULL);
  229. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  230. }
  231. static void __init visstrim_m10_timer_init(void)
  232. {
  233. mx27_clocks_init((unsigned long)25000000);
  234. }
  235. static struct sys_timer visstrim_m10_timer = {
  236. .init = visstrim_m10_timer_init,
  237. };
  238. MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
  239. .boot_params = MX27_PHYS_OFFSET + 0x100,
  240. .map_io = mx27_map_io,
  241. .init_early = imx27_init_early,
  242. .init_irq = mx27_init_irq,
  243. .timer = &visstrim_m10_timer,
  244. .init_machine = visstrim_m10_board_init,
  245. MACHINE_END