mach-cpuimx27.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319
  1. /*
  2. * Copyright (C) 2009 Eric Benard - eric@eukrea.com
  3. *
  4. * Based on pcm038.c which is :
  5. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6. * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  20. * MA 02110-1301, USA.
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/io.h>
  24. #include <linux/mtd/plat-ram.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/serial_8250.h>
  28. #include <linux/usb/otg.h>
  29. #include <linux/usb/ulpi.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/mach/map.h>
  34. #include <mach/eukrea-baseboards.h>
  35. #include <mach/common.h>
  36. #include <mach/hardware.h>
  37. #include <mach/iomux-mx27.h>
  38. #include <mach/mxc_nand.h>
  39. #include <mach/ulpi.h>
  40. #include "devices-imx27.h"
  41. static const int eukrea_cpuimx27_pins[] __initconst = {
  42. /* UART1 */
  43. PE12_PF_UART1_TXD,
  44. PE13_PF_UART1_RXD,
  45. PE14_PF_UART1_CTS,
  46. PE15_PF_UART1_RTS,
  47. /* UART4 */
  48. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  49. PB26_AF_UART4_RTS,
  50. PB28_AF_UART4_TXD,
  51. PB29_AF_UART4_CTS,
  52. PB31_AF_UART4_RXD,
  53. #endif
  54. /* FEC */
  55. PD0_AIN_FEC_TXD0,
  56. PD1_AIN_FEC_TXD1,
  57. PD2_AIN_FEC_TXD2,
  58. PD3_AIN_FEC_TXD3,
  59. PD4_AOUT_FEC_RX_ER,
  60. PD5_AOUT_FEC_RXD1,
  61. PD6_AOUT_FEC_RXD2,
  62. PD7_AOUT_FEC_RXD3,
  63. PD8_AF_FEC_MDIO,
  64. PD9_AIN_FEC_MDC,
  65. PD10_AOUT_FEC_CRS,
  66. PD11_AOUT_FEC_TX_CLK,
  67. PD12_AOUT_FEC_RXD0,
  68. PD13_AOUT_FEC_RX_DV,
  69. PD14_AOUT_FEC_RX_CLK,
  70. PD15_AOUT_FEC_COL,
  71. PD16_AIN_FEC_TX_ER,
  72. PF23_AIN_FEC_TX_EN,
  73. /* I2C1 */
  74. PD17_PF_I2C_DATA,
  75. PD18_PF_I2C_CLK,
  76. /* SDHC2 */
  77. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  78. PB4_PF_SD2_D0,
  79. PB5_PF_SD2_D1,
  80. PB6_PF_SD2_D2,
  81. PB7_PF_SD2_D3,
  82. PB8_PF_SD2_CMD,
  83. PB9_PF_SD2_CLK,
  84. #endif
  85. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  86. /* Quad UART's IRQ */
  87. GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
  88. GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
  89. GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
  90. GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
  91. #endif
  92. /* OTG */
  93. PC7_PF_USBOTG_DATA5,
  94. PC8_PF_USBOTG_DATA6,
  95. PC9_PF_USBOTG_DATA0,
  96. PC10_PF_USBOTG_DATA2,
  97. PC11_PF_USBOTG_DATA1,
  98. PC12_PF_USBOTG_DATA4,
  99. PC13_PF_USBOTG_DATA3,
  100. PE0_PF_USBOTG_NXT,
  101. PE1_PF_USBOTG_STP,
  102. PE2_PF_USBOTG_DIR,
  103. PE24_PF_USBOTG_CLK,
  104. PE25_PF_USBOTG_DATA7,
  105. /* USBH2 */
  106. PA0_PF_USBH2_CLK,
  107. PA1_PF_USBH2_DIR,
  108. PA2_PF_USBH2_DATA7,
  109. PA3_PF_USBH2_NXT,
  110. PA4_PF_USBH2_STP,
  111. PD19_AF_USBH2_DATA4,
  112. PD20_AF_USBH2_DATA3,
  113. PD21_AF_USBH2_DATA6,
  114. PD22_AF_USBH2_DATA0,
  115. PD23_AF_USBH2_DATA2,
  116. PD24_AF_USBH2_DATA1,
  117. PD26_AF_USBH2_DATA5,
  118. };
  119. static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
  120. .width = 2,
  121. };
  122. static struct resource eukrea_cpuimx27_flash_resource = {
  123. .start = 0xc0000000,
  124. .end = 0xc3ffffff,
  125. .flags = IORESOURCE_MEM,
  126. };
  127. static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
  128. .name = "physmap-flash",
  129. .id = 0,
  130. .dev = {
  131. .platform_data = &eukrea_cpuimx27_flash_data,
  132. },
  133. .num_resources = 1,
  134. .resource = &eukrea_cpuimx27_flash_resource,
  135. };
  136. static const struct imxuart_platform_data uart_pdata __initconst = {
  137. .flags = IMXUART_HAVE_RTSCTS,
  138. };
  139. static const struct mxc_nand_platform_data
  140. cpuimx27_nand_board_info __initconst = {
  141. .width = 1,
  142. .hw_ecc = 1,
  143. };
  144. static struct platform_device *platform_devices[] __initdata = {
  145. &eukrea_cpuimx27_nor_mtd_device,
  146. };
  147. static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
  148. .bitrate = 100000,
  149. };
  150. static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
  151. {
  152. I2C_BOARD_INFO("pcf8563", 0x51),
  153. },
  154. };
  155. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  156. static struct plat_serial8250_port serial_platform_data[] = {
  157. {
  158. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
  159. .irq = IRQ_GPIOB(23),
  160. .uartclk = 14745600,
  161. .regshift = 1,
  162. .iotype = UPIO_MEM,
  163. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  164. }, {
  165. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
  166. .irq = IRQ_GPIOB(22),
  167. .uartclk = 14745600,
  168. .regshift = 1,
  169. .iotype = UPIO_MEM,
  170. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  171. }, {
  172. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
  173. .irq = IRQ_GPIOB(27),
  174. .uartclk = 14745600,
  175. .regshift = 1,
  176. .iotype = UPIO_MEM,
  177. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  178. }, {
  179. .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
  180. .irq = IRQ_GPIOB(30),
  181. .uartclk = 14745600,
  182. .regshift = 1,
  183. .iotype = UPIO_MEM,
  184. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
  185. }, {
  186. }
  187. };
  188. static struct platform_device serial_device = {
  189. .name = "serial8250",
  190. .id = 0,
  191. .dev = {
  192. .platform_data = serial_platform_data,
  193. },
  194. };
  195. #endif
  196. static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
  197. {
  198. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
  199. }
  200. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  201. .init = eukrea_cpuimx27_otg_init,
  202. .portsc = MXC_EHCI_MODE_ULPI,
  203. };
  204. static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
  205. {
  206. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
  207. }
  208. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  209. .init = eukrea_cpuimx27_usbh2_init,
  210. .portsc = MXC_EHCI_MODE_ULPI,
  211. };
  212. static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
  213. .operating_mode = FSL_USB2_DR_DEVICE,
  214. .phy_mode = FSL_USB2_PHY_ULPI,
  215. };
  216. static int otg_mode_host;
  217. static int __init eukrea_cpuimx27_otg_mode(char *options)
  218. {
  219. if (!strcmp(options, "host"))
  220. otg_mode_host = 1;
  221. else if (!strcmp(options, "device"))
  222. otg_mode_host = 0;
  223. else
  224. pr_info("otg_mode neither \"host\" nor \"device\". "
  225. "Defaulting to device\n");
  226. return 0;
  227. }
  228. __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
  229. static void __init eukrea_cpuimx27_init(void)
  230. {
  231. mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
  232. ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
  233. imx27_add_imx_uart0(&uart_pdata);
  234. imx27_add_mxc_nand(&cpuimx27_nand_board_info);
  235. i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
  236. ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
  237. imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
  238. imx27_add_fec(NULL);
  239. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  240. imx27_add_imx2_wdt(NULL);
  241. imx27_add_mxc_w1(NULL);
  242. #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
  243. /* SDHC2 can be used for Wifi */
  244. imx27_add_mxc_mmc(1, NULL);
  245. #endif
  246. #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
  247. /* in which case UART4 is also used for Bluetooth */
  248. imx27_add_imx_uart3(&uart_pdata);
  249. #endif
  250. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  251. platform_device_register(&serial_device);
  252. #endif
  253. if (otg_mode_host) {
  254. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  255. ULPI_OTG_DRVVBUS_EXT);
  256. if (otg_pdata.otg)
  257. imx27_add_mxc_ehci_otg(&otg_pdata);
  258. } else {
  259. imx27_add_fsl_usb2_udc(&otg_device_pdata);
  260. }
  261. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  262. ULPI_OTG_DRVVBUS_EXT);
  263. if (usbh2_pdata.otg)
  264. imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
  265. #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
  266. eukrea_mbimx27_baseboard_init();
  267. #endif
  268. }
  269. static void __init eukrea_cpuimx27_timer_init(void)
  270. {
  271. mx27_clocks_init(26000000);
  272. }
  273. static struct sys_timer eukrea_cpuimx27_timer = {
  274. .init = eukrea_cpuimx27_timer_init,
  275. };
  276. MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
  277. .boot_params = MX27_PHYS_OFFSET + 0x100,
  278. .map_io = mx27_map_io,
  279. .init_early = imx27_init_early,
  280. .init_irq = mx27_init_irq,
  281. .timer = &eukrea_cpuimx27_timer,
  282. .init_machine = eukrea_cpuimx27_init,
  283. MACHINE_END