mach-universal_c210.c 15 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/mfd/max8998.h>
  16. #include <linux/regulator/machine.h>
  17. #include <linux/regulator/fixed.h>
  18. #include <linux/regulator/max8952.h>
  19. #include <linux/mmc/host.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach-types.h>
  22. #include <plat/regs-serial.h>
  23. #include <plat/exynos4.h>
  24. #include <plat/cpu.h>
  25. #include <plat/devs.h>
  26. #include <plat/iic.h>
  27. #include <plat/sdhci.h>
  28. #include <mach/map.h>
  29. /* Following are default values for UCON, ULCON and UFCON UART registers */
  30. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  31. S3C2410_UCON_RXILEVEL | \
  32. S3C2410_UCON_TXIRQMODE | \
  33. S3C2410_UCON_RXIRQMODE | \
  34. S3C2410_UCON_RXFIFO_TOI | \
  35. S3C2443_UCON_RXERR_IRQEN)
  36. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  37. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  38. S5PV210_UFCON_TXTRIG256 | \
  39. S5PV210_UFCON_RXTRIG256)
  40. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  41. [0] = {
  42. .hwport = 0,
  43. .ucon = UNIVERSAL_UCON_DEFAULT,
  44. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  45. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  46. },
  47. [1] = {
  48. .hwport = 1,
  49. .ucon = UNIVERSAL_UCON_DEFAULT,
  50. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  51. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  52. },
  53. [2] = {
  54. .hwport = 2,
  55. .ucon = UNIVERSAL_UCON_DEFAULT,
  56. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  57. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  58. },
  59. [3] = {
  60. .hwport = 3,
  61. .ucon = UNIVERSAL_UCON_DEFAULT,
  62. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  63. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  64. },
  65. };
  66. static struct regulator_consumer_supply max8952_consumer =
  67. REGULATOR_SUPPLY("vddarm", NULL);
  68. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  69. .gpio_vid0 = EXYNOS4_GPX0(3),
  70. .gpio_vid1 = EXYNOS4_GPX0(4),
  71. .gpio_en = -1, /* Not controllable, set "Always High" */
  72. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  73. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  74. .sync_freq = 0, /* default: fastest */
  75. .ramp_speed = 0, /* default: fastest */
  76. .reg_data = {
  77. .constraints = {
  78. .name = "VARM_1.2V",
  79. .min_uV = 770000,
  80. .max_uV = 1400000,
  81. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  82. .always_on = 1,
  83. .boot_on = 1,
  84. },
  85. .num_consumer_supplies = 1,
  86. .consumer_supplies = &max8952_consumer,
  87. },
  88. };
  89. static struct regulator_consumer_supply lp3974_buck1_consumer =
  90. REGULATOR_SUPPLY("vddint", NULL);
  91. static struct regulator_consumer_supply lp3974_buck2_consumer =
  92. REGULATOR_SUPPLY("vddg3d", NULL);
  93. static struct regulator_init_data lp3974_buck1_data = {
  94. .constraints = {
  95. .name = "VINT_1.1V",
  96. .min_uV = 750000,
  97. .max_uV = 1500000,
  98. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  99. REGULATOR_CHANGE_STATUS,
  100. .boot_on = 1,
  101. .state_mem = {
  102. .disabled = 1,
  103. },
  104. },
  105. .num_consumer_supplies = 1,
  106. .consumer_supplies = &lp3974_buck1_consumer,
  107. };
  108. static struct regulator_init_data lp3974_buck2_data = {
  109. .constraints = {
  110. .name = "VG3D_1.1V",
  111. .min_uV = 750000,
  112. .max_uV = 1500000,
  113. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  114. REGULATOR_CHANGE_STATUS,
  115. .boot_on = 1,
  116. .state_mem = {
  117. .disabled = 1,
  118. },
  119. },
  120. .num_consumer_supplies = 1,
  121. .consumer_supplies = &lp3974_buck2_consumer,
  122. };
  123. static struct regulator_init_data lp3974_buck3_data = {
  124. .constraints = {
  125. .name = "VCC_1.8V",
  126. .min_uV = 1800000,
  127. .max_uV = 1800000,
  128. .apply_uV = 1,
  129. .always_on = 1,
  130. .state_mem = {
  131. .enabled = 1,
  132. },
  133. },
  134. };
  135. static struct regulator_init_data lp3974_buck4_data = {
  136. .constraints = {
  137. .name = "VMEM_1.2V",
  138. .min_uV = 1200000,
  139. .max_uV = 1200000,
  140. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  141. .apply_uV = 1,
  142. .state_mem = {
  143. .disabled = 1,
  144. },
  145. },
  146. };
  147. static struct regulator_init_data lp3974_ldo2_data = {
  148. .constraints = {
  149. .name = "VALIVE_1.2V",
  150. .min_uV = 1200000,
  151. .max_uV = 1200000,
  152. .apply_uV = 1,
  153. .always_on = 1,
  154. .state_mem = {
  155. .enabled = 1,
  156. },
  157. },
  158. };
  159. static struct regulator_init_data lp3974_ldo3_data = {
  160. .constraints = {
  161. .name = "VUSB+MIPI_1.1V",
  162. .min_uV = 1100000,
  163. .max_uV = 1100000,
  164. .apply_uV = 1,
  165. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  166. .state_mem = {
  167. .disabled = 1,
  168. },
  169. },
  170. };
  171. static struct regulator_init_data lp3974_ldo4_data = {
  172. .constraints = {
  173. .name = "VADC_3.3V",
  174. .min_uV = 3300000,
  175. .max_uV = 3300000,
  176. .apply_uV = 1,
  177. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  178. .state_mem = {
  179. .disabled = 1,
  180. },
  181. },
  182. };
  183. static struct regulator_init_data lp3974_ldo5_data = {
  184. .constraints = {
  185. .name = "VTF_2.8V",
  186. .min_uV = 2800000,
  187. .max_uV = 2800000,
  188. .apply_uV = 1,
  189. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  190. .state_mem = {
  191. .disabled = 1,
  192. },
  193. },
  194. };
  195. static struct regulator_init_data lp3974_ldo6_data = {
  196. .constraints = {
  197. .name = "LDO6",
  198. .min_uV = 2000000,
  199. .max_uV = 2000000,
  200. .apply_uV = 1,
  201. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  202. .state_mem = {
  203. .disabled = 1,
  204. },
  205. },
  206. };
  207. static struct regulator_init_data lp3974_ldo7_data = {
  208. .constraints = {
  209. .name = "VLCD+VMIPI_1.8V",
  210. .min_uV = 1800000,
  211. .max_uV = 1800000,
  212. .apply_uV = 1,
  213. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  214. .state_mem = {
  215. .disabled = 1,
  216. },
  217. },
  218. };
  219. static struct regulator_init_data lp3974_ldo8_data = {
  220. .constraints = {
  221. .name = "VUSB+VDAC_3.3V",
  222. .min_uV = 3300000,
  223. .max_uV = 3300000,
  224. .apply_uV = 1,
  225. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  226. .state_mem = {
  227. .disabled = 1,
  228. },
  229. },
  230. };
  231. static struct regulator_init_data lp3974_ldo9_data = {
  232. .constraints = {
  233. .name = "VCC_2.8V",
  234. .min_uV = 2800000,
  235. .max_uV = 2800000,
  236. .apply_uV = 1,
  237. .always_on = 1,
  238. .state_mem = {
  239. .enabled = 1,
  240. },
  241. },
  242. };
  243. static struct regulator_init_data lp3974_ldo10_data = {
  244. .constraints = {
  245. .name = "VPLL_1.1V",
  246. .min_uV = 1100000,
  247. .max_uV = 1100000,
  248. .boot_on = 1,
  249. .apply_uV = 1,
  250. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  251. .state_mem = {
  252. .disabled = 1,
  253. },
  254. },
  255. };
  256. static struct regulator_init_data lp3974_ldo11_data = {
  257. .constraints = {
  258. .name = "CAM_AF_3.3V",
  259. .min_uV = 3300000,
  260. .max_uV = 3300000,
  261. .apply_uV = 1,
  262. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  263. .state_mem = {
  264. .disabled = 1,
  265. },
  266. },
  267. };
  268. static struct regulator_init_data lp3974_ldo12_data = {
  269. .constraints = {
  270. .name = "PS_2.8V",
  271. .min_uV = 2800000,
  272. .max_uV = 2800000,
  273. .apply_uV = 1,
  274. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  275. .state_mem = {
  276. .disabled = 1,
  277. },
  278. },
  279. };
  280. static struct regulator_init_data lp3974_ldo13_data = {
  281. .constraints = {
  282. .name = "VHIC_1.2V",
  283. .min_uV = 1200000,
  284. .max_uV = 1200000,
  285. .apply_uV = 1,
  286. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  287. .state_mem = {
  288. .disabled = 1,
  289. },
  290. },
  291. };
  292. static struct regulator_init_data lp3974_ldo14_data = {
  293. .constraints = {
  294. .name = "CAM_I_HOST_1.8V",
  295. .min_uV = 1800000,
  296. .max_uV = 1800000,
  297. .apply_uV = 1,
  298. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  299. .state_mem = {
  300. .disabled = 1,
  301. },
  302. },
  303. };
  304. static struct regulator_init_data lp3974_ldo15_data = {
  305. .constraints = {
  306. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  307. .min_uV = 1200000,
  308. .max_uV = 1200000,
  309. .apply_uV = 1,
  310. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  311. .state_mem = {
  312. .disabled = 1,
  313. },
  314. },
  315. };
  316. static struct regulator_init_data lp3974_ldo16_data = {
  317. .constraints = {
  318. .name = "CAM_S_ANA_2.8V",
  319. .min_uV = 2800000,
  320. .max_uV = 2800000,
  321. .apply_uV = 1,
  322. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  323. .state_mem = {
  324. .disabled = 1,
  325. },
  326. },
  327. };
  328. static struct regulator_init_data lp3974_ldo17_data = {
  329. .constraints = {
  330. .name = "VCC_3.0V_LCD",
  331. .min_uV = 3000000,
  332. .max_uV = 3000000,
  333. .apply_uV = 1,
  334. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  335. .boot_on = 1,
  336. .state_mem = {
  337. .disabled = 1,
  338. },
  339. },
  340. };
  341. static struct regulator_init_data lp3974_32khz_ap_data = {
  342. .constraints = {
  343. .name = "32KHz AP",
  344. .always_on = 1,
  345. .state_mem = {
  346. .enabled = 1,
  347. },
  348. },
  349. };
  350. static struct regulator_init_data lp3974_32khz_cp_data = {
  351. .constraints = {
  352. .name = "32KHz CP",
  353. .state_mem = {
  354. .disabled = 1,
  355. },
  356. },
  357. };
  358. static struct regulator_init_data lp3974_vichg_data = {
  359. .constraints = {
  360. .name = "VICHG",
  361. .state_mem = {
  362. .disabled = 1,
  363. },
  364. },
  365. };
  366. static struct regulator_init_data lp3974_esafeout1_data = {
  367. .constraints = {
  368. .name = "SAFEOUT1",
  369. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  370. .state_mem = {
  371. .enabled = 1,
  372. },
  373. },
  374. };
  375. static struct regulator_init_data lp3974_esafeout2_data = {
  376. .constraints = {
  377. .name = "SAFEOUT2",
  378. .boot_on = 1,
  379. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  380. .state_mem = {
  381. .enabled = 1,
  382. },
  383. },
  384. };
  385. static struct max8998_regulator_data lp3974_regulators[] = {
  386. { MAX8998_LDO2, &lp3974_ldo2_data },
  387. { MAX8998_LDO3, &lp3974_ldo3_data },
  388. { MAX8998_LDO4, &lp3974_ldo4_data },
  389. { MAX8998_LDO5, &lp3974_ldo5_data },
  390. { MAX8998_LDO6, &lp3974_ldo6_data },
  391. { MAX8998_LDO7, &lp3974_ldo7_data },
  392. { MAX8998_LDO8, &lp3974_ldo8_data },
  393. { MAX8998_LDO9, &lp3974_ldo9_data },
  394. { MAX8998_LDO10, &lp3974_ldo10_data },
  395. { MAX8998_LDO11, &lp3974_ldo11_data },
  396. { MAX8998_LDO12, &lp3974_ldo12_data },
  397. { MAX8998_LDO13, &lp3974_ldo13_data },
  398. { MAX8998_LDO14, &lp3974_ldo14_data },
  399. { MAX8998_LDO15, &lp3974_ldo15_data },
  400. { MAX8998_LDO16, &lp3974_ldo16_data },
  401. { MAX8998_LDO17, &lp3974_ldo17_data },
  402. { MAX8998_BUCK1, &lp3974_buck1_data },
  403. { MAX8998_BUCK2, &lp3974_buck2_data },
  404. { MAX8998_BUCK3, &lp3974_buck3_data },
  405. { MAX8998_BUCK4, &lp3974_buck4_data },
  406. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  407. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  408. { MAX8998_ENVICHG, &lp3974_vichg_data },
  409. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  410. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  411. };
  412. static struct max8998_platform_data universal_lp3974_pdata = {
  413. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  414. .regulators = lp3974_regulators,
  415. .buck1_voltage1 = 1100000, /* INT */
  416. .buck1_voltage2 = 1000000,
  417. .buck1_voltage3 = 1100000,
  418. .buck1_voltage4 = 1000000,
  419. .buck1_set1 = EXYNOS4_GPX0(5),
  420. .buck1_set2 = EXYNOS4_GPX0(6),
  421. .buck2_voltage1 = 1200000, /* G3D */
  422. .buck2_voltage2 = 1100000,
  423. .buck1_default_idx = 0,
  424. .buck2_set3 = EXYNOS4_GPE2(0),
  425. .buck2_default_idx = 0,
  426. .wakeup = true,
  427. };
  428. /* GPIO I2C 5 (PMIC) */
  429. static struct i2c_board_info i2c5_devs[] __initdata = {
  430. {
  431. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  432. .platform_data = &universal_max8952_pdata,
  433. }, {
  434. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  435. .platform_data = &universal_lp3974_pdata,
  436. },
  437. };
  438. /* GPIO KEYS */
  439. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  440. {
  441. .code = KEY_VOLUMEUP,
  442. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  443. .desc = "gpio-keys: KEY_VOLUMEUP",
  444. .type = EV_KEY,
  445. .active_low = 1,
  446. .debounce_interval = 1,
  447. }, {
  448. .code = KEY_VOLUMEDOWN,
  449. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  450. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  451. .type = EV_KEY,
  452. .active_low = 1,
  453. .debounce_interval = 1,
  454. }, {
  455. .code = KEY_CONFIG,
  456. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  457. .desc = "gpio-keys: KEY_CONFIG",
  458. .type = EV_KEY,
  459. .active_low = 1,
  460. .debounce_interval = 1,
  461. }, {
  462. .code = KEY_CAMERA,
  463. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  464. .desc = "gpio-keys: KEY_CAMERA",
  465. .type = EV_KEY,
  466. .active_low = 1,
  467. .debounce_interval = 1,
  468. }, {
  469. .code = KEY_OK,
  470. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  471. .desc = "gpio-keys: KEY_OK",
  472. .type = EV_KEY,
  473. .active_low = 1,
  474. .debounce_interval = 1,
  475. },
  476. };
  477. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  478. .buttons = universal_gpio_keys_tables,
  479. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  480. };
  481. static struct platform_device universal_gpio_keys = {
  482. .name = "gpio-keys",
  483. .dev = {
  484. .platform_data = &universal_gpio_keys_data,
  485. },
  486. };
  487. /* eMMC */
  488. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  489. .max_width = 8,
  490. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  491. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  492. MMC_CAP_DISABLE),
  493. .cd_type = S3C_SDHCI_CD_PERMANENT,
  494. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  495. };
  496. static struct regulator_consumer_supply mmc0_supplies[] = {
  497. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  498. };
  499. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  500. .constraints = {
  501. .name = "VMEM_VDD_2.8V",
  502. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  503. },
  504. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  505. .consumer_supplies = mmc0_supplies,
  506. };
  507. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  508. .supply_name = "MASSMEMORY_EN",
  509. .microvolts = 2800000,
  510. .gpio = EXYNOS4_GPE1(3),
  511. .enable_high = true,
  512. .init_data = &mmc0_fixed_voltage_init_data,
  513. };
  514. static struct platform_device mmc0_fixed_voltage = {
  515. .name = "reg-fixed-voltage",
  516. .id = 0,
  517. .dev = {
  518. .platform_data = &mmc0_fixed_voltage_config,
  519. },
  520. };
  521. /* SD */
  522. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  523. .max_width = 4,
  524. .host_caps = MMC_CAP_4_BIT_DATA |
  525. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  526. MMC_CAP_DISABLE,
  527. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  528. .ext_cd_gpio_invert = 1,
  529. .cd_type = S3C_SDHCI_CD_GPIO,
  530. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  531. };
  532. /* WiFi */
  533. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  534. .max_width = 4,
  535. .host_caps = MMC_CAP_4_BIT_DATA |
  536. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  537. MMC_CAP_DISABLE,
  538. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  539. };
  540. static void __init universal_sdhci_init(void)
  541. {
  542. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  543. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  544. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  545. }
  546. /* I2C0 */
  547. static struct i2c_board_info i2c0_devs[] __initdata = {
  548. /* Camera, To be updated */
  549. };
  550. /* I2C1 */
  551. static struct i2c_board_info i2c1_devs[] __initdata = {
  552. /* Gyro, To be updated */
  553. };
  554. static struct platform_device *universal_devices[] __initdata = {
  555. /* Samsung Platform Devices */
  556. &mmc0_fixed_voltage,
  557. &s3c_device_hsmmc0,
  558. &s3c_device_hsmmc2,
  559. &s3c_device_hsmmc3,
  560. &s3c_device_i2c5,
  561. /* Universal Devices */
  562. &universal_gpio_keys,
  563. &s5p_device_onenand,
  564. };
  565. static void __init universal_map_io(void)
  566. {
  567. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  568. s3c24xx_init_clocks(24000000);
  569. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  570. }
  571. static void __init universal_machine_init(void)
  572. {
  573. universal_sdhci_init();
  574. i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
  575. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  576. s3c_i2c5_set_platdata(NULL);
  577. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  578. /* Last */
  579. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  580. }
  581. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  582. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  583. .boot_params = S5P_PA_SDRAM + 0x100,
  584. .init_irq = exynos4_init_irq,
  585. .map_io = universal_map_io,
  586. .init_machine = universal_machine_init,
  587. .timer = &exynos4_timer,
  588. MACHINE_END